CN103850968B - Fan rotation speed control apparatus - Google Patents
Fan rotation speed control apparatus Download PDFInfo
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- CN103850968B CN103850968B CN201210514518.8A CN201210514518A CN103850968B CN 103850968 B CN103850968 B CN 103850968B CN 201210514518 A CN201210514518 A CN 201210514518A CN 103850968 B CN103850968 B CN 103850968B
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Abstract
A kind of fan rotation speed control apparatus comprises a control chip, for producing and there is the pulse signal of corresponding dutycycle and export this fan to according to the Current Temperatures of this electronic installation, one detecting phase circuit, be connected with the output of this control chip and the output of this fan, thereby the pulse signal of the pulse signal to the output of control chip output and the output of this fan carries out detecting phase, produces and export one first phase signal and one second phase signal; One first counter and one second counter, be respectively used to the high potential of this first phase signal and the second phase signal to count, and produces the first count value and the second count value; And a feedback comparator, for relatively this first count value and this second count value, and produce a comparative result to this control chip; Wherein, this control chip is adjusted the rotating speed of this fan according to this comparative result, thereby adjusts rotation speed of the fan by the value of feedback of fan.
Description
Technical field
The present invention relates to fan rotation speed control apparatus, particularly a kind ofly can adjust fan by the value of feedback of fan and turnThe fan rotation speed control apparatus of speed.
Background technology
The common employing temperature-sensitive sticker of electronic installation carrys out the temperature of sensing heat dissipation element at present, and according to the temperature of this sensingThe rotating speed of controlling radiator fan is load heat radiation. But due to the difference of model, manufacturer and the service time of fan, at electricityWhen sub-device is exported identical signal to fan, the rotating speed of fan is also different, predetermined thereby the rotating speed of part fan can not reachRotating speed, make load heat radiation bad, and then may cause electronic installation to burn.
Summary of the invention
In view of above content, be necessary to provide a kind of circuit for controlling speed of fan, can adjust by the value of feedback of fanThe fan rotation speed control apparatus of rotation speed of the fan.
A kind of fan rotation speed control apparatus, for controlling the rotating speed of a fan, this fan is used to an electronic installationHeat radiation; This fan rotation speed control apparatus comprises a Temperature sampler and a control chip, and this Temperature sampler is for gatheringThe Current Temperatures of this electronic installation also produces a temperature signal, the temperature of this control chip for producing according to this Temperature samplerDegree signal produces the pulse signal with corresponding dutycycle and exports this fan to by the output of this control chip and drive thisFan is the electronic installation heat radiation in this temperature, and this fan rotation speed control apparatus also comprises: a detecting phase circuit, this phase placeCircuit for detecting comprises one first sense terminal, one second sense terminal, one first feedback end and one second feedback end, this detecting phase electricityRoad is connected with the output of this control chip by this first sense terminal, connects by the output of this second sense terminal and this fanConnect, thereby the pulse signal of the pulse signal to the output of control chip output and the output of this fan carries out detecting phase, producesGive birth to one first phase signal and one second phase signal, and export this first phase signal and pass through this by this first feedback endThe second feedback end is exported this second phase signal; One first counter, first of this first counter and this detecting phase circuitFeedback end connects, and for the high potential of this first phase signal is counted, produces the first count value; One second countingDevice, this second counter is connected with the second feedback end of this detecting phase circuit, for the high potential to this second phase signalCount, produce the second count value; And a feedback comparator, this feedback comparator and this first counter and this secondThe output of number devices connects, and for relatively this first count value and this second count value, and produces a comparative result to this controlChip; Wherein, this control chip, according to the dutycycle of the pulse signal of this comparative result adjustment output, is adjusted turning of this fanSpeed.
The present invention is the pulse signal to a control chip output output and fan output by a detecting phase circuitPulse signal carry out detecting phase, produce and export one first phase signal and one second phase signal; By one firstCounter and one second counter, count the high potential of this first phase signal and this second phase signal respectively, comesProduce the first count value and the second count value; And by this feedback comparator, relatively this first count value and this second count value,And produce comparative result to this control chip, make this control chip accounting for according to the pulse signal of this comparative result adjustment outputEmpty ratio, adjusts the rotating speed of this fan, thereby can adjust rotation speed of the fan by the value of feedback of fan.
Brief description of the drawings
Fig. 1 is the block diagram of an embodiment of the present invention fan revolution speed control device.
Fig. 2 is the circuit diagram of the detecting phase circuit of fan rotation speed control apparatus as shown in Figure 1.
Fig. 3 is the simulation schematic diagram of fan rotation speed control apparatus as shown in Figure 1.
Fig. 4 is the circuit diagram of the first counter of fan rotation speed control apparatus as shown in Figure 1.
Fig. 5 is the circuit diagram of the second counter of fan rotation speed control apparatus as shown in Figure 1.
Fig. 6 is the circuit diagram of the feedback comparator of fan rotation speed control apparatus as shown in Figure 1.
Fig. 7 is the dutycycle offset schematic diagram of an embodiment of the present invention.
Main element symbol description
| Fan rotation speed control apparatus | 1 |
| Fan | 2 |
| Electronic installation | 3 |
| Temperature sampler | 10 |
| Control chip | 20 |
| Detecting phase circuit | 30 |
| The first sense terminal | 301 |
| The second sense terminal | 302 |
| The first feedback end | 303 |
| The second feedback end | 304 |
| The first counter | 40 |
| The second counter | 50 |
| Feedback comparator | 60 |
| With door | 31 |
| The first XOR gate | 32 |
| The second XOR gate | 33 |
| The first clock end | 41 |
| The first Enable Pin | 42 |
| The first clear terminal | 43 |
| The first output | 44 |
| Second clock end | 51 |
| The second Enable Pin | 52 |
| The second clear terminal | 53 |
| The second output | 54 |
| Comparator | 61 |
| First input end | 611 |
| The second input | 612 |
| The 3rd output | 613 2 --> |
| The 4th output | 614 |
| D type flip flop | 62 |
| The 3rd input | 621 |
| Four-input terminal | 622 |
| Enable Pin | 623 |
| Clock end | 624 |
| The 5th output | 625 |
| The 6th output | 626 |
| Dutycycle compensation meter | 21 |
| Analog-digital converter | 70 |
Following detailed description of the invention further illustrates the present invention in connection with above-mentioned accompanying drawing.
Detailed description of the invention
Refer to Fig. 1-Fig. 3, a fan rotation speed control apparatus 1 is for controlling the rotating speed of a fan 2, and this fan 2 is for givingOne electronic installation 3 dispels the heat. This fan rotation speed control apparatus 1 comprises a Temperature sampler 10, a control chip 20, a detecting phaseCircuit 30, one first counter 40, one second counter 50 and a feedback comparator 60.
This Temperature sampler 10 is for gathering the Current Temperatures of this electronic installation 3 and producing a temperature signal. This control coreSheet 20 is connected with this Temperature sampler 10, has corresponding duty for the temperature signal output producing according to this Temperature sampler 10The pulse signal of ratio to fan 2 drives this fan 2 to dispel the heat for the electronic installation 3 in this temperature. Wherein, this electronic installation 3Temperature difference, the dutycycle of the pulse signal that this control chip 20 is exported is also different, thus the rotating speed that fan 2 rotates is not yetWith. This detecting phase circuit 30 comprises one first sense terminal 301, one second sense terminal 302, one first feedback end 303 and oneTwo feedback ends 304, this detecting phase circuit 30 is connected with the output of this control chip 20 by this first sense terminal 301, logicalCross this second sense terminal 302 and be connected with the output of this fan 2, thus the pulse signal f that this control chip 20 is exporteddutyWithThe pulse signal f that this fan 2 is exportedtachCarry out detecting phase, produce one first phase signal QDWith one second phase signalQT, and respectively by this first feedback end 303 this first phase signal of output QDWith by 304 outputs of this second feedback end thisTwo phase signal QT. This first counter 40 is connected with the first feedback end 303 of this detecting phase circuit 30, for to this firstPhase signal QDHigh potential count, produce one first count value TD. This second counter 50 and this detecting phase circuitThe second feedback end 304 of 30 connects, for to this second phase signal QTHigh potential count, produce one second countingValue TT. This feedback comparator 60 is connected with the output of this first counter 40 and this second counter 50, for relatively thisOne count value TDWith this second count value TT, and produce a comparative result Y0Y1 to this control chip 20. Wherein, this control chip20 also adjust the dutycycle of the pulse signal of output according to this comparative result Y0Y1, adjust the rotating speed of this fan 2. Wherein, whenControl chip 20 receives relatively this first count value T of feedback comparator 60DBe less than this second count value TTThe comparative result producingWhen Y0Y1, this control chip 20 reduces the dutycycle of this pulse signal that exports fan 2 to, thereby turns down the rotating speed of this fan 2,When control chip 20 receives relatively this first count value T of feedback comparator 60DBe greater than this second count value TTThe relatively knot producingFruit when Y0Y1, increases this and exports the dutycycle of the pulse signal of fan 2 to, thereby heightens the rotating speed of this fan 2.
Please continue to refer to Fig. 2, this detecting phase circuit 30 comprise one with door 31, one first XOR gate 32 and one second XORDoor 33. Should be with two inputs of door 31 (in figure not label) defeated with the output of this control chip 20 and this fan 2 respectivelyGoing out end connects. The input that wherein, should be connected with the output of this control chip 20 with door 31 forms this detecting phase circuit 30The first sense terminal 301, input that should be connected with the output of this fan 2 with door 31 forms the of this detecting phase circuit 30Two sense terminals 302. This first XOR gate 32 simultaneously with this and 31 input that are connected with the output of this control chip 20, andShould be connected with the output of door 31, for exporting this first phase signal QD. This second XOR gate 33 is simultaneously same with door 31 with thisThe input that the output of this fan 2 connects, and should be connected with the output of door 31, for exporting this second phase signal QT.
Please continue to refer to Fig. 3, Yi Zhi, the pulse signal f exporting when this control chip 20dutyThe arteries and veins of exporting with this fan 2Rush signal ftachWhile being all high level or low level, the first phase signal Q that this detecting phase circuit 30 is exportedDAnd this secondPhase signal QTBe all low level. The pulse signal f exporting when this control chip 20dutyFor high level, and this fan 2 is exportedPulse signal ftachDuring for low level, the first phase signal Q that this detecting phase circuit 30 is exportedDFor high level, this second phase placeSignal QTFor low level. The pulse signal f exporting when this control chip 20dutyFor low level, and the pulse that this fan 2 is exported letterNumber ftachDuring for high level, the first phase signal Q that this detecting phase circuit 30 is exportedDFor low level, this second phase signal QTFor high level.
Please refer to Fig. 4, this first counter 40 comprises one first clock end 41, one first Enable Pin 42, one first zero clearingEnd 43 and one first output 44. This first clock end 41 is connected with a system clock, for receiving this system clock outputClock signal of system clk. This first Enable Pin 42 is connected with the output of the first XOR gate 32 of this detecting phase circuit 30. ShouldThe first clear terminal 43 is connected with control chip 20, a control signal fpc who produces for receiving control chip 20, wherein, this controlCoremaking sheet is at the pulse signal f of this control chip outputdutyWhile variation, produce the control of a high level from low level to high levelSignal, in other cases, this control chip is exported a low level control signal. This first output 44 and this feedback ratio areDevice 60 connects, for exporting current counted this first count value TD。
Please continue to refer to Fig. 3, in the time that this control signal fpc becomes high level from low level, that is, and in control signal experience oneRise along time, this first counter 40 is by this first count value TDZero clearing. When this control signal fpc does not change or becomes from high levelFor low level, when this clock signal of system clk experiences a rising edge, and this first phase signal QDDuring for high level, this is first years oldCounter 40 will be counted increases by one. In other cases, the counting of this first counter 40 is constant.
Please refer to Fig. 5, this second counter 50 comprises a second clock end 51, one second Enable Pin 52, one second zero clearingEnd 53 and one second output 54. This second clock end 51 is connected with this system clock, for receiving this system clock outputClock signal of system clk, this second Enable Pin 52 is connected with the output of this second XOR gate 33, and this second clear terminal 53 is sameBe connected this control signal fpc exporting for receiving this control chip 20, this second output 54 and this with this control chip 20Feedback comparator 60 connects, for exporting current counted this second count value TT。
Please continue to refer to Fig. 3, in the time that this control signal fpc becomes high level from low level, that is, and in control signal experience oneRise along time, this second counter 50 is by this second count value TTZero clearing. When this control signal fpc does not change or becomes from high levelFor low level, when this clock signal of system clk experiences a rising edge, and this second phase signal QTDuring for high level, this is second years oldCounter 50 will be counted increases by one. In other cases, the counting of this second counter 50 is constant.
Please refer to Fig. 6, in the first embodiment of the present invention, this feedback comparator 60 comprises a comparator 61, this ratioComprise a first input end 611, one second input 612, one the 3rd output 613 and one the 4th output 614 compared with device 61. ShouldThe first input end 611 of comparator 61 is connected with the first output 44 of this first counter 40, this comparator 61 second defeatedEntering end 612 is connected with the second output 54 of this second counter 50. The 3rd output 613 of this comparator 61 is for exporting oneThe first fiducial value Y0, the 4th output 614 of this comparator 61 is for exporting one second fiducial value Y1. This first fiducial value Y0 andThis second fiducial value Y1 forms this comparative result Y0Y1.
As this first count value TDBe greater than this second count value TTTime, the 3rd output 613 of this comparator 61 exportOne fiducial value Y0 is high level, and the second fiducial value Y1 that the 4th output 614 of this comparator 61 is exported is low level. When thisOne count value TDEqual this second count value TTTime, the first fiducial value Y0 that the 3rd output 613 of this comparator 61 is exported is lowLevel, the second fiducial value Y1 that the 4th output 614 of this comparator 61 is exported is low level. As this first count value TDBe less thanThis second count value TTTime, the first fiducial value Y0 that the 3rd output 613 of this comparator 61 is exported is low level, this comparatorThe second fiducial value Y1 that 61 the 4th output 614 is exported is high level.
Please continue to refer to Fig. 6, in the second embodiment of the present invention, this feedback comparator 60 comprise a comparator 61 andOne d type flip flop 62. This comparator 61 comprises a first input end 611, one second input 612, one the 3rd output 613 andThe 4th output 614. The first input end 611 of this comparator 61 is connected with the first output 44 of this first counter 40, shouldThe second input 612 of comparator 61 is connected with the second output 54 of this second counter 50. This comparator 61 the 3rd defeatedGo out end 613 for exporting one first fiducial value, the 4th output 614 of this comparator 61 is for exporting one second fiducial value. This DTrigger 62 comprises one the 3rd input 621, a four-input terminal 622, an Enable Pin 623, a clock end 624, one the 5th defeatedGo out end 625 and one the 6th output 626. The 3rd input 621 of this d type flip flop 62 and the 3rd output of this comparator 61613 connect, and the four-input terminal 622 of this d type flip flop 62 is connected with the 4th output 614 of this comparator 61, this Enable Pin 623Be connected with this control chip 20 equally, the control signal fpc exporting for receiving control chip 20, this clock end 624 with this isSystem clock connects, for receiving the clock signal of system clk of this system clock output, the 5th output 625 of this d type flip flop 62Be used for exporting one the 3rd fiducial value Q0, the 6th output 626 of this d type flip flop 62 is for exporting one the 4th fiducial value Q1, and this is years oldThree fiducial value Q0 and the 4th fiducial value Q1 form this comparative result Y0Y1. By increasing this d type flip flop, make this feedback ratioDevice 60 is this first count value T relatively in the time that this control signal fpc becomes high level from low level onlyDAnd this second count value TT,This feedback comparator 60 last first count value T that only relatively this first counter 40 is exported before zero clearingDAnd this secondLast second count value T that counter 50 is exported before zero clearingT。
Please continue to refer to Fig. 3, same, as this first count value TDBe greater than this second count value TTTime, this comparator 61The first fiducial value that the 3rd output 613 is exported is high level, the second comparison that the 4th output 614 of this comparator 61 is exportedValue is low level. As this first count value TDEqual this second count value TTTime, the 3rd output 613 of this comparator 61 is exportedThe first fiducial value be low level, the second fiducial value that the 4th output 614 of this comparator 61 is exported is low level. When thisOne count value TDBe less than this second count value TTTime, the first fiducial value that the 3rd output 613 of this comparator 61 is exported is low electricityFlat, the second fiducial value that the 4th output 614 of this comparator 61 is exported is high level. When Enable Pin 623 is high level, this isWhen system clock signal is high level, the 3rd fiducial value Q0 and this comparator 61 that the 5th output 625 of this d type flip flop 62 is exportedThe first fiducial value of exporting of the 3rd output 613 be consistent, the 6th output 626 of this d type flip flop 62 export the 4thThe second fiducial value that the 4th output 614 of fiducial value Q1 and this comparator 61 is exported is consistent. When Enable Pin 623 is lowWhen level or this system clock are low level, the 3rd fiducial value and last that the 5th output 625 of this d type flip flop 62 is exportedThe 3rd fiducial value Q0 of time output remains unchanged, the 4th fiducial value Q1 that the 6th output 626 of this d type flip flop 62 is exported withThe 4th fiducial value of last time output remains unchanged.
In this control chip 20, store a dutycycle compensation meter 21(as shown in Figure 7). Wherein, this dutycycle compensation meter 21Can be acquiescence, or can be read laggard edlin, and be again burned onto this control chip 20. In this dutycycle compensation meter 21Record the corresponding relation of comparative result and dutycycle offset. This control chip 20 is determined according to this dutycycle compensation meter 21 shouldThe corresponding dutycycle offset of comparative result, and the dutycycle of the pulse signal that this control chip 20 is exported increases this dutyTo obtain a total dutycycle, and recently drive this fan 2 according to this total duty than offset. For example: as this comparative result Y1Y0Be 10 o'clock, i.e. this first count value TDBe greater than this second count value TTTime, this control chip 20 is true according to this dutycycle compensation meter 21Determine the corresponding dutycycle offset of comparative result Y1Y0 for reducing 10, the duty of the pulse signal that this control chip 20 is exportedThan reducing 10 to obtain a total dutycycle, and recently drive this fan 2 according to this total duty.
In the present embodiment, this fan rotation speed control apparatus 1 also comprises an analog-digital converter 70, for by this temperatureThe temperature signal that collector 10 gathers changes into data signal.
Claims (8)
1. a fan rotation speed control apparatus, for controlling the rotating speed of a fan, this fan is used to an electronic installation looseHeat; This fan rotation speed control apparatus comprises a Temperature sampler and a control chip, and this Temperature sampler is used for gathering thisThe Current Temperatures of electronic installation also produces a temperature signal, the temperature of this control chip for producing according to this Temperature samplerSignal produces the pulse signal with corresponding dutycycle and exports this fan to by the output of this control chip and drive this windFan is the electronic installation heat radiation in this temperature, it is characterized in that, this fan rotation speed control apparatus also comprises:
One detecting phase circuit, this detecting phase circuit comprise one first sense terminal, one second sense terminal, one first feedback end andOne second feedback end, this detecting phase circuit is connected with the output of this control chip by this first sense terminal, by thisTwo sense terminals are connected with the output of this fan, thereby the pulse signal to the output of control chip output and the output of this fanPulse signal carries out detecting phase, produces one first phase signal and one second phase signal, and by this first feedback endExport this first phase signal and export this second phase signal by this second feedback end;
One first counter, this first counter is connected with the first feedback end of this detecting phase circuit, for to this first-phaseThe high potential of position signal is counted, and produces the first count value;
One second counter, this second counter is connected with the second feedback end of this detecting phase circuit, for to this second-phaseThe high potential of position signal is counted, and produces the second count value; And
One feedback comparator, this feedback comparator is connected with the output of this first counter and this second counter, for thanThis first count value and this second count value, and produce a comparative result to this control chip;
Wherein, this control chip, according to the dutycycle of the pulse signal of this comparative result adjustment output, is adjusted turning of this fanSpeed.
2. fan rotation speed control apparatus as claimed in claim 1, is characterized in that: this detecting phase circuit comprise one with door,One first XOR gate and one second XOR gate, should with two inputs of door respectively with output and this fan of this control chipOutput connect, wherein, input that should be connected with the output of this control chip with door forms this detecting phase circuitThe first sense terminal, the input that should be connected with the output of this fan with door forms the second sense terminal of this detecting phase circuit;The input that this first XOR gate while is connected with the output of control chip with this and door, and should be connected with the output of door,Be used for exporting this first phase signal; This second XOR gate and the input that should be connected with the output of this fan with door, and shouldBe connected with the output of door, for exporting this second phase signal.
3. fan rotation speed control apparatus as claimed in claim 2, is characterized in that: this first counter comprises one first clockEnd, one first Enable Pin, one first clear terminal and one first output; This first clock end is connected with system clock, for connecingReceive the clock signal of system of this system clock output; This first Enable Pin is connected with the output of this first XOR gate; This is first years oldClear terminal is connected with this control chip, the control signal connection producing for receiving this control chip, and wherein, this control chip existsThe pulse signal of this control chip output when low level becomes high level, produces the control signal of a high level, in other feelingsUnder condition, this control chip is exported a low level control signal; This first output is connected with this feedback comparator, for outputCurrent counted this first count value.
4. fan rotation speed control apparatus as claimed in claim 3, is characterized in that: this second counter comprises a second clockEnd, one second Enable Pin, one second clear terminal and one second output; This second clock end is connected with this system clock, forReceive the clock signal of system of this system clock output; This second Enable Pin is connected with the output of this second XOR gate; This is years oldTwo clear terminals are connected with this control chip, this control signal producing for receiving this control chip; This second output and thisFeedback comparator connects, for exporting this current counted second count value.
5. fan rotation speed control apparatus as claimed in claim 4, is characterized in that: this feedback comparator comprises a comparator;This comparator comprises a first input end, one second input, one the 3rd output and one the 4th output; Of this comparatorOne input is connected with the first output of this first counter, of the second input of this comparator and this second counterTwo outputs connect; The 3rd output of this comparator is used for exporting one first fiducial value, and the 4th output of this comparator is usedIn output one second fiducial value; This first fiducial value and this second fiducial value form this comparative result.
6. fan rotation speed control apparatus as claimed in claim 4, is characterized in that: this feedback comparator comprise a comparator andOne d type flip flop; This comparator comprises a first input end, one second input, one the 3rd output and one the 4th output; ShouldThe first input end of comparator is connected with the first output of this first counter, the second input of this comparator and this secondThe second output of counter connects; The 3rd output of this comparator is used for exporting one first fiducial value, of this comparatorFour outputs are used for exporting one second fiducial value; This d type flip flop comprise one the 3rd input, a four-input terminal, an Enable Pin,One clock end, one the 5th output and one the 6th output; The 3rd output of the 3rd input of this d type flip flop and this comparatorEnd connects, and the four-input terminal of this d type flip flop is connected with the 4th output of this comparator, and this Enable Pin and this control chip connectConnect, for receiving this control signal of this control chip output, this clock end is connected with this system clock, for receiving this systemThe clock signal of system of clock output; The 5th output of this d type flip flop is used for exporting one the 3rd fiducial value, this d type flip flopThe 6th output is used for exporting one the 4th fiducial value, and the 3rd fiducial value and the 4th fiducial value form this comparative result.
7. as claim 5 or fan rotation speed control apparatus claimed in claim 6, it is characterized in that: in this control chip, depositContain a dutycycle compensation meter, in this dutycycle compensation meter, record the corresponding relation of comparative result and dutycycle offset, shouldControl chip is determined the corresponding dutycycle offset of this comparative result according to this dutycycle compensation meter, by accounting for of this pulse signalEmpty than increasing this dutycycle offset to obtain a total dutycycle, and recently drive this fan according to this total duty.
8. fan rotation speed control apparatus as claimed in claim 1, is characterized in that: this fan rotation speed control apparatus also comprises oneIndividual analog-digital converter, changes into data signal for the temperature signal that this Temperature sampler is gathered.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210514518.8A CN103850968B (en) | 2012-12-05 | 2012-12-05 | Fan rotation speed control apparatus |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210514518.8A CN103850968B (en) | 2012-12-05 | 2012-12-05 | Fan rotation speed control apparatus |
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| CN103850968A CN103850968A (en) | 2014-06-11 |
| CN103850968B true CN103850968B (en) | 2016-05-25 |
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| CN201210514518.8A Expired - Fee Related CN103850968B (en) | 2012-12-05 | 2012-12-05 | Fan rotation speed control apparatus |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2619602C2 (en) * | 1976-05-04 | 1984-12-13 | Technitron Elektrik AG, Baar | Control unit for an air bubble massager |
| GB2087559A (en) * | 1980-11-15 | 1982-05-26 | Nat Maritime Inst | Determining gas compositions acoustically |
| JP4218572B2 (en) * | 2004-04-07 | 2009-02-04 | パナソニック株式会社 | Dishwasher motor drive |
| JP4509735B2 (en) * | 2004-10-27 | 2010-07-21 | 三菱電機株式会社 | Electric motor drive device, molded motor, air conditioner, refrigerator and ventilation fan |
| JP4807325B2 (en) * | 2006-11-14 | 2011-11-02 | 株式会社デンソー | Motor driving apparatus and motor driving method |
| US20080272720A1 (en) * | 2007-05-03 | 2008-11-06 | Atmel Corporation | Accurate motor speed control |
| TWI422128B (en) * | 2008-10-23 | 2014-01-01 | Intersil Inc | Power regulator,and system and method for controlling output of power regulator |
| TWI380548B (en) * | 2008-12-16 | 2012-12-21 | Delta Electronics Inc | Error detecting and motor protecting apparatus and method thereof |
| US8724320B2 (en) * | 2010-08-19 | 2014-05-13 | Nidec Corporation | Fan system and electronic device |
| JP5809833B2 (en) * | 2011-04-05 | 2015-11-11 | ローム株式会社 | Motor drive device and motor device using the same |
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