CN103794581A - Thermoelectricity radiating device - Google Patents
Thermoelectricity radiating device Download PDFInfo
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- CN103794581A CN103794581A CN201210422441.1A CN201210422441A CN103794581A CN 103794581 A CN103794581 A CN 103794581A CN 201210422441 A CN201210422441 A CN 201210422441A CN 103794581 A CN103794581 A CN 103794581A
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- 230000005619 thermoelectricity Effects 0.000 title abstract 4
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 174
- 239000010703 silicon Substances 0.000 claims abstract description 174
- 239000000758 substrate Substances 0.000 claims abstract description 35
- 239000000463 material Substances 0.000 claims description 7
- 238000009826 distribution Methods 0.000 claims description 6
- 238000012856 packing Methods 0.000 claims description 6
- 229910002899 Bi2Te3 Inorganic materials 0.000 claims description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical group [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 3
- 229910002665 PbTe Inorganic materials 0.000 claims description 3
- 229910017629 Sb2Te3 Inorganic materials 0.000 claims description 3
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims description 3
- 229910052797 bismuth Inorganic materials 0.000 claims description 3
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical group [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 claims description 3
- 229910052802 copper Inorganic materials 0.000 claims description 3
- 239000010949 copper Substances 0.000 claims description 3
- 239000013078 crystal Substances 0.000 claims description 3
- 239000011521 glass Substances 0.000 claims description 3
- 239000002086 nanomaterial Substances 0.000 claims description 3
- OCGWQDWYSQAFTO-UHFFFAOYSA-N tellanylidenelead Chemical compound [Pb]=[Te] OCGWQDWYSQAFTO-UHFFFAOYSA-N 0.000 claims description 3
- XSOKHXFFCGXDJZ-UHFFFAOYSA-N telluride(2-) Chemical compound [Te-2] XSOKHXFFCGXDJZ-UHFFFAOYSA-N 0.000 claims description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 144
- 239000011229 interlayer Substances 0.000 abstract description 7
- 230000000191 radiation effect Effects 0.000 abstract description 2
- 239000010410 layer Substances 0.000 description 58
- 230000000694 effects Effects 0.000 description 9
- 238000001816 cooling Methods 0.000 description 7
- 238000005516 engineering process Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000003466 welding Methods 0.000 description 2
- 230000005679 Peltier effect Effects 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- NHDHVHZZCFYRSB-UHFFFAOYSA-N pyriproxyfen Chemical compound C=1C=CC=NC=1OC(C)COC(C=C1)=CC=C1OC1=CC=CC=C1 NHDHVHZZCFYRSB-UHFFFAOYSA-N 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The present invention discloses a thermoelectricity radiating device. The thermoelectricity radiating device comprises a top chip, an interlayer chip, and a bottom chip, wherein the top chip comprises a top substrate, and a P-type silicon through hole and a first silicon metal through hole which penetrate the top substrate, the P-type silicon through hole is used to connect a zero potential of a power supply, and the first silicon metal through hole is used to connect a positive potential of the power supply; the interlayer chip is superposed and connected under the top chip, comprises an interlayer substrate, and a second silicon metal through hole and a third silicon metal through hole which penetrate the interlayer substrate, and an electronic device is formed in the interlayer chip; the bottom chip is superposed and connected under the interlayer chip, comprises a bottom substrate, and an N-type silicon through hole and a fourth silicon metal through hole which penetrate the bottom substrate, and the two through holes are communicated with each other at the bottom of the bottom chip; the P-type silicon through hole, the second silicon metal through hole and the N-type silicon through hole are connected orderly, and the first silicon metal through hole, the third silicon metal through hole and the fourth silicon metal through hole are connected orderly. According to the present invention, the heat radiation effect of the thermoelectricity radiating device is improved.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, relate in particular to a kind of thermoelectric radiating device.
Background technology
In technical field of manufacturing semiconductors, the cooling of integrated circuit is the major issue that must solve always.The high temperature producing due to Joule heat usually can reduce the Performance And Reliability of integrated device electronics.
The thermocouple being made up of N, P-type material is applied after direct voltage, because of the direction difference that direct current passes into, will produce heat absorption and release phenomenon at galvanic couple Nodes, a node heating, another node turns cold simultaneously, and this phenomenon is called peltier effect.Peltier thermoelectric radiating device is that a kind of paltie effect that utilizes is to produce the device of heat pump effect.Peltier thermoelectric radiating device has cold junction and Liang Ge end, hot junction, is connected with one or several thermocouple between cold junction and hot junction.All these thermocouples link together, and extract two power connector ends out at two ends.In the time applying direct voltage to two power connector ends, above-mentioned cold junction temperature reduces and hot-side temperature rising, and namely the heat of cold junction is conducted to hot junction.This equipment does not produce heat or absorbs heat, but heat is conducted to the other end from one end, makes thus one end be cooled.
Need to provide a kind of thermoelectric radiating device, to solve the cooling problem of said integrated circuit.
Summary of the invention
For solving the problems of the technologies described above, according to an aspect of the present invention, a kind of thermoelectric radiating device is provided, it comprises: top layer chip, P type silicon through hole and the first metallic silicon through hole that it comprises top layer substrate and runs through top layer substrate, P type silicon through hole is for connecting the zero potential of power supply, and the first metallic silicon through hole is for connecting the positive potential of power supply; Intermediate layer chip, its stacked top layer chip bottom that is connected to, intermediate layer chip comprises intermediate layer substrate and runs through the second metallic silicon through hole and the 3rd metallic silicon through hole of intermediate layer substrate, in the chip of intermediate layer, is formed with electronic device; Bottom chip, its stacked chip bottom, intermediate layer that is connected to, bottom chip comprises bottom substrate and runs through N-type silicon through hole and the 4th metallic silicon through hole of bottom substrate, and N-type silicon through hole and the 4th metallic silicon through hole are interconnected in the bottom of bottom chip, wherein, P type silicon through hole, the second metallic silicon through hole and N-type silicon through hole are connected in turn, and the first metallic silicon through hole, the 3rd metallic silicon through hole and the 4th metallic silicon through hole are connected in turn.
Further, top layer chip also comprises the 5th metallic silicon through hole that runs through top layer substrate, and the 5th metallic silicon through hole is for connection of electronic devices.
Further, thermoelectric radiating device comprises P type silicon through hole, the second metallic silicon through hole and the N-type silicon through hole that many groups connect in turn.
Further, many groups connect in turn P type silicon through hole, the second metallic silicon through hole and N-type silicon through hole are arranged around electronic device.
Further, the bottom of bottom chip is provided with heavy distribution layer, and N-type silicon through hole and the 4th metallic silicon through hole are interconnected by heavy distribution layer.
Further, the top of silicon through hole is provided with pad.
Further, P type silicon through hole, the second metallic silicon through hole and N-type silicon through hole are connected by soldered ball in turn, and the first metallic silicon through hole, the 3rd metallic silicon through hole and the 4th metallic silicon through hole are connected by soldered ball in turn.
Further, the packing material of the first metallic silicon through hole, the second metallic silicon through hole, the 3rd metallic silicon through hole and the 4th metallic silicon through hole is copper.
Further, the packing material of P type silicon through hole and N-type silicon through hole is bismuth telluride, Sb2Te3, Bi2Te3, PbTe, SiGe, crystal phonon glass or nano material.
The present invention has following technique effect:
In thermoelectric radiating device of the present invention, the second metallic silicon through hole in P type silicon through hole, intermediate layer chip in top layer chip is connected in turn with the N-type silicon through hole in bottom chip, forms the thermoelectric radiating part of Peltier form.And, the 4th metallic silicon through hole in N-type silicon through hole and bottom chip is interconnected, and the first metallic silicon through hole, the 3rd metallic silicon through hole and the 4th metallic silicon through hole are connected in turn, thereby N shape silicon through hole is connected with the first metallic silicon through hole in top layer chip, be arranged in like this P type silicon through hole of top layer chip and the first metallic silicon through hole and form respectively two power connector ends of thermoelectric radiating device.The zero potential that wherein connects power supply at P type silicon through hole, when the first metallic silicon through hole connects the positive potential of power supply, its hot junction is formed on the top of this thermoelectric radiating device and bottom, and centre becomes cold junction.
Thus, owing to being formed with electronic device in the chip of intermediate layer, just make this electronic device contact with cold junction, obtain the cooling of cold junction, to keep in the course of the work temperature can significantly not raise.This thermoelectric radiating device radiation is effective, and integrated level is high, and connecting circuit convenient (both positive and negative polarity of power supply is all connected to the relevant position of top layer chip).
In summary of the invention part, introduced the concept of a series of reduced forms, this will further describe in embodiment part.Summary of the invention part of the present invention does not also mean that key feature and the essential features that will attempt to limit technical scheme required for protection, does not more mean that the protection range of attempting to determine technical scheme required for protection.Below in conjunction with accompanying drawing, describe advantages and features of the invention in detail.
Accompanying drawing explanation
Following accompanying drawing of the present invention is used for understanding the present invention in this as a part of the present invention.Shown in the drawings of embodiments of the present invention and description thereof, be used for explaining principle of the present invention.In the accompanying drawings,
Fig. 1 shows the structural representation of thermoelectric radiating device according to an embodiment of the invention.
Embodiment
In the following description, a large amount of concrete details have been provided to more thorough understanding of the invention is provided.But, it will be apparent to one skilled in the art that the present invention can be implemented without one or more these details.In other example, for fear of obscuring with the present invention, be not described for technical characterictics more well known in the art.
In order thoroughly to understand the present invention, will detailed structure be proposed in following description.Obviously, execution of the present invention is not limited to the specific details that those skilled in the art has the knack of.Preferred embodiment of the present invention is described in detail as follows, but except these are described in detail, the present invention can also have other execution modes.
As shown in Figure 1, thermoelectric radiating device comprises top layer chip 1, intermediate layer chip 2 and bottom chip 3 according to an embodiment of the invention.This top layer chip 1 comprises top layer substrate 101, runs through P type silicon through hole 102 and the first metallic silicon through hole 103 of top layer substrate 101, and wherein P type silicon through hole 102 is for connecting the zero potential of power supply, and the first metallic silicon through hole 103 is for connecting the positive potential of power supply.Stacked top layer chip 1 bottom that is connected to of intermediate layer chip 2, comprises intermediate layer substrate 201 and the second metallic silicon through hole 202 and the 3rd metallic silicon through hole 203 that run through intermediate layer substrate 201, is formed with electronic device 204 in intermediate layer chip 2.Stacked intermediate layer chip 2 bottoms that are connected to of bottom chip 3, comprise bottom substrate 301 and the N-type silicon through hole 302 and the 4th metallic silicon through hole 303 that run through bottom substrate 301.As shown in fig. 1, N-type silicon through hole 302 and the 4th metallic silicon through hole 303 are interconnected in the bottom of bottom chip 3.And P type silicon through hole 102, the second metallic silicon through hole 202 and N-type silicon through hole 302 are connected from top to bottom in turn, the first metallic silicon through hole 103, the 3rd metallic silicon through hole 203 are connected from top to bottom in turn with the 4th metallic silicon through hole 303.
Be appreciated that in the thermoelectric radiating device of the present embodiment, the second metallic silicon through hole 202 in P type silicon through hole 102, intermediate layer chip 2 in top layer chip 1 is connected in turn with the N-type silicon through hole 302 in bottom chip 3, forms the thermoelectric radiating part of Peltier form.The first metallic silicon through hole 103, the 3rd metallic silicon through hole 203 are connected in turn with the 4th metallic silicon through hole 303, form the effect of wire, and N shape silicon through hole 302 is interconnected with the 4th metallic silicon through hole 303 in bottom chip 3, thereby be connected with the first metallic silicon through hole 103 in top layer chip 1, like this, be arranged in the P type silicon through hole 102 of top layer chip 1 and the first metallic silicon through hole 103 and form respectively two power connector ends of thermoelectric radiating device.
Wherein, as shown in fig. 1, connect the zero potential of power supply at P type silicon through hole 102, when the first metallic silicon through hole 103 connects the positive potential of power supply, in the PN junction forming at the P type silicon through hole 102, the second metallic silicon through hole 202 and the N-type silicon through hole 302 that connect in turn, electronics is from top to bottom and then towards the anode flow of power supply, and positive charge from bottom to top towards the negative pole of power supply flow (arrow A shows the flow direction of electric current), thereby its hot junction is formed on the top of this thermoelectric radiating device and bottom, and centre becomes cold junction.Middle heat upwards and by bottom is discharged (flow direction that in figure, arrow B shows heat) downwards by top.
Thus, owing to being formed with electronic device 204 in intermediate layer chip 2, just make this electronic device 204 contact with the cold junction of this thermoelectric radiating device, obtain the cooling of cold junction, to keep in the course of the work temperature can significantly not raise.
Cooling effect can be assessed by Z value, wherein Z=S
2× E/T, wherein S represents Seebeck coefficient (Seebeck coefficient), and E represents conductivity, and T represents thermal conductivity.Because the PN junction type silicon clear size of opening of this thermoelectric radiating device is larger, thereby hole, electron stream momentum are larger, conductivity E is improved, thereby has improved the radiating effect of thermoelectric radiating device; And the metallic silicon through hole in intermediate layer chip 2 is reduced thermal conductivity T, further improve the radiating effect of thermoelectric radiating device.In addition, as described above, middle heat is discharged by top and two bottom sides simultaneously, has improved from another point of view cooling heat dissipation effect.
In addition, the form of upper and lower three layers of chip stack makes whole device integrated level higher.In addition, while connecting power supply, the both positive and negative polarity of power supply is all connected to top layer chip 1, thereby connecting circuit is also very convenient.Particularly, the both positive and negative polarity of power supply is all connected to the relevant position (being respectively P type silicon through hole 102 and the first metallic silicon through hole 103) of top layer chip 1.
In addition, as shown in Figure 1, in the present embodiment, in top layer substrate 101, be coated with the first interlayer dielectric layer 105, similarly, in intermediate layer substrate 201, be coated with the second dielectric layer 205, in bottom substrate 301, be coated with the 3rd dielectric layer 305.Each corresponding silicon through hole in each substrate also runs through the dielectric layer above substrate in running through substrate.And preferably, in the present embodiment, the top of P type silicon through hole 102 and the first metallic silicon through hole 103 is formed with pad 5 separately, in order to be connected to the positive pole/negative pole of power supply; Equally, preferably, the top of each silicon through hole in intermediate layer chip 2 and bottom chip 3 is also all formed with pad 5 separately, in addition, preferably, the bottom of all above-mentioned silicon through hole in intermediate layer chip 2 and top layer chip 1 is all formed with soldered ball separately, for welding with the respective pad 5 of the corresponding silicon via top of lower one deck chip.
As shown in Figure 1, in the present embodiment, preferably, top layer chip 1 also comprises that the 5th metallic silicon through hole 104, the five metallic silicon through holes 104 that run through top layer substrate 101 are for connection of electronic devices 204.Thereby electronic device 204 can be connected to by the 5th metallic silicon through hole 104 other extraneous elements etc. on the surface of top layer chip 1.Similarly, preferably, the 5th metallic silicon through hole 104 tops are also formed with pad 5, for the welding of extraneous other elements, and the 5th metallic silicon through hole 104 bottoms are also formed with soldered ball, for being connected of electronic device 204.In the present embodiment, electronic device 204 is formed in the intermediate layer substrate 201 of intermediate layer chip 2, and be connected to the pad 5 of intermediate layer substrate 201 top relative set by running through the contact hole of the second dielectric layer 205, this pad 5 is connected to the soldered ball of the 5th metallic silicon through hole 104 bottoms, thereby makes electronic device 204 be connected to the 5th metallic silicon through hole 104.
In addition, thermoelectric radiating device preferably includes P type silicon through hole 102, the second metallic silicon through hole 202 and the N-type silicon through hole 302 that many groups connect in turn, to make further to increase the size of PN junction type silicon through hole, and then further increase the amount of flow of hole, electronics, improve conductivity E, thereby further improved cooling effect.As shown in Figure 1, in the present embodiment, thermoelectric radiating device comprises two groups of P type silicon through hole 102, the second metallic silicon through hole 202 and N-type silicon through holes 302 of connecting in turn, be appreciated that, in practice, according to concrete structure and the size of thermoelectric radiating device, electronic device 204, the P type silicon through hole 102, the second metallic silicon through hole 202 and the N-type silicon through hole 302 that connect in turn of any applicable quantity can be set.
More preferably, P type silicon through hole 102, the second metallic silicon through hole 202 and N-type silicon through hole 302 that many groups connect in turn can be arranged around electronic device 204, with thus increasing heat radiation effect.
In addition, as shown in fig. 1, in the present embodiment, the bottom of bottom chip 3 is preferably provided with heavy distribution layer 304, and N-type silicon through hole 302 and the 4th metallic silicon through hole 303 are interconnected by heavy distribution layer.
And, as described above, the top of each silicon through hole is provided preferably with respective pad 5, and preferably, P type silicon through hole 102, the second metallic silicon through hole 202 and N-type silicon through hole 302 are connected by soldered ball in turn, and the first metallic silicon through hole 103, the 3rd metallic silicon through hole 203 are connected by soldered ball in turn with the 4th metallic silicon through hole 303.
In addition, preferably, the packing material of the first metallic silicon through hole 103, the second metallic silicon through hole 202, the 3rd metallic silicon through hole 203 and the 4th metallic silicon through hole 303 is copper.And preferably, the packing material of P type silicon through hole 102 and N-type silicon through hole 302 is bismuth telluride, Sb2Te3, Bi2Te3, PbTe, SiGe, crystal phonon glass or nano material.
The present invention is illustrated by above-described embodiment, but should be understood that, above-described embodiment is the object for giving an example and illustrating just, but not is intended to the present invention to be limited in described scope of embodiments.In addition it will be appreciated by persons skilled in the art that the present invention is not limited to above-described embodiment, can also make more kinds of variants and modifications according to instruction of the present invention, these variants and modifications all drop in the present invention's scope required for protection.Protection scope of the present invention is defined by the appended claims and equivalent scope thereof.
Claims (9)
1. a thermoelectric radiating device, is characterized in that, comprising:
Top layer chip, P type silicon through hole and the first metallic silicon through hole that it comprises top layer substrate and runs through described top layer substrate, described P type silicon through hole is for connecting the zero potential of power supply, and described the first metallic silicon through hole is for connecting the positive potential of described power supply;
Intermediate layer chip, its stacked described top layer chip bottom that is connected to, described intermediate layer chip comprises intermediate layer substrate and runs through the second metallic silicon through hole and the 3rd metallic silicon through hole of the substrate of described intermediate layer, in the chip of described intermediate layer, is formed with electronic device;
Bottom chip, its stacked chip bottom, described intermediate layer that is connected to, described bottom chip comprises bottom substrate and runs through N-type silicon through hole and the 4th metallic silicon through hole of described bottom substrate, and described N-type silicon through hole and the 4th metallic silicon through hole are interconnected in the bottom of described bottom chip
Wherein, described P type silicon through hole, described the second metallic silicon through hole and described N-type silicon through hole are connected in turn, and described the first metallic silicon through hole, described the 3rd metallic silicon through hole and described the 4th metallic silicon through hole are connected in turn.
2. thermoelectric radiating device according to claim 1, is characterized in that, described top layer chip also comprises the 5th metallic silicon through hole that runs through described top layer substrate, and described the 5th metallic silicon through hole is used for connecting described electronic device.
3. thermoelectric radiating device according to claim 1, is characterized in that, described thermoelectric radiating device comprises described P type silicon through hole, described the second metallic silicon through hole and the described N-type silicon through hole that many groups connect in turn.
4. thermoelectric radiating device according to claim 3, is characterized in that, P type silicon through hole, the second metallic silicon through hole and N-type silicon through hole that described many groups connect are in turn arranged around described electronic device.
5. thermoelectric radiating device according to claim 1, is characterized in that, the bottom of described bottom chip is provided with heavy distribution layer, and described N-type silicon through hole and the 4th metallic silicon through hole are interconnected by described heavy distribution layer.
6. thermoelectric radiating device according to claim 1, is characterized in that, the top of described silicon through hole is provided with pad.
7. thermoelectric radiating device according to claim 1, it is characterized in that, described P type silicon through hole, described the second metallic silicon through hole and described N-type silicon through hole are connected by soldered ball in turn, and described the first metallic silicon through hole, described the 3rd metallic silicon through hole and described the 4th metallic silicon through hole are connected by soldered ball in turn.
8. thermoelectric radiating device according to claim 1, is characterized in that, the packing material of described the first metallic silicon through hole, described the second metallic silicon through hole, described the 3rd metallic silicon through hole and described the 4th metallic silicon through hole is copper.
9. thermoelectric radiating device according to claim 1, is characterized in that, the packing material of described P type silicon through hole and described N-type silicon through hole is bismuth telluride, Sb2Te3, Bi2Te3, PbTe, SiGe, crystal phonon glass or nano material.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210422441.1A CN103794581B (en) | 2012-10-29 | 2012-10-29 | A kind of thermoelectric radiating device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210422441.1A CN103794581B (en) | 2012-10-29 | 2012-10-29 | A kind of thermoelectric radiating device |
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| CN103794581A true CN103794581A (en) | 2014-05-14 |
| CN103794581B CN103794581B (en) | 2016-12-21 |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9559283B2 (en) | 2015-03-30 | 2017-01-31 | International Business Machines Corporation | Integrated circuit cooling using embedded peltier micro-vias in substrate |
| US9941458B2 (en) | 2015-03-30 | 2018-04-10 | International Business Machines Corporation | Integrated circuit cooling using embedded peltier micro-vias in substrate |
| CN112368621A (en) * | 2018-04-12 | 2021-02-12 | 洛克利光子有限公司 | Electro-optic package and method of manufacture |
| US11551996B2 (en) | 2020-10-13 | 2023-01-10 | Samsung Electronics Co., Ltd. | Semiconductor chips and semiconductor packages including the same |
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| JP2005228915A (en) * | 2004-02-13 | 2005-08-25 | Toshiaki Eto | Separated peltier system |
| CN101764109A (en) * | 2008-12-22 | 2010-06-30 | 台湾积体电路制造股份有限公司 | Thermoelectric cooler for semiconductor devices with tsv |
| US20110140126A1 (en) * | 2009-12-10 | 2011-06-16 | Stephen Joseph Gaul | Heat conduction for chip stacks and 3-d circuits |
| CN102543911A (en) * | 2010-12-21 | 2012-07-04 | 财团法人工业技术研究院 | Semiconductor device with a plurality of semiconductor chips |
-
2012
- 2012-10-29 CN CN201210422441.1A patent/CN103794581B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005228915A (en) * | 2004-02-13 | 2005-08-25 | Toshiaki Eto | Separated peltier system |
| CN101764109A (en) * | 2008-12-22 | 2010-06-30 | 台湾积体电路制造股份有限公司 | Thermoelectric cooler for semiconductor devices with tsv |
| US20110140126A1 (en) * | 2009-12-10 | 2011-06-16 | Stephen Joseph Gaul | Heat conduction for chip stacks and 3-d circuits |
| CN102543911A (en) * | 2010-12-21 | 2012-07-04 | 财团法人工业技术研究院 | Semiconductor device with a plurality of semiconductor chips |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9559283B2 (en) | 2015-03-30 | 2017-01-31 | International Business Machines Corporation | Integrated circuit cooling using embedded peltier micro-vias in substrate |
| US9941458B2 (en) | 2015-03-30 | 2018-04-10 | International Business Machines Corporation | Integrated circuit cooling using embedded peltier micro-vias in substrate |
| CN112368621A (en) * | 2018-04-12 | 2021-02-12 | 洛克利光子有限公司 | Electro-optic package and method of manufacture |
| US11551996B2 (en) | 2020-10-13 | 2023-01-10 | Samsung Electronics Co., Ltd. | Semiconductor chips and semiconductor packages including the same |
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| CN103794581B (en) | 2016-12-21 |
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