CN103714030B - Method for detecting connection with interface, electronic device and control circuit - Google Patents

Abstract

The present invention provides a method for detecting connection with an interface, an electronic device, and a control circuit. The method comprises: issuing an instruction through the interface, receiving a plurality of bytes, the plurality of bytes being generated in response to the instruction through the interface; detecting the similarity of the received bytes to generate a detection result; and determining the connection with the interface at least based on the detection result. The electronic device comprises a first serial flash memory device, a second serial flash memory device, and a control circuit. The first serial flash memory device and the second serial flash memory device are of different types. The control circuit comprises an interface shared between the first serial flash memory device and the second serial flash memory device, the interface being used to communicate with one of the first and second serial flash memory devices. The method for detecting connection with an interface, the electronic device, and the control circuit provided by the present invention can support different types of serial flash memories to meet cost requirements and market flexibility.

Description

Method for detection and interface connection, electronic device and control circuit

technical field

Embodiments of the present invention relate to interface connection detection, and more particularly, to a method of detecting connection to an interface by detecting similarity of received bytes, and related circuits and electronic devices .

Background technique

Serial flash memory (serial flash) is widely used in various electronic products, such as personal computers and multimedia devices. Serial flash memory is a small-capacity and low-power flash memory using a serial interface, where the serial interface is typically a serial peripheral interface (Serial Periphery Interface, SPI), which is used for sequential data access . Because serial flash uses fewer external pins, fewer wires are required. When serial flash memory is applied to embedded (embedded) systems, due to the smaller die size, the cost of each die, integration cost and packaging cost can be reduced, as well as occupying a smaller PCB area and less Routing. Therefore, serial flash memory is a very popular storage method in embedded products to store code and file system, especially for mobile devices.

In order to meet various storage size, performance and overall product cost requirements, there are already different types of serial flash memory on the market, such as serial or non-flash memory (serial NOR flash, hereinafter referred to as "serial NOR flash memory") and serial and non-flash memory Flash memory (serial NAND flash, hereinafter referred to as "serial and non-flash memory"). If different types of serial flash memory are supported in a single chip (chip), the overall product cost can be further reduced. Different drivers may be required for accessing different types of serial flash, so first identify the type of serial flash being used (eg, at boot-up). Taking a mobile phone device as an example, the type of serial flash memory used needs to be correctly identified in the BootRom to load the boot code from the serial flash memory through the correct driver, where the BootRom has hard-coded (hard-coded) in The driver in the baseband chip. A traditional method is to use a baseband chip with a different BootRom. This method is simple but expensive. A more economical method is to differentiate different types of flash memory devices through bonding options. However, this approach lacks market flexibility because of the need to decide how many chips to manufacture with a particular bonding option.

Therefore, the industry urgently needs an interface connection solution to support different types of serial flash memory, so as to meet cost requirements and market flexibility.

Contents of the invention

In view of this, the present invention provides a method for detecting connection with an interface, a related control circuit and an electronic device.

A method of detecting a connection to an interface, comprising: issuing a command through the interface; receiving a plurality of bytes, wherein the plurality of bytes are generated in response to the command issued through the interface; detecting received The similarity of the plurality of bytes is used to generate a detection result; and at least based on the detection result, the connection with the interface is determined.

The present invention provides a control circuit, including: an interface; and a processing unit, coupled to the interface, the processing unit is used to issue an instruction through the interface, receive a plurality of bytes, and the plurality of bytes respond to the transparent generated by the instruction of the interface; detecting the similarity of the received bytes to generate a detection result; and determining the connection to the interface at least according to the detection result.

The present invention provides an electronic device, including: at least one serial flash memory device; and a control circuit, including an interface, the interface supports different types of serial electronic devices, and the control circuit is used to determine the type of at least one serial flash memory device and Communicate with the at least one serial flash memory device through the interface.

The detection and interface connection method, the electronic device and the control circuit provided by the present invention can support different types of serial flash memory, so as to meet cost requirements and market flexibility.

Description of drawings

FIG. 1 is a schematic block diagram of a control circuit included in an electronic device according to an embodiment of the present invention;

FIG. 2 is a schematic block diagram of a mobile device according to an embodiment of the present invention;

3 is a schematic diagram of a flash memory device identifier of the first 3 bytes of a serial NOR flash memory device according to an embodiment of the present invention;

FIG. 4 is a schematic diagram of a logic sequence of a serial NOR flash memory device;

5 is a schematic diagram of the first 2 bytes of a flash memory device identifier of a serial NAND flash memory device;

6 is a schematic diagram of a logic sequence of a serial NAND flash memory device;

FIG. 7 is a schematic flowchart of a method for detecting a connection with an interface according to an embodiment of the present invention;

Fig. 8 is a schematic flowchart of a method for detecting a connection with an interface according to another embodiment of the present invention;

Fig. 9 is a schematic flowchart of a method for detecting a connection with an interface according to another embodiment of the present invention;

10 is a schematic block diagram of an electronic device according to an embodiment of the present invention;

11 is a schematic block diagram of an electronic device according to an embodiment of the present invention;

12 is a schematic block diagram of an electronic device according to an embodiment of the present invention;

13 is a schematic block diagram of an electronic device according to an embodiment of the present invention;

detailed description

In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in further detail below in conjunction with the embodiments and accompanying drawings. Here, the exemplary embodiments and descriptions of the present invention are used to explain the present invention, but not to limit the present invention. The terms "component", "system", and device used in this application may refer to a computer-related entity, which may be hardware, a combination of hardware and software, or software. Certain terms are used in the description and claims to refer to particular components. Those skilled in the art should understand that manufacturers may use different terms to refer to the same component. The specification and claims do not use the difference in name as a way to distinguish components, but use the difference in function of components as a criterion for distinguishing. "Include" and "comprising" mentioned throughout the specification and claims are open-ended terms, so they should be interpreted as "including but not limited to". In addition, the term "coupled" herein includes any direct and indirect means of electrical connection. Indirect means of electrical connection includes connection through other means.

Please refer to FIG. 1 , which is a schematic block diagram of a control circuit 110 included in an electronic device 100 according to an embodiment of the present invention. The electronic device 100 can use a single interface to support or connect different types of electronic devices (eg, different types of serial flash memory devices). In this embodiment, the control circuit 110 may include but not limited to a processing unit 120 and an interface 130 . The processing unit 120 is coupled to the interface 130, and is used to issue an instruction (instruction, IR for short) through the interface 130, and receive a plurality of bytes B[0]-B[i], the plurality of bytes B[0] - B[i] is generated in response to an instruction IR via the interface 130, detects the similarity of the received bytes B[0]-B[i] to generate a detection result, and decides whether to connect to the interface 130 at least based on the detection result , where i is a positive integer. In practice, the processing unit 120 can determine whether the interface 130 is connected to a specific electronic device by referring to the received bytes B[0]-B[i] to determine the connection with the interface 130 . In addition to determining whether the interface 130 is connected to any specific electronic device, the processing unit 120 can further determine the specific electronic device connected to the interface 130 by comparing the received bytes B[0]-B[i] with a predetermined data pattern (pattern). The type of device. In addition, the processing unit 120 may be realized using a pure hardware device or a processor executing a software program.

In short, the basic concept of the present invention is to determine whether to connect to the interface of the electronic device according to the characteristics of the bytes received by the electronic device. From the description of this application, those skilled in the art refer to the serial flash interface (or SPI) and related electronic devices connected to the serial flash device. Those skilled in the art can understand that, however, the concepts described in this application are not limited to the above-mentioned types, and can also be applied to other types of interfaces, as long as the electronic device can issue commands (for example, read READ commands) through the interface Receiving bytes through the interface falls within the protection scope of the present application.

Please refer to FIG. 2 , which is a block diagram of a mobile device 200 according to an embodiment of the present invention. For example, the mobile device 200 can be a mobile phone. In one embodiment, the mobile device 200 may include, but is not limited to, a mobile device chip 210 as well as a PCB 240 and a serial flash memory device 250 . The mobile device chip 210 may include, but is not limited to, a processing unit 220 and a serial flash memory interface 230 . Please note that the mobile device 200 may be an implementation of the electronic device 100 shown in FIG. 1 , the mobile device chip may be an implementation of the control circuit 110 shown in FIG. 1 , and the processing unit 220 may be the processing unit shown in FIG. 1 120, serial flash interface 230 may be an implementation of interface 130 shown in FIG. 1, and serial flash device 250 may be an implementation of the aforementioned particular electronic device. In one example design, mobile device chip 210 may also be implemented as a baseband chip of mobile device 200 (eg, a mobile phone), and processing unit 220 may be implemented as a circuit or BootROm driver of the baseband chip. The serial flash memory interface 230 may be implemented as SPI or related interfaces, such as dual-SPI (Dual-SPI), quad-SPI (Quad-SPI) or (Quad Peripheral Interface, QPI). Those skilled in the art can understand the meaning of multiple signal lines SCK (serial clock), CS (chip select), SI (serial input), SO (serial output), WP (write) and HOLD (hold) , which will not be repeated here for the sake of brevity.

Similarly, the processing unit 220 can be used to issue an instruction IR through the interface 230 . After the serial flash memory device 250 receives the command IR from the signal line SI, a plurality of bytes B[0]-B[i] can be generated in response to the command IR, and sent to the serial flash memory interface 230 through the signal line SO, where i is a positive integer. Then, the processing unit 220 can receive the bytes B[0]-B[i] through the serial flash interface 230, and start to detect the similarity of the received bytes B[0]-B[i] to determine whether to connect to Whether the electronic device of the serial interface (ie, the serial flash memory device 250 ) is a serial flash memory device. When determining that the electronic device (i.e., the serial flash memory device 250) is a serial flash memory device, the processing unit 220 may further identify the type of the serial flash memory device 250, and communicate with the serial flash memory device according to the identified type of the serial flash memory device 250. 250 for communication. In other words, the serial flash interface 230 can be configured to support different types of serial flash devices. Further details of interface connection detection are described below.

Please refer to FIG. 3 and FIG. 4 in conjunction with FIG. 2 . FIG. 3 is a schematic diagram of the first three bytes of a flash device identifier (flash device ID) of a serial NOR flash device according to an embodiment of the present invention, and FIG. 4 is a schematic diagram of a logic sequence of a serial NOR flash device. As shown in FIG. 3 , the first three bytes of the flash memory device ID are composed of a one-byte manufacturer ID (manufacture ID, hereinafter referred to as manufacturer ID) and a two-byte device identifier (device ID). One byte of the device ID represents the memory type of the serial NOR flash device, and another byte of the device ID represents the memory capacity of the serial NOR flash device. In this embodiment, the hexadecimal value '20h' of the vendor ID is just an example and cannot be used to limit the protection scope of the present invention. Similarly, the hexadecimal value 'BBh' (corresponding to the memory type) and the hexadecimal value '16h' (corresponding to the memory capacity) do not constitute a limitation of the present invention. It should be noted that the manufacturer ID and the device ID of the serial NOR flash memory device may not be the hexadecimal value '00' or the hexadecimal value 'FF'.

As shown in FIG. 4 , when the serial flash memory device 250 is a serial NOR flash memory device, the serial flash memory device 250 can receive an instruction IR (for example, a READ instruction) through the signal line SI. After the command IR (eg, READ command) is shifted into the serial flash device 250, the flash device ID of the serial flash device 250 (eg, the serial NOR flash device in this embodiment) can be shifted out immediately. More specifically, bytes B[0]-B[i] may be received by processing unit 220 immediately after instruction IR is sent, and byte B[0] is between other bytes B[1]-B[i] Received, the other bytes B[1]-B[i] represent the vendor ID of the serial flash device 250, and bytes B[1] and B[2] represent the device ID of the serial flash device 250. In addition, the values '15'-'0' of the device ID (ie, bytes B[1] and B[2]) represent 16 bits, where the bit corresponding to the value '15' represents the most significant bit of the device ID (Most Significant Bit, MSB). Please note that the number of bytes of the flash device ID of the serial NOR flash memory is not limited to 3.

Please refer to FIG. 5 and FIG. 6 in conjunction with FIG. 2 . FIG. 5 is a schematic diagram of the first two bytes of a flash memory device ID of a serial NAND flash memory device according to an embodiment of the present invention, and FIG. 6 is a schematic diagram of a logic sequence of a serial NAND flash memory device. As shown in FIG. 5 , the first two bytes of the flash memory device ID of the serial flash memory device include a one-byte manufacturer ID and a one-byte device ID. In this embodiment, each of the hexadecimal value '2Ch' (corresponding to the manufacturer ID) and the hexadecimal value '12h' (corresponding to the device ID) is used for illustration and is not used to limit the protection scope of the present invention. It should be noted that the vendor ID and any type of device ID of the serial NAND flash memory device may not be the hexadecimal value '00' or the hexadecimal value 'FF'.

As shown in FIG. 6 , if the serial flash memory device 250 is a serial NAND flash memory device, the serial flash memory device 250 may receive an instruction IR (for example, a READ instruction) through the signal line SI. After the instruction IR (for example, read READ command) is moved into the serial flash memory device 250 and the dummy bytes are sent by the processing unit 220 (the processing unit 220 can actually do nothing), the serial flash memory device 250 The flash device ID (such as the serial flash device in this embodiment) can be removed immediately, waiting to be sent. More specifically, bytes B[0]-B[i] may be received by processing unit 220 immediately after instruction IR and dummy bytes are received, wherein byte B[1] indicates the manufacturer of serial flash memory device 250 ID, byte B[2] represents the device ID of the serial flash memory device 250, and byte B[0] corresponds to a virtual byte, wherein byte B[0] is between byte B[1] and B[2] The previously received, and data pattern of byte B[0] may contain multiple bits, each bit having the same binary value (eg, hexadecimal value '00' or 'FF'). Note that serial flash device 250 may not output any bytes when dummy bytes are sent, so the data pattern for byte B[0] may depend on the default driver settings for the serial The output signal of row flash memory device 250. In addition, the dummy byte can be generated by pulling down the level of the signal (i.e., the bit value '0' of the dummy byte shown in Fig. becomes high-impedance state) generated. For example, the value '7'-'0' of the device ID (ie, byte B[2])) represents having 8 bits, wherein the bit corresponding to the value '7' represents the MSB of the device ID. Please note that the byte data of the type of flash memory device of the serial NAND flash memory device is not limited thereto.

As mentioned above, the vendor ID of a serial NOR/NAND flash device and any byte of the device ID may not be equal to the hexadecimal value '00' or 'FF', and the mobile device chip shown in Figure 2 receives the flash device ID Previously, serial NAND flash devices could read virtual bytes. Therefore, when the serial flash memory device 250 shown in FIG. 2 is a serial NAND flash memory device, the first 3 bytes received by the processing unit 220 shown in FIG. The vendor ID and the device ID shown in FIG. 6 ) are not equal to each other. Furthermore, the vendor ID is not equal to the device ID in all current serial NOR flash devices. Therefore, in the case of a serial NOR flash memory device, the serial flash memory device 250 shown in FIG. not equal. In short, by detecting the similarity of the received bytes, the processing unit 220 can determine whether the serial flash interface 230 is connected to a serial flash device.

More specifically, when determining that the serial flash interface is connected to the serial flash device, a specific byte among the received bytes may be compared with a predetermined data pattern to determine the type of the serial flash device. Please refer to Figure 2, Figure 4 and Figure 6 again. When the serial flash memory device 250 is a serial NAND flash memory device, the byte received before other received bytes (ie, byte B[0]) has a data pattern of '00' or 'FF'. When the serial flash device 250 is a serial NOR flash device, however, the byte received before the other bytes (i.e., byte B[0]) represents the vendor ID, where the vendor ID is not equal to the data pattern' 00' and 'FF'. Therefore, the type of the serial flash memory device 250 can be determined according to a specific byte among the received bytes B[0]-B[i] (ie, byte B[0]). In short, the differences in flash device ID format and read behavior between serial NOR flash devices and serial NAND flash devices can be exploited to detect/identify connections to interfaces.

Please refer to FIG. 7 , which is a schematic flowchart of a method for detecting a connection with an interface according to an embodiment of the present invention. The method can be implemented by the control circuit 110 of FIG. 1 and executed by the mobile device chip 210 of FIG. 2 . The method can be summarized simply as:

Step 700: start;

Step 710: issue an instruction through the interface;

Step 720: Receive a plurality of bytes generated in response to commands through the interface;

Step 725: Detect the similarity of the received bytes to generate a detection result;

Step 730: Determine whether the received bytes are identical to each other. If the detection result indicates that the received bytes are identical to each other, then go to step 740 . If the detection result indicates that the received bytes are different from each other, then go to step 750 .

Step 740: Determine that the interface is not connected to a specific electronic device;

Step 750: Determine that the interface has been connected to the specific electronic device;

Steps 700-750 can be implemented by the processing unit 120/220 in FIG. 1/FIG. 2, wherein the processing unit 120/220 can use a pure hardware device (for example, a circuit) or a processor that executes a software program (for example, a driver) Implementations, and specific electronic devices may be serial flash memory devices. Those skilled in the art can understand the operation of the method in FIG. 7 after reading the above descriptions about FIG. 1-FIG. 6 , and the details will not be repeated here.

After determining that the interface is connected to a specific electronic device, the control circuit shown in FIG. 1 and the mobile device chip 210 shown in FIG. 2 can further determine the type of the connected specific electronic device. Please refer to FIG. 8 , which is a schematic flowchart of a method for detecting interface connections according to another embodiment of the present invention. The method shown in FIG. 8 is based on the steps of the method described in FIG. 7 , the difference is that FIG. 8 further includes a step of determining a specific electronic device type. The method is briefly summarized as follows:

Step 700: start.

Step 710: issue an instruction through the interface;

Step 720: Receive bytes generated in response to commands via the interface.

Step 725: Detect the similarity of the received bytes to generate a detection result.

Step 830: Determine if the received bytes are identical to each other. If the detection result indicates that the received word bytes are identical to each other, then go to step 740 . If the detection result indicates that the received bytes are different from each other, then go to step 851 .

Step 740: Determine that the interface is not connected to the specific electronic device.

Step 851: Compare a specific byte of the received bytes with a predetermined pattern to generate a comparison result.

Step 852: Determine if the specific byte is the same as a predetermined data pattern. If the comparison indicates that the particular byte is the same as the predetermined data pattern, then go to step 854 . If the result of the comparison indicates that the particular byte is not the same as the predetermined data pattern, then go to step 856 .

Step 854: Determine that the specific electronic device has the first type.

Step 856: Determine that the specific electronic device has the second type.

Steps 700-856 can be performed by the processing unit 120/220 shown in FIG. 1/FIG. 2, wherein the processing unit 120/220 can use a pure hardware device (such as a circuit) or a processor that executes a software program (such as a driver) realized. Also, certain bytes can be received before other bytes are received. The predetermined data pattern may include a plurality of bits, and each bit has the same binary value. The first type of specific electronic device may be a serial NAND flash memory device, and the second type of specific electronic device may be a serial NOR flash memory device. The field A skilled person can understand the operation of FIG. 8 after reading the descriptions of FIG. 1-FIG.

In an alternative design, the steps of determining a particular electronic device to connect to the interface and the steps of determining the particular type of electronic device connected to the interface may be performed in parallel. Please refer to FIG. 9 , which is a flowchart of a method for detecting interface connections according to another embodiment of the present invention. The method shown in FIG. 9 is based on the steps shown in FIG. 7 , the difference is that FIG. 9 includes a step of determining a specific electronic device type. The method can be briefly summarized as follows:

Step 700: start.

Step 710: issue an instruction through the interface;

Step 720: Receive a plurality of bytes generated in response to commands through the interface;

Step 960: Detect the similarity of the received bytes to generate a detection result;

Step 970: Compare a specific byte of the received bytes with a predetermined data pattern to generate a comparison result.

Step 980: Refer to the detection result to determine whether the interface is connected to the specific electronic device, and refer to the comparison result to determine the type of the specific electronic device connected to the interface.

Steps 700-980 can be performed by the processing unit 120/220 shown in FIG. 1/FIG. 2, wherein the processing unit 120/220 can use pure hardware (for example, a circuit) or execute a software program (for example, a driver) for processing implemented by the device. In one implementation, the comparison result may be discarded when the detection result indicates that the interface is not connected to the particular electronic device. Those skilled in the art can understand the operation of the method shown in FIG. 9 by reading the descriptions of FIGS.

The methods shown in FIGS. 7-9 can be implemented by electronic devices to communicate with different specific electronic devices. Please refer to FIG. 10 , which is a schematic block diagram of an electronic device 1000 according to an embodiment of the present invention. The electronic device 1000 may include but not limited to a control circuit 1010 , a PCB 1040 , a first serial flash memory device 1052 and a second serial flash memory device 1054 . To illustrate, but not to limit the present invention, the electronic device 1000 can be implemented as a mobile device (for example, a mobile phone), the control circuit 1010 can be implemented as a mobile device chip, and the first serial flash memory device 1052 can be implemented as a serial The NOR flash memory device, the second serial flash memory device 1054 may be implemented as a serial NAND flash memory device. As shown in FIG. 10, the control circuit 1010 may include an interface (i.e., serial flash interface 1030 in this embodiment) that may be shared between the first serial flash device 1052 and the second serial flash device 1054, and It can be used to communicate with one of the first serial flash memory device 1052 and the second serial flash memory device 1054 through the serial flash memory interface 1030 . In addition, 6 signal lines connected between the control circuit 1010 and the circuit board (ie, PCB 1040 ) are used to transmit signals on the signal lines SCK, CS, SI, SO, WP, and HOLD.

In one implementation, the electronic device 1000 may include a selection unit 1060 coupled to the serial flash memory interface 1030 . As shown in FIG. 10, the selection unit 1060 may be included in the control circuit 1010, and is used to selectively couple the serial flash interface 1030 to one of the first serial flash memory device 1052 and the second serial flash memory device 1054. . In practice, the selection unit 1060 may be implemented by a multiplexer, an arbiter or other types of selection units. Please note that only a single circuit board (eg PCB 1040 ) needs to have both the first serial flash device 1052 and the second serial flash device 1054 . Therefore, consumers do not need to use specific PCBs for different types of serial flash memory devices.

The number of serial flash memory devices placed on the PCB 1040 in FIG. 10 is not limited to that shown in the embodiment of the present invention. Please refer to FIG. 11 , which is a block diagram of an electronic device 1100 according to an embodiment of the present invention. The architecture of the electronic device 1100 is based on the architecture of the electronic device 1000, except that only one serial flash memory device 1150 is placed on the PCB 1140, wherein the serial flash memory device 1150 can be one of a serial NOR flash memory device and a serial NAND flash memory device. A default connection may be established between serial flash interface 1030 and serial flash device 1150 in one implementation. Note that selection unit 1060 is optional and can be omitted.

In short, the methods shown in FIGS. 7-9 can be implemented by an electronic device, wherein the electronic device can include at least one serial flash memory device and a control circuit with an interface, wherein the interface supports different types of serial flash memory devices. The control circuit can be used to determine the type of the at least one serial flash memory device, and communicate with the at least one serial flash memory device through the interface. In addition, the at least one serial flash device may include different types of serial flash devices, and the interface is shared between different types of serial flash devices. In one implementation, the at least one serial flash device may include at least one of a serial NOR flash device and a serial NAND flash device.

The structure of the selection unit 1060 in the electronic device 1000/1100 is just an example, and is not intended to limit the protection scope of the present invention. Please refer to FIG. 12 , which is a block diagram of an electronic device 1200 according to an embodiment of the present invention. The structure of the electronic device 1200 is based on the electronic device 1000 shown in FIG. 10, and the difference is that the selection unit 1260 of FIG. A first serial flash memory device 1052 and a second serial flash memory device 1054 are provided. In addition, 6 wires connected between the control circuit 1210 and the circuit board (ie, PCB 1240 ) are used to transmit signals for the serial flash memory device. Similarly, the selection unit 1260 shown in FIG. 12 may not be included in the control circuit 1210 . Please refer to FIG. 13 , which is a schematic block diagram of an electronic device 1300 according to an embodiment of the present invention. The architecture of the electronic device 1300 in FIG. 13 is based on the architecture of the electronic device 1100 shown in FIG. 11 , the difference is that the selection unit 1360 shown in FIG. 13 is not included in the control circuit 1310, but placed on the circuit board (ie, PCB1340). , wherein a serial flash memory device 1150 is installed on the circuit board.

In summary, different types of serial flash memory devices can be detected/determined using the method and device of the embodiment of the present application, but there is no need for different baseband chips, different specific PCBs, bonding options or other hard-wired method. Furthermore, the method/apparatus proposed in this application is applicable to all communication protocols on serial flash memory devices.

Those skilled in the art can modify and alter the embodiments of the present invention after reading the description, as long as they do not deviate from the spirit of the present invention, all are within the protection scope of the present invention. The protection scope of the present invention is not limited by the embodiments, but shall be determined by the content of the claims.

Claims (12)

1. a kind of detect the method being connected with an interface, comprising：

An instruction is sent through the interface；

Multiple bytes are received, wherein, the plurality of byte response is produced through the instruction that the interface is sent；

The similitude of the plurality of byte received is detected to produce testing result；

The specified byte of the plurality of byte received and tentation data template are compared to produce comparative result；And

According to the testing result and the comparative result, decision is connected with this of the interface, wherein, decision is connected with this of the interface The step of include：With reference to the testing result to decide whether that the interface is connected to specific electronic devices；And compare knot with reference to this Really with the type for the specific electronic devices for determining to be connected to the interface, wherein, if the testing result indicates what is received The plurality of byte is mutually the same, then determines that the interface is not attached to the specific electronic devices；Else if the testing result is indicated Go out the plurality of byte received differing from each other, then determine that the interface is connected to the specific electronic devices.

2. the method as described in claim 1, it is characterised in that the specific electronic devices are serial flash memory device.

3. the method as described in claim 1, it is characterised in that the specified byte is received before other have received byte Arrive.

4. the method as described in claim 1, it is characterised in that the tentation data template includes multiple bits, the plurality of bit Each there are identical binary values.

5. the method as described in claim 1, it is characterised in that with reference to the comparative result to determine to be connected to the spy of the interface The step of type for determining electronic installation, includes：

When the comparative result indicates that the specified byte is identical with the tentation data template, determine that the specific electronic devices have the One type；And

When the comparative result indicates that the specified byte is differed with the tentation data template, determine that the specific electronic devices have Second Type.

6. method as claimed in claim 5, it is characterised in that the specific electronic devices of the first kind are serially dodged for one with non- Cryopreservation device, and the specific electronic devices of the Second Type are serial or non-flash device.

7. one kind control circuit, comprising：

Interface；And

Processing unit, is coupled to the interface, and the processing unit is used to send an instruction through the interface, receives multiple bytes, should Multiple byte responses are produced through the instruction of the interface；The similitude of the plurality of byte received is detected to produce inspection Survey result；The specified byte of the plurality of byte received and tentation data template are compared to produce comparative result；With And the connection with the interface is determined according to the testing result and the comparative result, wherein, determine the step being connected with the interface Suddenly include：With reference to the testing result to decide whether that the interface is connected to specific electronic devices；And with reference to the comparative result with Determine to be connected to the type of the specific electronic devices of the interface, wherein, if to indicate this that received more for the testing result Individual byte is mutually the same, then determines that the interface is not attached to the specific electronic devices；Else if the testing result is indicated The plurality of byte received is differing from each other, then determines that the interface is connected to the specific electronic devices.

8. circuit is controlled as claimed in claim 7, it is characterised in that the specific electronic devices are serial flash memory device.

9. circuit is controlled as claimed in claim 7, it is characterised in that the specified byte is connect before other have received byte Receive.

10. circuit is controlled as claimed in claim 7, it is characterised in that the tentation data template includes multiple bits, the plurality of The each of bit has identical binary values.

11. circuit is controlled as claimed in claim 7, it is characterised in that when the comparative result indicates the specified byte with being somebody's turn to do When tentation data template is identical, the processing unit determines that the specific electronic devices have the first kind, and when the comparative result When indicating that the specified byte is differed with the tentation data template, the processing unit determines that the specific electronic devices have Equations of The Second Kind Type.

12. as claimed in claim 11 control circuit, it is characterised in that the first kind specific electronic devices be one serially with Non-flash device, and the Second Type specific electronic devices are serial or non-flash device.