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CN103699046A - Universal wiring switch box for island type FPGA (Field Programmable Gate Array) - Google Patents

Universal wiring switch box for island type FPGA (Field Programmable Gate Array) Download PDF

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Publication number
CN103699046A
CN103699046A CN201310581127.2A CN201310581127A CN103699046A CN 103699046 A CN103699046 A CN 103699046A CN 201310581127 A CN201310581127 A CN 201310581127A CN 103699046 A CN103699046 A CN 103699046A
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China
Prior art keywords
switch box
type fpga
island type
wiring
island
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王友仁
汪金林
张砦
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Nanjing University of Aeronautics and Astronautics
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Nanjing University of Aeronautics and Astronautics
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Abstract

本发明公开了一种岛型FPGA的通用布线开关盒。本发明的岛型FPGA的通用布线开关盒采用了八边形的结构设计,其内部是由导线及可编程连接开关构成的不同的布线拓扑结构组成,可编程连接开关采用SRAM单元控制传输管实现,根据岛型FPGA通用布线开关盒八个方向上连接对象的不同,通过配置岛型FPGA通用布线开关盒内不同拓扑结构上的可编程连接开关,可以实现线网之间、可配置逻辑单元之间以及线网与可配置逻辑单元之间的互连。本发明设计的岛型FPGA的通用布线开关盒,降低了布线资源消耗,提高了岛型FPGA布线的灵活性及布通率。

Figure 201310581127

The invention discloses a general wiring switch box of an island type FPGA. The general wiring switch box of the island type FPGA of the present invention adopts an octagonal structural design, and its interior is composed of different wiring topology structures composed of wires and programmable connection switches. The programmable connection switch is realized by controlling the transmission tube of the SRAM unit , according to the different connection objects in the eight directions of the island-type FPGA general-purpose wiring switch box, by configuring the programmable connection switches on different topological structures in the island-type FPGA general-purpose wiring switch box, it is possible to realize the connection between the line network and the configurable logic unit. Interconnection between nets and configurable logic cells. The island-type FPGA general wiring switch box designed by the invention reduces the consumption of wiring resources, and improves the flexibility and routing rate of the island-type FPGA wiring.

Figure 201310581127

Description

The general Routing Switch box of island type FPGA
Technical field
The present invention relates to the general Routing Switch box of a kind of island type FPGA.
Background technology
Current field programmable gate array (field programmable gate array, FPGA) with lower non-repeatability (non-recurring engineering, NRE) expense and design verification expense, and Time To Market is short etc., and advantage obtains a wide range of applications.FPGA flexibly wire structures able to programme is one of reason of FPGA dirigibility, and according to the wire structures of FPGA, commercial FPGA can be divided into three kinds.Xilinx, Lucent, the FPGA of Vantis is island type structure, and the FPGA of Actel based on row, the FPGA of Altera is stratification.General Routing Switch box of the present invention is mainly for island type FPGA structure.
Although FPGA has reconstruction property flexibly, the dirigibility of FPGA is what to take the time delay sacrifice of the most of interconnection structure of ample resources and forming circuit be cost.The island type FPGA of take is example, the wire structures of traditional island type FPGA adopts substantially based on connecting box (connection block, CB) and switch enclosure (switch block, SB) structural model, configurable logic cell (configurable logic block, CLB) by the connecting valve realization able to programme of configuration connecting box and communicating by letter of gauze, between gauze, by the connecting valve able to programme of deploy switch box, realize the communication of various wirings passage.By this wire structures model, adjacent configurable logic cell need to be realized and being communicated by letter by the connecting valve able to programme of configuration connecting box and switch enclosure, the time delay of wiring increases and wiring very flexible, and a large amount of wiring connecting boxes and switch enclosure have also occupied the very most area resource of FPGA.
In order to reduce the area of interconnection resource, take, improve wiring dirigibility and reduce wiring time delay, the present invention improves the wire structures of island type FPGA based on connecting box-switch enclosure, proposes the general Routing Switch box of a kind of island type FPGA.
Summary of the invention
The general Routing Switch box that the object of this invention is to provide a kind of island type FPGA, it has Route topology structure flexibly, solves the wiring time delay length, the area that based on connecting box-switchbox routing structure, exist at present and takies the problems such as large.
The general Routing Switch box technical scheme of island type FPGA of the present invention is:
General Routing Switch box towards island type FPGA of the present invention adopts octagonal structure, its east, south, west, north four direction is directly connected with the wiring gauze of island type FPGA, is provided with directly and the interconnecting channel of programmable logic cells on this external eight-sided formation northwest, northeast, the southeast, southwestern four direction.According to different wiring needs, the general Routing Switch box indoor design of island type FPGA different line topological structures, the interconnect resource of FPGA is divided into interconnection and three classes of the interconnection between configurable logic cell between interconnection, gauze and the configurable logic cell between wiring gauze, interconnection between described gauze realizes by long and short line, long line is directly by general Routing Switch box, and short-term interconnects with equidirectional long line by connecting valve able to programme and the short-term realized in direction corresponding thereto by long line is communicated by letter.
Further, in described gauze and the interconnection between configurable logic cell, configurable logic cell is realized with the gauze on both direction corresponding thereto and being communicated by letter by the connecting valve able to programme in universal switch box.
Further, in interconnection between described configurable logic cell, for the dirigibility of connecting up between the communication delay between minimizing configurable logic cell, increase configurable logic cell, in universal switch box, designed the rhombus topological structure of connecting valve able to programme.Up and down, the adjacent configurable logic cell in left and right is realized programmable interconnect by the transfer tube on rhombus limit; In oblique 45 ° of directions, adjacent configurable logic cell is realized programmable interconnect by the transfer tube on rhombus diagonal line.
Connection-switch enclosure interconnect architecture that the general Routing Switch box of island type FPGA of the present invention is compared current island type FPGA has higher wiring dirigibility, and area takies still less.In general Routing Switch box, the design of programmable logic cells rhombus internet topology has reduced the interconnect delay between programmable logic cells, and then has improved the performance of FPGA.
Accompanying drawing explanation
Fig. 1 is general Routing Switch box of the present invention;
Fig. 2 be in the present invention based on general Routing Switch He island type FPGA structure.
Embodiment
Below in conjunction with accompanying drawing, technical scheme of the present invention is described further:
As shown in Figure 1, type FPGA general Routing Switch box in embodiment of the present invention Zhong island adopts eight-sided formation, its east (E), south (S), west (W), north (N) four direction is and wiring being connected of gauze, in wiring gauze, there are short-term and two kinds of wiring channels of long line, its middle or long line is directly through general Routing Switch box, the general Routing Switch box of type FPGA northwest, island, northeast, the southeast, southwest four direction is provided with the interconnection line of directly communicating by letter with programmable logic cells, the different Route topology structure that the general Routing Switch box of type FPGA inside, island consists of wire and connecting valve able to programme forms.As shown in Figure 1, wherein (E1, E3, E4), (S1, S3, S4), (W1, W3, W4), (N1, N3, N4) are respectively the wiring gauze short-term connecting on the island type FPGA outside east of general Routing Switch box (E), south (S), west (W), north (N) four direction, E2-W2, S2-N2 are respectively through the thing of the wiring gauze of the general Routing Switch box of island type FPGA, the long line in North and South direction, C1, C2, C3, C4 be respectively the general Routing Switch box of island type FPGA on northwest, northeast, the southeast, southwestern four direction with the interconnection line of programmable logic cells.Interconnection in relative direction between short-term is (as W4 short-term can be realized and the communication connection of E3 short-term by the connecting valve able to programme on the long line of configuration W2-E2) by configuring that connecting valve able to programme between equidirectional upper short-term and long line realizes, programmable logic cells can be realized locational short-term lane interconnect corresponding thereto by configurating programmable connecting valve and (as the programmable logic cells of C1 connection can pass through connecting valve able to programme, realize and short-term S1, the communication of E1), and it is adjacent, programmable logic cells on relative position can be realized communication (as the programmable logic cells that C1 connects can be by connecting valve able to programme and C2 on rhombus topological structure limit in the general Routing Switch box of configuration island type FPGA and on diagonal line by the connecting valve able to programme of rhombus topological structure in the general Routing Switch box of configuration island type FPGA, C4, the programmable logic cells communication that C3 connects).
As shown in Figure 2, for based on general Routing Switch Kuai island type FPGA structural drawing, the general Routing Switch box that wherein wiring of FPGA is introduced by Fig. 1 is realized.

Claims (4)

1.一种岛型FPGA的通用布线开关盒,其特征在于,该岛型FPGA的通用布线开关盒采用八边形的结构设计,其内部是由导线及可编程连接开关构成的不同的布线拓扑结构组成,岛型FPGA的通用布线开关盒外部直接与线网、可编程逻辑单元互连,内部通过不同布线拓扑结构上的可编程连接开关实现线网之间、可配置逻辑单元之间以及线网与可配置逻辑单元之间的通信。1. A general wiring switch box of island type FPGA, it is characterized in that, the general wiring switch box of this island type FPGA adopts octagonal structure design, and its inside is the different wiring topology that is formed by wire and programmable connection switch Structural composition, the general wiring switch box of the island type FPGA is directly connected to the wire network and the programmable logic unit externally, and the programmable connection switch on the internal wiring topology realizes the connection between the wire network, the configurable logic unit and the wire network. Communication between nets and configurable logic units. 2.如权利要求1所述的岛型FPGA的通用布线开关盒,其特征在于,所述的线网间的连接是通过长连线和短连线实现的,长连线直接穿过岛型FPGA的通用布线开关盒,相对方向的短连线通过与长连线的可编程互连实现通信。2. the universal wiring switch box of island type FPGA as claimed in claim 1, is characterized in that, the connection between described net is realized by long connection line and short connection line, and long connection line directly passes through island type A general-purpose routing switch box for FPGAs, where short wires in opposite directions communicate through programmable interconnects with long wires. 3.如权利要求1所述的岛型FPGA的通用布线开关盒,其特征在于,所述的可配置逻辑单元之间的互连采用菱形拓扑结构,通过配置菱形边或对角线上的可编程连接开关,可以实现可配置逻辑单元之间的通信。3. the general wiring switch box of island type FPGA as claimed in claim 1, is characterized in that, the interconnection between described configurable logic unit adopts rhombus topological structure, by configuring the configurable rhombus side or on the diagonal Programmable link switches that enable communication between configurable logic cells. 4.如权利要求1所述的岛型FPGA的通用布线开关盒,其特征在于,所述的线网与可配置逻辑单元之间的互连中,可配置逻辑单元通过可编程连接开关与与其相对的两个方向的短连线互连。4. The general wiring switch box of island type FPGA as claimed in claim 1, is characterized in that, in the interconnection between described net and configurable logic unit, configurable logic unit is connected with it by programmable connection switch Short wires in opposite directions are interconnected.
CN201310581127.2A 2013-11-14 2013-11-14 Universal wiring switch box for island type FPGA (Field Programmable Gate Array) Pending CN103699046A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112731823A (en) * 2019-10-28 2021-04-30 深圳市国微电子有限公司 FPGA interconnection line circuit and FPGA interconnection line delay reduction method
CN114297976A (en) * 2021-12-30 2022-04-08 北京中科睿芯科技集团有限公司 Automatic wiring method and system for pulse logic circuit

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020174411A1 (en) * 2001-03-27 2002-11-21 Wenyi Feng Programming programmable logic devices using hidden switches
CN1776693A (en) * 2005-12-01 2006-05-24 复旦大学 General Field Programmable Gate Array Placement and Routing Model
CN101179271A (en) * 2007-11-30 2008-05-14 电子科技大学 An FPGA structure
CN101888240A (en) * 2009-05-11 2010-11-17 复旦大学 A General Interconnect Box Structure and Modeling Method for Field Programmable Logic Array

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020174411A1 (en) * 2001-03-27 2002-11-21 Wenyi Feng Programming programmable logic devices using hidden switches
CN1776693A (en) * 2005-12-01 2006-05-24 复旦大学 General Field Programmable Gate Array Placement and Routing Model
CN101179271A (en) * 2007-11-30 2008-05-14 电子科技大学 An FPGA structure
CN101888240A (en) * 2009-05-11 2010-11-17 复旦大学 A General Interconnect Box Structure and Modeling Method for Field Programmable Logic Array

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112731823A (en) * 2019-10-28 2021-04-30 深圳市国微电子有限公司 FPGA interconnection line circuit and FPGA interconnection line delay reduction method
CN114297976A (en) * 2021-12-30 2022-04-08 北京中科睿芯科技集团有限公司 Automatic wiring method and system for pulse logic circuit

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Application publication date: 20140402