CN103681870A - Array substrate and manufacturing method thereof - Google Patents

Abstract

The invention discloses an array substrate, comprising: a base substrate, an oxide thin film transistor formed on the base substrate, a passivation layer and a pixel layer, wherein the gate insulating layer in the oxide thin film transistor adopts The material is non-photosensitive organic resin. The invention also discloses a method for manufacturing the array substrate and a display device. The invention can effectively reduce power consumption and flatten the bottom layer.

Description

Array substrate and manufacturing method thereof

technical field

The present invention relates to the field of display technology, in particular to an array substrate and a manufacturing method thereof.

Background technique

In the thin film transistor (Thin Film Transistor, TFT) array structure, silicon nitride (SiNx) is often used as the gate insulating layer, and the gate insulating layer is formed between the gate electrode and the source-drain signal electrode. A higher constant makes the capacitance of the gate insulating layer higher, so the charging current value can be effectively increased and the charging time can be shortened. However, a higher charging current value will increase the capacitance between the gate electrode and the source-drain signal electrode, which directly affects the power consumption of the display screen, so that the power consumption of the display screen will increase significantly; at the same time, Silicon nitride (SiNx) is used as the gate insulating layer, and its flatness is poor. The uneven surface has a great impact on the liquid crystal alignment process in the back-end cell-to-cell process, which makes the liquid crystal orientation disorder and easily causes display abnormalities.

Contents of the invention

In view of this, the main purpose of the present invention is to provide an array substrate and a manufacturing method thereof, which can prevent loss of charging current while reducing power consumption, and can planarize the bottom layer.

In order to achieve the above object, technical solution of the present invention is achieved in that way:

The present invention provides an array substrate, comprising: a base substrate, an oxide thin film transistor formed on the base substrate, a passivation layer and a pixel electrode, wherein the gate insulating layer in the oxide thin film transistor Formed with non-photosensitive organic resin.

Here, the non-photosensitive organic resin includes a non-photosensitive organic resin containing Si-C and/or Si-O structures in the main chain;

The gate insulating layer formed by the non-photosensitive organic resin has a planarized surface structure;

The material used for the passivation layer includes at least one of silicon nitride and organic resin materials;

The oxide thin film transistor includes: a gate electrode, a gate insulating layer formed on the gate electrode, an oxide semiconductor layer formed on the gate insulating layer, a source signal electrode formed on the oxide semiconductor layer , the drain signal electrode and the channel; or,

The oxide thin film transistor includes: a source signal electrode, a drain signal electrode, and a channel, and an oxide semiconductor layer formed on the source signal electrode, the drain signal electrode, and the channel, and an oxide semiconductor layer formed on the oxide semiconductor layer. a gate insulating layer, and a gate electrode formed on the gate insulating layer.

The present invention also provides a method for manufacturing an array substrate, comprising the following steps:

An oxide thin film transistor, a passivation layer and a pixel electrode are formed on the base substrate; wherein, the gate insulating layer in the oxide thin film transistor is formed by non-photosensitive organic resin.

Here, the non-photosensitive organic resin includes non-photosensitive organic resin materials containing Si-C and/or Si-O structures in the main chain;

The step of forming an oxide thin film transistor on the base substrate includes:

forming a gate electrode on the base substrate; forming a gate insulating layer on the gate electrode; forming an oxide semiconductor layer on the gate insulating layer; forming a source signal electrode, a drain signal electrode and channel; or,

Forming a source signal electrode, a drain signal electrode, and a channel on the base substrate; forming an oxide semiconductor layer on the source signal electrode, the drain signal electrode, and the channel; forming a gate insulating layer on the oxide semiconductor layer; A gate electrode is formed on the gate insulating layer.

The material used for the passivation layer includes at least one of silicon nitride and organic resin materials;

The present invention further provides a display device, which includes any one of the array substrates disclosed in the present invention.

The array substrate and its manufacturing method provided by the present invention have the following advantages and characteristics:

The gate insulating layer among the present invention adopts the non-photosensitive organic resin material that contains Si-C and/or Si-O structure on the main chain to replace silicon nitride material, so, on the one hand, because the dielectric of non-photosensitive organic resin material The constant is lower than the dielectric constant of silicon nitride material, which can effectively reduce the power consumption of the display screen; on the other hand, because the organic resin material is a flattened and uniform material, it can effectively improve the unevenness of the gate insulating layer, making The gate insulating layer is planarized, thereby making the array substrate as a whole flat, and improving the controllability of subsequent processes.

In addition, although the dielectric constant of the non-photosensitive organic resin used in the present invention is relatively low, which will affect the charging current of the array substrate, the loss of charging current can be effectively compensated by using indium tin oxide material to make the oxide semiconductor layer; and Since the non-photosensitive organic resin material does not contain H element, it can better prevent the characteristics of the charging current of the oxide thin film transistor from deteriorating.

Description of drawings

1 is a schematic diagram of the composition and structure of the array substrate in Embodiment 1;

FIG. 2 is a schematic diagram of the composition and structure of the array substrate in Embodiment 2. FIG.

Explanation of reference signs

1. Base substrate, 2. Gate electrode, 3. Gate insulating layer, 4. Oxide semiconductor layer, 5. Source-drain signal electrode layer, 5a, source signal electrode, 5b, drain signal electrode, 6. Passivation layer, 7. Via hole, 8. Pixel electrode, 9. Channel

Detailed ways

The implementation manner of the present invention will be described in detail below in conjunction with specific embodiments and accompanying drawings.

Example 1

FIG. 1 is a schematic diagram of the composition and structure of the array substrate in Example 1. As shown in FIG. 1, the array substrate includes: a base substrate 1, an oxide thin film transistor formed on the base substrate, and a passivation layer 6 and A pixel electrode 8; wherein, the gate insulating layer in the oxide thin film transistor is formed by non-photosensitive organic resin.

The gate insulating layer in the array substrate of the present invention adopts non-photosensitive organic resin material instead of silicon nitride material, so, on the one hand, because the dielectric constant of non-photosensitive organic resin material is lower than that of silicon nitride material , which can effectively reduce the power consumption of the display screen; on the other hand, since the organic resin material is a flattened and uniform material, it can effectively improve the unevenness of the gate insulating layer, so that the gate insulating layer is planarized, and the overall array substrate It is flat and improves the controllability of the subsequent process, for example, it can greatly reduce the end difference of the cell rubbing process in the liquid crystal device manufacturing process and improve product characteristics.

In addition, although the dielectric constant of the non-photosensitive organic resin used in the array substrate of the present invention is relatively low, which will affect the charging current of the array substrate, by using indium tin oxide material to make the oxide semiconductor layer, the charging current can be effectively compensated. loss; and since the non-photosensitive organic resin material does not contain H element, it can better prevent the characteristics of the charging current of the oxide thin film transistor from deteriorating.

Wherein, the oxide thin film transistor may at least include: a gate electrode 2, a gate insulating layer 3 formed on the gate electrode 2, an oxide semiconductor layer 4 formed on the gate insulating layer 3, and an oxide semiconductor layer formed on the gate electrode 2. The source-drain signal electrode layer 5 on the oxide semiconductor layer 4, and the channel 9 formed on the source-drain signal electrode layer 5, the channel 9 cuts off the source-drain signal electrode layer above the oxide semiconductor layer 4, Cutting off the source-drain signal electrode layer into a source signal electrode 5a and a drain signal electrode 5b;

Here, the structure on the array substrate is not limited to the structures listed above, and the way of forming the oxide thin film transistor, passivation layer and pixel electrode is also not limited, wherein the oxide thin film transistor, passivation layer and pixel electrode The formation method can adopt conventional implementation methods, such as 5-time mask (5mask) process, 4-time mask (4mask) process, etc., and can also use technologies such as multi-tone process and layered stripping process. These processes are all It is known to those skilled in the art and will not be described in detail here.

Here, the non-photosensitive organic resin may include non-photosensitive organic resin materials containing Si-C and/or Si-O structures in the main chain;

The material used for the passivation layer may include materials such as silicon nitride and silicon oxide, and may also include organic resin materials, wherein the use of organic resin materials as the passivation layer can reduce end differences to improve product characteristics;

The pixel electrode is a transparent conductive material, and the transparent conductive material may include nanometer indium tin oxide (ITO), indium zinc oxide (IZO), or indium gallium zinc oxide (IGZO).

In combination with the above, the specific structure of the oxide thin film transistor on the array substrate is shown in Figure 1, including:

A base substrate 1, a gate electrode 2 formed on the base substrate 1; a gate insulating layer 3 formed on the gate electrode 2; an oxide semiconductor layer 4 formed on the gate insulating layer 3, and The oxide semiconductor layer 4 is separated from the gate electrode 2 by the gate insulating layer 3; the source-drain signal electrode layer 5 formed on the oxide semiconductor layer; the channel 9 formed on the source-drain signal electrode layer 5 , the channel 9 cuts off the source-drain signal electrode layer above the oxide semiconductor layer 4, and cuts off the source-drain signal electrode layer 5 into a source signal electrode 5a and a drain signal electrode 5b; formed on the gate electrode 2, which has been formed above, The passivation layer 6 on the array substrate of the gate insulating layer 3, the oxide semiconductor layer 4, the source signal electrode 5a, the drain signal electrode 5b, and the channel 9; the via hole 7 and the pixel electrode 8 formed on the passivation layer 6, The pixel electrode 8 is connected to the drain signal electrode 5 b through the via hole 7 .

There are also gate lines and data lines on the array substrate. During the manufacturing process of the array substrate, the gate lines can be formed at the same time as the gate electrodes, and the data lines can be formed at the same time as the source signal electrodes and the drain signal electrodes.

Correspondingly, the method for manufacturing the oxide thin film transistor on the array substrate, the passivation layer and the pixel electrode includes:

A gate electrode 2 is sequentially formed on the base substrate 1; a gate insulating layer 3 is formed on the gate electrode; an oxide semiconductor layer 4 is formed on the gate insulating layer 3; a source electrode is formed on the oxide semiconductor layer 4; Drain signal electrode layer 5; a channel 9 is formed on the source-drain signal electrode layer 5, and the channel 9 intercepts the source-drain signal electrode layer 5 above the oxide semiconductor layer 4, and the source-drain signal electrode layer 5 Cut into source signal electrode 5a and drain signal electrode 5b; formed on the array substrate on which gate electrode 2, gate insulating layer 3, oxide semiconductor layer 4, source signal electrode 5a, drain signal electrode 5b and channel 9 have been formed A passivation layer 6 ; a via hole 7 is etched in the passivation layer 6 to form a pixel electrode 8 , and the pixel electrode 8 is connected to the drain signal electrode 5 b through the via hole 7 .

Correspondingly, there are gate lines and data lines on the array substrate. During the manufacturing process of the array substrate, the gate lines can be formed at the same time as the gate electrodes, and the data lines can be formed at the same time as the source signal electrodes and the drain signal electrodes.

The material that the passivation layer adopts in the present embodiment is organic resin, because organic resin has the characteristic that is easy to flatten, therefore, as can be seen from Fig. 1, the surface of described passivation layer is flat, also can effectively Minimally reduce surface end difference and improve product characteristics.

Example 2

2 is a schematic diagram of the composition and structure of the array substrate in Example 2. The structure of the oxide thin film transistor on the array substrate is a top gate structure. As shown in the figure, the array substrate includes: a base substrate 1, a substrate formed on the substrate The oxide thin film transistor, the passivation layer 6 and the pixel electrode 8 on the base substrate; wherein, the gate insulating layer in the oxide thin film transistor is formed by non-photosensitive organic resin. There are also gate lines and data lines (not shown in the figure) on the array substrate.

The gate insulating layer in the array substrate of the present invention adopts non-photosensitive organic resin material instead of silicon nitride material, so, on the one hand, because the dielectric constant of non-photosensitive organic resin material is lower than that of silicon nitride material , which can effectively reduce the power consumption of the display screen; on the other hand, since the organic resin material is a flattened and uniform material, it can effectively improve the unevenness of the gate insulating layer, so that the gate insulating layer is planarized, and the overall array substrate It is flat and improves the controllability of the subsequent process, for example, it can greatly reduce the end difference of the cell rubbing process in the liquid crystal device manufacturing process and improve product characteristics.

In addition, although the dielectric constant of the non-photosensitive organic resin used in the array substrate of the present invention is relatively low, which will affect the charging current of the array substrate, by using indium tin oxide material to make the oxide semiconductor layer, the charging current can be effectively compensated. loss; and since the non-photosensitive organic resin material does not contain H element, it can better prevent the characteristics of the charging current of the oxide thin film transistor from deteriorating.

Wherein, the oxide thin film transistor may at least include: a source-drain signal electrode layer 5, a channel 9 formed on the source-drain signal electrode layer 5, the channel 9 cuts off the source-drain signal electrode layer, and The source-drain signal electrode layer is cut into a source signal electrode 5a and a drain signal electrode 5b, and the oxide semiconductor layer 4 formed on the source signal electrode 5a, the drain signal electrode 5b and the channel, and the oxide semiconductor layer formed on the oxide semiconductor layer 4 on the gate insulating layer 3, and the gate electrode 2 formed on the gate insulating layer 3.

Here, the structure on the array substrate is not limited to the structures listed above, and the way of forming the oxide thin film transistor, passivation layer and pixel electrode is also not limited, wherein the oxide thin film transistor, passivation layer and pixel electrode The formation method can adopt conventional implementation methods, such as 5-time mask (5mask) process, 4-time mask (4mask) process, etc., and can also use technologies such as multi-tone process and layered stripping process. These processes are all It is known to those skilled in the art and will not be described in detail here.

Here, the non-photosensitive organic resin may include non-photosensitive organic resin materials containing Si-C and/or Si-O structures in the main chain;

The material used for the passivation layer may include materials such as silicon nitride and silicon oxide, and may also include organic resin materials, wherein the use of organic resin materials as the passivation layer can reduce end differences to improve product characteristics;

The pixel electrode is a transparent conductive material, and the transparent conductive material may include nanometer indium tin oxide (ITO), indium zinc oxide (IZO), or indium gallium zinc oxide (IGZO).

Combining the above, the specific structure of the oxide thin film transistor, the passivation layer and the pixel electrode on the array substrate is shown in Figure 2, including:

The base substrate 1, the source-drain signal electrode layer 5 formed on the base substrate 1; the channel 9 formed on the source-drain signal electrode layer 5, the channel 9 intercepts the source-drain signal electrode layer, and the The source-drain signal electrode layer 5 is cut into a source signal electrode 5a and a drain signal electrode 5b; the oxide semiconductor layer 4 is formed on the source signal electrode 5a, the drain signal electrode 5b, and the channel 9, and the oxide semiconductor layer 4 passes through The channel 9 separates the source-drain signal electrode layer; the gate insulating layer 3 formed on the array substrate on which the source signal electrode 5a, the drain signal electrode 5b, the channel 9 and the oxide semiconductor layer 4 have been formed; The gate electrode 2 on the insulating layer 3, and the gate electrode 2 is separated from the oxide semiconductor layer 4 by the gate insulating layer 3; formed on the above-mentioned source signal electrode 5a, drain signal electrode 5b, channel 9, oxide The passivation layer 6 on the array substrate of the semiconductor layer 4, the gate insulating layer 3 and the gate electrode 2; the via hole 7 and the pixel electrode 8 formed on the passivation layer 6, and the pixel electrode 8 passes through the via hole 7 and The drain electrode is connected to 5b.

There are also gate lines and data lines on the array substrate. During the manufacturing process of the array substrate, the gate lines can be formed at the same time as the gate electrodes, and the data lines can be formed at the same time as the source signal electrodes and the drain signal electrodes.

Correspondingly, the method for manufacturing the oxide thin film transistor on the array substrate, the passivation layer and the pixel electrode includes:

A source-drain signal electrode layer 5 is formed on the base substrate 1; a channel 9 is formed on the source-drain signal electrode layer 5, and the channel 9 intercepts the source-drain signal electrode layer 5 and connects the source-drain signal electrode The layer 5 is cut into a source signal electrode 5a and a drain signal electrode 5b; the oxide semiconductor layer 4 is formed on the source signal electrode 5a, the drain signal electrode 5b and the channel 9, and the oxide semiconductor layer 4 passes through the channel The source-drain signal electrode layer is separated by the channel 9; the gate insulating layer 3 is deposited on the array substrate on which the source signal electrode 5a, the drain signal electrode 5b, the channel 9 and the oxide semiconductor layer 4 have been formed; on the gate insulating layer 3 Depositing the gate electrode 2; forming a passivation layer 6 on the array substrate on which the source signal electrode 5a, the drain signal electrode 5b, the channel 9, the oxide semiconductor layer 4, the gate insulating layer 3 and the gate electrode 2 have been formed; A via hole 7 is etched out of the passivation layer 6 to form a pixel electrode 8 , and the pixel electrode 8 is connected to the drain signal electrode 5 b through the via hole 7 .

Correspondingly, there are gate lines and data lines on the array substrate. During the manufacturing process of the array substrate, the gate lines can be formed at the same time as the gate electrodes, and the data lines can be formed at the same time as the source electrodes and the drain electrodes.

The material used for the passivation layer in this embodiment is silicon nitride. Since silicon nitride is a non-planar material, it can be seen from FIG. 2 that the surface of the passivation layer is non-planar.

The structure of the array substrate exemplified in the embodiment of the present invention is only an optional solution, and the positions and formation sequences of the components on the array substrate and the layers included in the thin film transistor are not limited to the methods described in the embodiment, but There can be many variations, for example, the pixel electrode can be formed first, and then the source-drain signal electrode, gate electrode, etc. can be formed, as long as the formed structure can realize the driving of the panel.

The present invention also provides a display device, wherein the array substrate in the display device is any one of the array substrates described in Embodiment 1 or Embodiment 2.

Here, the display device may be any product or component with a display function such as a liquid crystal panel, an electronic paper, an OLED panel, a mobile phone, a tablet computer, a television set, a monitor, a notebook computer, a digital photo frame, a navigator, and the like.

The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the protection scope of the present invention.

Claims (10)

1. An array substrate, comprising: a base substrate, an oxide thin film transistor formed on the base substrate, a passivation layer and a pixel electrode, wherein the gate insulating layer in the oxide thin film transistor adopts non- Photosensitive organic resin formation. 2 . The array substrate according to claim 1 , wherein the non-photosensitive organic resin comprises a non-photosensitive organic resin containing Si—C and/or Si—O structures in its main chain. 3. The array substrate according to claim 1 or 2, wherein the gate insulating layer formed of the non-photosensitive organic resin has a planarized surface structure. 4. The array substrate according to claim 1 or 2, wherein the passivation layer is made of at least one of silicon nitride and organic resin materials. 5. The array substrate according to claim 1 or 2, wherein the oxide thin film transistor comprises: a gate electrode, a gate insulating layer formed on the gate electrode, and a gate insulating layer formed on the gate insulating layer. an oxide semiconductor layer, a source signal electrode, a drain signal electrode, and a channel formed on the oxide semiconductor layer; Alternatively, the oxide thin film transistor includes: a source signal electrode, a drain signal electrode, and a channel, and an oxide semiconductor layer formed on the source signal electrode, the drain signal electrode, and the channel, and an oxide semiconductor layer formed on the oxide semiconductor layer. a gate insulating layer on the top, and a gate electrode formed on the gate insulating layer. 6. A method for manufacturing an array substrate, comprising the following steps: An oxide thin film transistor, a passivation layer and a pixel electrode are formed on the base substrate; wherein, the gate insulating layer in the oxide thin film transistor is formed by non-photosensitive organic resin. 7 . The manufacturing method according to claim 6 , wherein the non-photosensitive organic resin comprises a non-photosensitive organic resin material containing Si—C and/or Si—O structures in the main chain. 8. The manufacturing method according to claim 6 or 7, wherein the step of forming an oxide thin film transistor on the base substrate comprises: forming a gate electrode on the base substrate; forming a gate insulating layer on the gate electrode; forming an oxide semiconductor layer on the gate insulating layer; forming a source signal electrode, a drain signal electrode and ditch; or, Forming a source signal electrode, a drain signal electrode, and a channel on the base substrate; forming an oxide semiconductor layer on the source signal electrode, the drain signal electrode, and the channel; forming a gate insulating layer on the oxide semiconductor layer; A gate electrode is formed on the gate insulating layer. 9. The manufacturing method according to claim 6 or 7, characterized in that, the material used for the passivation layer includes at least one of silicon nitride and organic resin materials. 10 . A display device, characterized in that the display device comprises the array substrate according to any one of claims 1 to 5 .

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