CN103681478B - Copper-connection structure and manufacturing method of copper-connection structure - Google Patents

Abstract

The invention belongs to the technical field of semiconductors, and specifically relates to a copper interconnection structure and a preparation method. The invention relies on the original copper interconnection structure, and adopts the double-layer Ru/TiAlN structure as the diffusion barrier layer/adhesion layer/seed layer structure. The specific preparation steps are: using the atomic layer deposition method, first deposit a layer of TiAlN film on the insulating dielectric layer, then deposit a layer of Ru film, and finally directly electroplate copper to obtain a copper interconnection structure. Due to the addition of Al in the TiN film, an amorphous TiAlN film can be obtained, which has better Cu diffusion barrier performance than the TiN film. The present invention uses a high-density amorphous TiAlN thin film, and there is no channel for rapid diffusion such as grain boundaries, which provides ideal diffusion barrier and thermal stability, and is a copper interconnection of 22nm and below process technology nodes Technology offers a more practical and reliable solution.

Description

A kind of copper interconnection structure and preparation method thereof

technical field

The invention belongs to the technical field of semiconductors, and in particular relates to an integrated circuit copper interconnection structure and a preparation method thereof.

Background technique

With the continuous development of integrated circuit technology, the feature size of semiconductor devices and circuits continues to shrink, and interconnection delay replaces device gate delay as the main factor restricting the further improvement of IC speed. Looking for conductive materials and dielectric constants with lower resistivity Lower dielectric materials have become a major development direction of VLSI technology. Cu has gradually become the most widely used interconnect material due to its lower resistivity, higher electromigration resistance and higher thermal conductivity than Al. However, Cu diffuses very quickly in Si and oxides, and once Cu enters it, it will form deep-level impurities, which have a strong trap effect on the carriers in the device, degrading or even failing the device performance, so it is necessary to use Cu An effective diffusion barrier layer is formed between the silicon substrate and the Si substrate to isolate Cu and Si and improve the adhesion between Cu and the Si substrate. At present, the most commonly used barrier material in the semiconductor manufacturing industry is TiN. Although TiN is thermodynamically stable with Cu and Si, its biggest disadvantage is polycrystalline and columnar microstructures, which are the last thing you want to see as a barrier layer. Yes, because the existence of more grain boundaries will become the path for the rapid diffusion of Cu. Amorphous TiN can eliminate this defect, but amorphous TiN is very unstable. Other transition metal nitrides and Cu are also thermodynamically stable and can be prepared amorphous by reactive sputtering, but they will also start to crystallize at the temperature at which TiN fails as a barrier layer. Therefore, it is urgent to find a barrier material with higher thermal stability.

With the continuous advancement of semiconductor process technology, it is difficult for traditional thin film deposition technology to effectively and accurately control film characteristics and meet increasingly stringent process technology requirements. Technology is gradually becoming a key technology in the field of microelectronic device manufacturing. It has the advantages of lower deposition temperature, faster deposition rate, easily controllable doping concentration and high film quality, and more importantly, it is suitable for depositing diffusion barrier layers on via holes and trenches. Better shape retention than methods such as sputtering.

Among various diffusion barrier materials, Ru is a very promising copper diffusion barrier material because it is an inert metal with much lower resistivity than TaN and Ta; and it has a very good relationship with Cu. Excellent adhesion ensures the reliability of the device. However, pure Ru film is not suitable as a diffusion barrier, because pure Ru film is a polycrystalline columnar structure, and its grain boundaries provide a path for the short-range diffusion of Cu. At the same time, the adhesion of Ru thin film on the surface of silicon dioxide and low dielectric constant materials is relatively poor.

Considering the higher requirements for the diffusion barrier layer at the deep submicron level, we propose to use the double-layer Ru/TiAlN structure as the diffusion barrier layer. The Ru layer provides the possibility of adhesion and nucleation required for the next step of copper plating; the TiAlN layer makes up for the poor barrier performance of the Ru layer, and the introduction of AlN not only changes the original polycrystalline structure of TiN, but also enhances the The compactness and thermal stability of the film are ensured, so that this structure achieves a perfect diffusion barrier effect.

Contents of the invention

The purpose of the present invention is to provide a novel copper interconnection structure and its preparation method to cope with the difficulty of copper interconnection wiring brought about by the continuous reduction of integrated circuit feature size and the higher requirement for the performance of the diffusion barrier layer.

The copper interconnection structure proposed by the invention adopts the Ru/TiAlN double-layer structure as the copper diffusion barrier layer and the seed crystal layer.

The present invention also provides a method for preparing the above-mentioned Ru/TiAlN double-layer copper interconnection structure, the specific steps comprising:

(1) RCA standard cleaning process is used to clean the silicon-based substrate;

(2) Form an etch barrier layer and an insulating dielectric layer in sequence on the silicon wafer;

(3) Through photolithography and etching process, the interconnection position is defined to form metal trenches, contact holes or through holes;

(4) On the structure formed in the above steps, TiN layer and AlN layer are alternately grown by atomic layer deposition method to obtain TiAlN thin film, and then Ru thin film is grown to form a Ru/TiAlN double-layer diffusion barrier layer;

(5) Electroplating copper directly on the above structure to obtain a copper interconnection structure;

(6) Finally, the surface of the wafer is flattened by a chemical mechanical polishing process.

Further, the material of the insulating dielectric layer is SiO2, SiOF, SiCOH or porous SiCOH, and the material of the etching barrier layer is silicon nitride.

The growth of the double-layer diffusion barrier layer adopts the PEALD method, and its specific steps include two stages. In the _first stage, n1 layers of TiN and _n2 layers of AlN films are alternately grown, and the above process is continuously repeated to form a TiAlN film; n ₃ layers of Ru, thereby forming a double-layer Ru/TiAlN thin film, wherein n ₁ , n ₂ and n ₃ are integers greater than or equal to 1.

In the Ru/TiAlN double-layer film, the TiAlN film is first deposited in the first stage, and the Ti precursor used is tetrakis dimethylamino titanium (TDMAT), (diethylamino) titanium (TDEAT) or TiCl ₄ , the gas source is NH ₃ or N ₂ /H ₂ , the Al precursor used is trimethylaluminum (TMA), and the liquid source is H ₂ O; the Ru film is deposited in the second stage, and the Ru precursor used is Ru( Cp) ₂ , Ru(EtCp) ₂ or Ru(OD) ₃ , the gas source used is O ₂ , NH ₃ or H ₂ . The plasma power is 50~100W, the carrier gas flow rate is 300-400sccm, the temperature of the reaction chamber is 250~350 ^o C, and the working pressure of the reaction chamber is 1~4 Torr.

In the first stage, n ₁ TiN growth cycles and n ₂ AlN growth cycles are first performed, and then the above process is repeated to complete the growth. A TiN growth cycle includes: feeding Ti precursor into the reaction chamber with a pulse time of 2-4 s, purging with high-purity N ₂ for 8-16 s, and then feeding gas source plasma with a pulse time of 4-6 s, Purging with high-purity nitrogen for 8-12s; an AlN growth cycle includes feeding Al precursor into the reaction chamber with a pulse time of 1-2 s, purging with high-purity _N2 for 4-8s, and then feeding the liquid source, The pulse time is 2~4s, and it is purged with high-purity nitrogen for 4~8s. The second stage includes n ₃ Ru growth cycle cycles (n ₁ , n ₂ , n ₃ are integers greater than 1). A Ru growth cycle includes: feeding the Ru precursor into the reaction chamber with a pulse time of 1-5s, purging with high-purity _N2 for 2-10s, and then feeding the gas source plasma with a pulse time of 0.3-2s, using Purging with high-purity nitrogen gas for 1~5s. By changing the layers n ₁ and n ₂ of TiN and AlN, the Cu barrier ability, compactness and conductivity of TiAlN film can be optimized.

The present invention uses double-layer Ru/TiAlN as the diffusion barrier layer and the seed layer, and utilizes the good Cu diffusion barrier effect of TiN and the excellent adhesion ability of Ru at the same time, and makes the TiN layer from multiple The crystalline structure is transformed into an amorphous structure, which further improves the diffusion barrier ability and thermal stability; in addition, the use of ALD technology can have 100% step coverage when depositing high-aspect-ratio structural films, and has excellent control over the composition and thickness of the deposited film ability, so as to obtain high-purity and high-quality films, which overcome the shortcomings of traditional PVD and other film deposition technologies in the ultra-deep sub-micron environment, thereby effectively improving the performance and performance of copper interconnect structures. reliability. The advantage of the present invention is that it uses a high-density amorphous TiAlN thin film, there is no channel for rapid diffusion such as grain boundaries, and it provides ideal diffusion barrier and thermal stability. Copper interconnect technology provides a more practical and reliable solution.

Description of drawings

1 to 6 are flow charts of a novel integration process of Cu diffusion barrier layer and copper interconnection implemented according to the present invention.

Reference numerals in the figure: 101 is a semiconductor substrate wafer, 102 is an etching barrier layer, 103 is an insulating dielectric layer, 104 is a diffusion barrier layer TiAlN, 105 is a seed layer Ru, and 106 is an electroplated copper film.

detailed description

Further detailed description will be made below in conjunction with the accompanying drawings and specific embodiments. In the drawings, for the convenience of description, the thicknesses of layers and regions are enlarged and reduced, and the sizes shown do not represent actual sizes. The same reference numerals represent the same components , its repeated description will be omitted.

The Ru/TiAlN diffusion barrier layer proposed by the present invention and its preparation method are applicable to the copper interconnection technology of various semiconductor integrated circuits. What is described below is the process flow of an embodiment of the Ru/TiAlN diffusion barrier layer prepared by the present invention .

First, on the Si(100) substrate 101, the standard CMOS process is used to complete the cleaning of the silicon wafer. The specific process mainly includes: using a mixed solution of sulfuric acid and hydrogen peroxide, standard cleaning SC-1, SC-2, diluted hydrofluoric acid The Si substrate was cleaned sequentially with acid and deionized water to remove various impurities and natural oxide layers, and dried with high-purity _N2 . On the cleaned Si (100) substrate 101, a layer of etching stopper layer silicon nitride 102 and a dielectric layer 103 (such as SiO ₂ film) for interlayer insulation are deposited in sequence. Next, trenches or via holes 201 for the interconnect structure are formed using standard photolithography and etching processes, as shown in FIG. 1 .

After the trenches or vias are formed, the TiAlN film 104 is grown using the PEALD technique. The Ti precursor is TDMAT, the gas source is NH ₃ ; the Al precursor is trimethylaluminum (TMA), the liquid source is H ₂ O, the growth temperature is 200-350 ^o C, and the pressure of the reaction chamber is 1-4 Torr. The plasma power is 80W. First grow TiN for 3 growth cycles and AlN for 2 growth cycles, and repeat this process to form a TiAlN film, as shown in Figure 2. A TiN growth cycle includes: feeding TDMAT into the reaction chamber with a pulse time of 2 s, purging with high-purity N ₂ for 8 s, and then feeding NH ₃ plasma with a pulse time of 4 s, and purging with high-purity nitrogen for 8 s. An AlN growth cycle includes feeding TMA into the reaction chamber with a pulse time of 1 s, purging with high-purity N ₂ for 4 s, and then feeding H ₂ O with a pulse time of 4 s, and purging with high-purity nitrogen for 8 s. The structure is shown in Figure 3.

Next, the Ru thin film 105 is grown again, the Ru precursor used is Ru(EtCp) ₂ , the gas source is O ₂ , and other conditions remain unchanged. Firstly, the Ru source was introduced into the reaction chamber with a pulse time of 1 s; the reaction chamber was purged with high-purity N ₂ for 2 s; O ₂ was introduced for 0.5 s, and the reaction chamber was purged with high-purity N ₂ for 2 s; repeat 50 growth cycle, and finally a Ru/TiAlN barrier layer structure is obtained, as shown in Figure 4.

Then, by means of electroplating, the copper wire 106 is electroplated in the trench or through-hole structure to form a copper interconnection structure, as shown in FIG. 5 .

Finally, chemical mechanical polishing (CMP) technology is used to planarize the wafer surface to complete a layer of interconnection structure, as shown in Figure 6, to prepare for the next layer of interconnection structure.

The specific embodiment of the present invention has been described above in conjunction with the accompanying drawings, but these descriptions can not be interpreted as limiting the scope of the present invention, the protection scope of the present invention is defined by the appended claims, any claims on the basis of the present invention All modifications are within the protection scope of the present invention.

Claims (7)

1. a preparation method of copper interconnection structure, this copper interconnection structure adopts double-layer Ru/TiAlN structure as copper diffusion barrier layer and seed crystal layer; It is characterized in that concrete steps are: (1) RCA standard cleaning process is used to clean the silicon-based substrate; (2) Forming a layer of etch stop layer and an insulating dielectric layer sequentially on the silicon substrate; (3) Through photolithography and etching process, the interconnection position is defined to form metal trenches, contact holes or through holes; (4) On the structure formed in the above steps, TiN layer and AlN layer are alternately grown by atomic layer deposition method to obtain TiAlN film, and then Ru film is grown to form a Ru/TiAlN double-layer diffusion barrier layer; (5) On the structure formed in the above steps, copper is directly electroplated to obtain a copper interconnection structure; (6) Finally, the surface of the wafer is flattened by a chemical mechanical polishing process. 2. The preparation method according to claim 1, wherein the material of the insulating dielectric layer in step (2) is SiO ₂ , SiOF, SiCOH or porous SiCOH. 3. The preparation method according to claim 1, characterized in that the material of the etch stop layer in step (2) is silicon nitride. 4. The preparation method according to claim 1, characterized in that the growth of the double-layer diffusion barrier layer in step (4) adopts the method of plasma-assisted atomic layer deposition, and the specific process is divided into two stages, the first stage alternates Grow n ₁ layer of TiN and n ₂ layers of AlN film, and repeat the above process to form a TiAlN film; in the second stage, grow n ₃ layers of Ru to form a double-layer Ru/TiAlN film, where n ₁ , n ₂ and n ₃ are greater than is an integer equal to 1, and by controlling the values of n ₁ , n ₂ and n ₃ , a barrier layer film with a desired thickness can be finally obtained. 5. The preparation method according to claim 4, characterized in that the Ti source required for growing TiN by plasma-assisted atomic layer deposition in step (4) is titanium tetramethylene dimethylamide, titanium diethylamide or TiCl _4. The gas source is NH ₃ or N ₂ /H ₂ ; the Al source required to grow AlN is trimethylaluminum, and the liquid source is H ₂ O; the Ru source required to grow Ru is Ru(Cp) ₂ , Ru(EtCp) ₂ or Ru(OD) ₃ , the gas source is O ₂ , NH ₃ or H ₂ , the plasma power is 50~100W, the carrier gas flow rate is 300-400 sccm, the temperature of the reaction chamber is 250~350℃, the reaction chamber The working pressure is 1~4 Torr. 6. The preparation method according to claim 5, wherein a growth cycle of TiN comprises: feeding a Ti precursor into the reaction chamber with a pulse time of ₂ to 4 s, and purging with high-purity N for 8 to 16 s , and then feed the gas source plasma with a pulse time of 4-6 s, and purge with high-purity nitrogen for 8-12 s; an AlN growth cycle includes feeding Al precursor into the reaction chamber with a pulse time of 1-2 s, using High-purity N ₂ is purged for 4-8s, and then the liquid source is passed into, the pulse time is 2-4s, and high-purity nitrogen is purged for 4-8s; a Ru growth cycle includes: feeding Ru precursor into the reaction chamber, pulse The time is 1-5s, purging with high-purity N ₂ for 2-10s, and then passing through the gas source plasma, the pulse time is 0.3-2s, and purging with high-purity nitrogen for 1-5s. 7 . The preparation method according to claim 1 , wherein the copper interconnection structure in step (5) uses electroplating with a current density of 0.5A/dm ² -3.0A/dm ² .