CN103681326A - Formation method of fin field-effect transistor (FinFET) substrates with different threshold voltages - Google Patents

Abstract

The invention discloses a method for forming fin field effect transistor substrates with different threshold voltages: providing a semiconductor substrate with a pad oxide layer deposited on the surface in advance; forming a patterned photoresist glue on the surface of the pad oxide layer layer; using the patterned photoresist layer as a shield, in the area exposed by the patterned photoresist layer, implant germanium into the semiconductor substrate with a predetermined dose of ions through the pad oxide layer, and remove the pattern patterned photoresist layer; expose different regions with the patterned photoresist layer, repeat the above steps N times, and form germanium ion distributions with different concentrations in different regions of the semiconductor substrate, where N is an integer greater than or equal to 1; etch implantation A semiconductor substrate with germanium ions forms a plurality of fin field effect transistor substrates with different concentrations of germanium ions. By adopting the present invention, different substrates can have different threshold voltages for long-length fin field effect transistor substrates.

Description

Method for forming fin field effect transistor substrates with different threshold voltages

technical field

The invention relates to the manufacturing technology of semiconductor devices, in particular to a method for forming fin field effect transistor (FinFET) substrates with different threshold voltages.

Background technique

With the development of semiconductor technology, the performance of semiconductor devices has been steadily improved. The improvement of the performance of semiconductor devices is mainly achieved by continuously reducing the feature size of semiconductor devices, and the feature size of semiconductor devices has been reduced to the nanometer level. With such a feature size of semiconductor devices, the traditional planar method of manufacturing semiconductor devices, that is, the method of manufacturing single-gate semiconductor devices, is no longer applicable, so a method of manufacturing multi-gate semiconductor devices has emerged. Compared with the manufacturing method of single-gate semiconductor devices, multi-gate semiconductor devices have stronger short-channel suppression ability, better subthreshold characteristics, higher driving ability and higher circuit density.

At present, fin field effect transistors are widely used as a representative of multi-gate semiconductor devices, and FinFETs are divided into double-gate FinFETs and triple-gate FinFETs.

A schematic diagram of a three-dimensional structure of a FinFET in the prior art is shown in FIG. 1 . There is a base body 11 and a gate structure 12 on the semiconductor substrate 10. The base body 11 is a fin structure and is in the shape of a cuboid, including a source region 13 and a drain region 14 extending with a channel region 15 in the middle. The pole structure 12 surrounds the surface of the channel region 15 in the middle of the fin structure, which surface includes the side walls and the top of the channel region. In fact, there are multiple FinFETs on the surface of the semiconductor substrate, and each FinFET may have a different threshold voltage.

In the prior art, different FinFETs have different threshold voltages by applying different bias voltages to different FinFETs on a semiconductor substrate. However, for a FinFET substrate with a long length, adjusting the bias voltage cannot achieve the desired purpose. Therefore, how to make different substrates have different threshold voltages for long-length FinFET substrates has become a particularly concerned issue in the industry.

Contents of the invention

In view of this, the present invention provides a method for forming FinFET substrates with different threshold voltages. For FinFET substrates with longer lengths, different substrates can have different threshold voltages.

Technical scheme of the present invention is realized like this:

A method for forming a FinFET substrate with different threshold voltages, the method comprising:

Pre-providing a semiconductor substrate with a pad oxide layer deposited on its surface;

A patterned photoresist layer is formed on the surface of the pad oxide layer; the patterned photoresist layer is used as a shield, and a predetermined dose of ions is transmitted through the pad oxide layer in the area exposed by the patterned photoresist layer. injecting germanium into the semiconductor substrate, and removing the patterned photoresist layer;

Exposing different areas with a patterned photoresist layer, repeating the above steps N times, forming germanium ion distributions with different concentrations in different areas of the semiconductor substrate, where N is an integer greater than or equal to 1;

A hard mask layer is deposited on the surface of the pad oxide layer, a patterned photoresist layer is formed again on the surface of the hard mask layer, and the area covered by the patterned photoresist layer again defines each the width of the substrate;

Using the re-formed patterned photoresist layer as a mask, the hard mask layer, the pad oxide layer and the semiconductor substrate implanted with germanium ions are sequentially etched to form multiple FinFET substrates with different concentrations of germanium ions.

After forming germanium ion distributions with different concentrations in different regions of the semiconductor substrate and before depositing a hard mask layer, the method further includes an annealing step.

After forming a plurality of FinFET substrates with different concentrations of germanium ions, the method further includes: sequentially removing the hard mask layer and the pad oxide layer.

The ion implantation of germanium element in the exposed area of the same photoresist layer is divided into multiple implantations.

The FinFET base body is a fin structure, including a source region and a drain region with a channel region extending therebetween.

The ion implantation is vertical implantation.

It can be seen from the above scheme that the present invention can achieve different threshold voltages for different substrates by uniform ion implantation of germanium ions in different regions, and even for long-length FinFET substrates, the required threshold voltage can be well achieved. .

Description of drawings

FIG. 1 is a schematic diagram of a three-dimensional structure of a FinFET in the prior art.

FIG. 2 is a schematic flowchart of a method for forming a FinFET substrate with different threshold voltages according to the present invention.

FIGS. 3 a to 3 h are specific structural schematic diagrams of forming fin field effect transistor substrates with different threshold voltages according to an embodiment of the present invention.

Detailed ways

In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and examples.

According to the research, the ion concentration in the matrix determines the carrier mobility of the channel, and the carrier mobility is an important parameter to realize the threshold voltage. Therefore, by controlling the concentration of ion implantation in different substrates, to achieve Different threshold voltages are the core idea of the present invention.

The flow diagram of the method for forming the fin field effect transistor substrate with different threshold voltages of the present invention is shown in Figure 2, which includes the following steps:

Step 21, pre-providing a semiconductor substrate with a pad oxide layer deposited on its surface;

Step 22, forming a patterned photoresist layer on the surface of the pad oxide layer; using the patterned photoresist layer as a shield, in the area exposed by the patterned photoresist layer, through the pad oxide layer to Implanting germanium elements into the semiconductor substrate with a predetermined dose of ions, and removing the patterned photoresist layer;

Step 23, using the patterned photoresist layer to reveal different areas, repeating the above steps N times, forming germanium ion distributions with different concentrations in different areas of the semiconductor substrate, where N is an integer greater than or equal to 1;

Step 24, depositing a hard mask layer on the surface of the pad oxide layer, forming a patterned photoresist layer on the surface of the hard mask layer again, and forming an area covered by the patterned photoresist layer define the width of each matrix;

Step 25: Using the re-formed patterned photoresist layer as a mask, sequentially etch the hard mask layer, the pad oxide layer, and the semiconductor substrate implanted with germanium ions to form a plurality of FinFETs with different concentrations of germanium ions matrix.

The following examples are given to describe the present invention in detail.

FIGS. 3 a to 3 h are specific structural schematic diagrams of forming fin field effect transistor substrates with different threshold voltages according to an embodiment of the present invention.

Referring to FIG. 3a, a pad oxide layer 101 is deposited on the surface of the semiconductor substrate 100;

Wherein, the pad oxide layer 101 covers the surface of the semiconductor substrate 100 and is used to protect the substrate surface from damage during subsequent ion implantation.

Please refer to FIG. 3b, a patterned first photoresist layer 102 is formed on the surface of the pad oxide layer 101; In the exposed area, germanium is ion-implanted into the semiconductor substrate 100 at a predetermined dose through the pad oxide layer 101 to form a first germanium ion implantation area 103;

The implantation of germanium ions in this step can also be done in multiple times, each implantation dose is the same, but the energy is different, and the germanium ion concentration is uniformly distributed through implantation of germanium ions with different energies. The number of germanium ion implantations, as well as the energy and dose of each implantation, can be flexibly adjusted according to practical applications, as long as the predetermined concentration can be achieved.

Referring to FIG. 3c, remove the patterned first photoresist layer 102;

Please refer to FIG. 3d, a patterned second photoresist layer 104 is formed on the surface of the pad oxide layer; In the exposed area, ion-implant germanium into the semiconductor substrate 100 at a predetermined dose through the pad oxide layer 101 to form a second germanium ion implantation area 105;

Similarly, the implantation of germanium ions in this step can also be performed in multiple times, each implantation dose is the same, but the energy is different, and the germanium ion concentration is uniformly distributed through implantation of germanium ions with different energies. The number of germanium ion implantations, as well as the energy and dose of each implantation, can be flexibly adjusted according to practical applications, as long as the predetermined concentration can be achieved. Moreover, in this step, germanium ions are repeatedly implanted in some regions of the semiconductor substrate, so the concentration of germanium ions in the repeatedly implanted part is higher than that in other regions.

Referring to FIG. 3e, removing the patterned second photoresist layer 104;

The above completed the formation of germanium ion distributions with different concentrations in different regions of the semiconductor substrate, so the annealing step is added here for the purpose of: first, repairing the lattice damage during the germanium ion implantation process; second, making the concentration distribution of germanium ions uniform ; Three, activate the germanium ions to make them bond with the silicon element of the semiconductor substrate to form channel carriers.

Next, referring to FIG. 3f, a hard mask layer 106 is deposited on the surface of the pad oxide layer 101, a patterned third photoresist layer 107 is formed on the surface of the hard mask layer 106, and the patterned first The area covered by the three photoresist layers 107 defines the width of each substrate;

It can be seen from FIG. 3f that the number of substrates formed by etching in the region where germanium ions are implanted can be determined as required.

Please refer to FIG. 3g. Using the patterned third photoresist layer 107 as a mask, the hard mask layer 106, the pad oxide layer 101, and the semiconductor substrate implanted with germanium ions are sequentially etched to form a plurality of semiconductor substrates with different germanium ions. ion concentration of the FinFET substrate 108 .

Please refer to FIG. 3 h , which shows the FinFET substrate 108 with the hard mask layer 106 and the pad oxide layer 101 removed.

FIG. 3h is a cross-sectional view of each FinFET substrate, and substrates 108 with different shaded colors represent different threshold voltages. Still as shown in perspective view 1, each FinFET base body is a fin structure, including a source region and a drain region with a channel region extending therebetween.

Since the germanium ion implantation concentration of each substrate is different, the threshold voltages of the formed FinFETs are also different, thereby achieving the object of the present invention. In the above embodiment, different regions are exposed twice through the patterned photoresist layer, and germanium ion implantation is performed, so that different concentrations of germanium ion implantation are realized in different regions. In fact, this is only one of the implementation methods. The essence of the present invention will be briefly described. Of course, different regions can also be exposed through the patterned photoresist layer for multiple times, and germanium ion implantation is performed, all within the protection scope of the present invention. .

It should be noted that the implantation of germanium ions in the present invention is performed before etching to form the shape of the matrix, so simple vertical implantation is sufficient. If ion implantation is performed after etching to form the shape of the substrate, oblique implantation is required. If the inclination angle is not well controlled, it is likely to be implanted into other areas, resulting in a shadow effect (shadow effect), and the ion implantation concentration cannot be accurately controlled. Therefore, the method of the present invention is simple and easy to implement.

To sum up, through the method of the present invention, even for a FinFET substrate with a long length, only germanium ions need to be uniformly implanted in different regions to achieve different threshold voltages for different substrates. Adjust the bias voltage to achieve the threshold voltage of the FinFET body with longer length.

The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included in the present invention. within the scope of protection.

Claims (6)

1. A method for forming a fin field effect transistor FinFET substrate with different threshold voltages, the method comprising: Pre-providing a semiconductor substrate with a pad oxide layer deposited on its surface; A patterned photoresist layer is formed on the surface of the pad oxide layer; the patterned photoresist layer is used as a shield, and a predetermined dose of ions is transmitted through the pad oxide layer in the area exposed by the patterned photoresist layer. injecting germanium into the semiconductor substrate, and removing the patterned photoresist layer; Exposing different areas with a patterned photoresist layer, repeating the above steps N times, forming germanium ion distributions with different concentrations in different areas of the semiconductor substrate, where N is an integer greater than or equal to 1; A hard mask layer is deposited on the surface of the pad oxide layer, a patterned photoresist layer is formed again on the surface of the hard mask layer, and the area covered by the patterned photoresist layer again defines each the width of the substrate; Using the re-formed patterned photoresist layer as a mask, the hard mask layer, the pad oxide layer and the semiconductor substrate implanted with germanium ions are sequentially etched to form multiple FinFET substrates with different concentrations of germanium ions. 2. The method according to claim 1, characterized in that, after forming germanium ion distributions with different concentrations in different regions of the semiconductor substrate and before depositing a hard mask layer, the method further comprises an annealing step. 3. The method according to claim 2, wherein after forming a plurality of FinFET substrates with different concentrations of germanium ions, the method further comprises: sequentially removing the hard mask layer and the pad oxide layer. 4 . The method according to claim 1 , wherein ion implantation of germanium element into the exposed area of the same photoresist layer is divided into multiple implantations. 5 . 5. The method according to claim 1, wherein the FinFET base body is a fin structure including a source region and a drain region extending a channel region therebetween. 6. The method of claim 1, wherein the ion implantation is vertical implantation.

Images