CN103681318B - Use the method that the selective oxidation technology of silicon manufactures junction barrier schottky diode - Google Patents

Abstract

The invention discloses a method for manufacturing junction barrier Schottky diodes using silicon selective oxidation technology, using the formation of LOCOS (local oxidation of silicon) silicon oxide to effectively limit the diffusion range of implanted impurity ions to LOCOS silicon oxide Between regions, thereby effectively reducing the range of lateral (horizontal) diffusion of the P region or N region of the PN junction, thus reducing the Schottky interface occupied by the lateral diffusion of the P region or N region, so the area of the Schottky interface It can be fully utilized, and at the same time, the effective Schottky barrier interface is bent into a curved surface to increase the conductive area and compensate for the area occupied by the shaped islands, thereby improving the forward-conducting function and efficiency of the barrier junction Schottky diode.

Description

Method for Fabricating Junction Barrier Schottky Diodes Using Selective Oxidation of Silicon

technical field

The invention relates to the design field of diode manufacturing, and specifically relates to a method for manufacturing junction barrier Schottky diodes using silicon selective oxidation technology.

Background technique

Schottky diodes are low-power, high-current, ultra-high-speed semiconductor devices that have come out in recent years. Its reverse recovery time is extremely short (can be as small as a few nanoseconds), the forward voltage drop is only about 0.4V, and the rectification current can reach several thousand milliamperes. These excellent characteristics are unmatched by fast recovery diodes. Schottky diodes are made using the principle of metal-semiconductor junctions formed by metal-semiconductor contacts, and are also known as metal-semiconductor (contact) diodes or surface barrier diodes.

Common Schottky diodes have a Schottky barrier interface between the surface metal and the silicon layer. This interface can conduct a large forward current under forward voltage; and prevent current flow under reverse voltage, only a small amount of reverse leakage occurs. When the reverse bias voltage increases, the reverse leakage will increase accordingly, which is the natural physical characteristic of the Schottky barrier. In order to overcome the problem that the reverse leakage increases with the increase of the reverse voltage, a junction barrier Schottky diode is designed. Add multiple isolated "P" or "N" type semiconductor ion diffusion small regions under the barrier interface. These "P" type regions and "N" type epitaxial regions form multiple PN junctions or "N" type The regions form multiple PN junctions with the "P" type epitaxial regions. When the reverse bias voltage is increased, these PN junctions form a layer of flooding layer under the Schottky barrier interface, and the thickness of this flooding layer will expand as the reverse voltage increases, thus reducing the electric field of the reverse voltage The impact on the Schottky barrier interface can greatly reduce the reverse leakage. However, the disadvantage of this barrier Schottky diode is that the added "P" or "N" type island region occupies a part of the area of the original Schottky barrier interface; so in the case of forward voltage In this case, the area that can conduct current becomes smaller, so the forward current will also be relatively reduced, thus reducing the function and efficiency of forward conduction current. Therefore, how to limit the range of lateral (horizontal) diffusion of "P" or "N" type semiconductor ions, and at the same time bend the effective Schottky barrier interface into a curved surface to increase the conductive area and compensate for the area occupied by the shaped islands, It is a problem that needs to be solved in the production process of the barrier Schottky diode.

Contents of the invention

The technical problem to be solved by the present invention is to provide a method for manufacturing junction barrier Schottky diodes using a silicon selective oxidation technology, which can reduce the lateral (horizontal direction) of "P" or "N" heterogeneous semiconductor ions added. At the same time, the effective Schottky barrier interface is bent into a curved surface to increase the conductive area, compensate for the area occupied by the special-shaped islands, and effectively improve the forward-conducting function and efficiency of the barrier junction Schottky diode.

In order to solve the above problems, the present invention is achieved through the following schemes:

A method for manufacturing a junction barrier Schottky diode using a silicon selective oxidation technique, comprising a crystal generating step and a packaging step, wherein the crystal generating step includes:

(1) Cover a silicon epitaxial layer on the silicon wafer substrate;

(2) A thin layer of silicon oxide is first grown on the silicon epitaxial layer, and then a layer of silicon nitride is deposited on it;

(3) A plurality of block photoresist regions are formed on the surface of the silicon nitride layer by photolithography, and these block photoresist regions are independently distributed and cover the surface of the silicon nitride layer;

(4) Etch the silicon nitride under the area not covered by photoresist by dry etching, and then remove the photoresist;

(5) Use the furnace tube sintering method to grow a layer of thick silicon oxide bidirectionally on the upper and lower surfaces of the silicon oxide in the area without silicon nitride. At this time, due to the downward growth of silicon oxide, the silicon surface becomes some mutually independent lower layers. convex surface;

(6) Use phosphoric acid to remove the remaining silicon nitride;

(7) Impurity ions are implanted on the crystal surface obtained in step (6) by ion implantation. At this time, there is a thick silicon oxide region on the wafer surface as described in step (5), and the impurity ions are blocked from entering the silicon surface;

(8) Use the furnace tube sintering method to diffuse the impurity ions below the surface of the silicon wafer and form a PN junction with the protruding surface area;

(9) forming a ring-shaped photoresist region on the surface of the crystal obtained in step (8) by photolithography, the ring-shaped photoresist region is located at the edge of the crystal surface and covers the crystal surface;

(10) Etch the silicon oxide under the area not covered by photoresist by dry or wet etching, and then remove the photoresist;

(11) Depositing Schottky metal on the surface of the wafer obtained in step (10), and forming a Schottky interface of metal silicon by furnace tube or rapid heat treatment;

(12) Evaporate or sputter a thick surface metal layer on the surface of the wafer obtained in step (11), and then use photolithography and etching to separate or separate the surface metal layer;

(13) Thin the silicon wafer substrate to an appropriate thickness, and evaporate or sputter the metal layer on the bottom of the wafer.

In the above step (2), the silicon oxide is SiO ₂ , and the silicon nitride is Si ₃ N ₄ .

In the above step (2), the thickness of silicon oxide is smaller than that of silicon nitride.

In the above step (8), the diffusion depth of the impurity ions in the vertical direction is less than or equal to the depth of the protruding curved surface under the epitaxial layer.

In the above method, when an N+ type silicon substrate is used, the covered epitaxial layer is an N-type epitaxial layer, and the implanted impurity ions are P-type boron ions or boron compound ions; in addition, when using a P+ type In the case of a silicon wafer substrate, the covered epitaxial layer is a P-type epitaxial layer, and the implanted ions are N-type phosphorus ions or arsenic ions.

Compared with the prior art, the present invention uses the formation of LOCOS (local oxidation of silicon) silicon oxide to effectively limit the diffusion range of implanted impurity ions between the LOCOS silicon oxide regions, thereby effectively reducing the P region or The scope of the lateral (horizontal) diffusion of the N region reduces the Schottky interface occupied by the lateral diffusion of the P region or the N region, so the area of the Schottky interface can be fully utilized, and the effective Schottky The barrier interface is bent into a curved surface to increase the conductive area and compensate for the area occupied by the shaped islands, thereby improving the forward-conducting function and efficiency of the barrier junction Schottky diode.

Description of drawings

1 to 9 are schematic diagrams of crystal structures obtained in each sub-step of the crystal formation step described in Example 1.

FIG. 10 is a schematic diagram of the final crystal structure obtained by implementing the crystal formation step described in 2.

detailed description

Example 1:

A method for manufacturing a junction barrier Schottky diode using a silicon selective oxidation technique, comprising a crystal generating step and a packaging step, wherein the crystal generating step includes:

(1) An N-type silicon epitaxial layer is covered on the N+ type silicon wafer substrate. As shown in Figure 1.

(2) A thin layer of silicon oxide is first grown on the N-type silicon epitaxial layer, and a layer of silicon nitride is deposited on it; and the thickness of silicon oxide is smaller than that of silicon nitride. In this embodiment, the silicon oxide is SiO ₂ with a thickness of about 300 angstroms; the silicon nitride is Si ₃ N ₄ with a thickness of about 2000 angstroms.

(3) A plurality of block photoresist regions are formed on the surface of the silicon nitride layer by photolithography, and these block photoresist regions are independently distributed and cover the surface of the silicon nitride layer. as shown in picture 2.

(4) Etch away the silicon nitride under the non-block photoresist area (the part not covered by the photoresist at this time) by dry etching, and then remove the photoresist. As shown in Figure 3.

(5) Use the furnace tube sintering method to grow a layer of thick silicon oxide bidirectionally up and down in the non-blocky photoresist area (in this case, the area without silicon nitride coverage), with a thickness of about 1um. Due to the downward growth of the silicon oxide, the lower surface of the silicon becomes some mutually independent downward protruding curved surfaces; and due to the upward growth of the silicon oxide, the upper surface of the silicon becomes some mutually independent upward protruding curved surfaces. As shown in Figure 4.

(6) Use phosphoric acid to remove the remaining silicon nitride.

(7) Implanting P-type boron ions or boron compound ions on the surface of the crystal obtained in step (6) by ion implantation. At this time, since there is a thick silicon oxide region on the surface of the wafer as described in step (5), boron ions or boron compound ions are blocked from entering the silicon surface, that is, boron ions or boron compound ions are limited to the protruding curved surface between. As shown in Figure 5.

(8) Use furnace tube sintering method to diffuse boron or boron compound ions below the silicon surface and form a PN junction with the lower convex surface area. Due to the barrier of thick silicon oxide, the diffusion width of boron or boron compound ions in the horizontal direction is limited between the thick silicon oxide layers. In addition, the diffusion depth of boron or boron compound ions in the vertical direction is less than or equal to the depth of the recessed region, that is, the bottom of boron or boron compound ions after diffusion is higher than the bottom of the thick silicon oxide layer. at the height of the water level. As shown in Figure 6.

(9) Forming a ring-shaped photoresist region on the surface of the crystal obtained in step (8) by photolithography, the ring-shaped photoresist region is located at the edge of the crystal surface and covers the crystal surface. As shown in Figure 7.

(10) Etch away the silicon oxide under the area not covered by photoresist by dry or wet etching, and then remove the photoresist. As shown in Figure 8.

(11) Deposit Schottky metal on the surface of the wafer obtained in step (10), and form the Schottky interface of metal silicon by furnace tube or rapid heat treatment. As shown in Figure 9.

(12) Evaporate or sputter a thick anode surface metal layer on the surface of the wafer obtained in step (11), and then separate or separate the anode surface metal layer by photolithography and etching.

(13) Thin the silicon substrate to an appropriate thickness, and vapor-deposit or sputter the metal layer on the back of the cathode on the bottom of the wafer.

Example 2:

In Example 2, the N-type and P-type in Example 1 can be interchanged to obtain a barrier junction Schottky diode with P+ type substrate, P-type epitaxial layer and N-type ion implantation, as shown in Figure 10 . which is

A method for manufacturing a junction barrier Schottky diode using a silicon selective oxidation technique, comprising a crystal generating step and a packaging step, wherein the crystal generating step includes:

(1) Cover a P-type silicon epitaxial layer on the P+-type silicon wafer substrate; as shown in Figure 1.

(2) A thin layer of silicon oxide is first grown on the P-type silicon epitaxial layer, and then a layer of silicon nitride is deposited on it; and the thickness of silicon oxide is smaller than that of silicon nitride. In this embodiment, the silicon oxide is SiO ₂ with a thickness of about 300A; the silicon nitride is Si ₃ N ₄ with a thickness of about 2000A. The above 1A=10 ^-4 u.

(3) A plurality of block photoresist regions are formed on the surface of the silicon nitride layer by photolithography, and these block photoresist regions are independently distributed and cover the surface of the silicon nitride layer.

(4) Etch away the silicon nitride under the non-block photoresist area (the part not covered by the photoresist at this time) by dry etching, and then remove the photoresist.

(5) Use the furnace tube sintering method to grow a layer of thick silicon oxide bidirectionally up and down in the non-blocky photoresist area (in this case, the area without silicon nitride coverage), with a thickness of about 1um. Due to the downward growth of the silicon oxide, the lower surface of the silicon becomes some mutually independent downward protruding curved surfaces; and due to the upward growth of the silicon oxide, the upper surface of the silicon becomes some mutually independent upward protruding curved surfaces.

(6) Use phosphoric acid to remove the remaining silicon nitride.

(7) Implanting N-type phosphorus ions or arsenic ions on the surface of the crystal obtained in step (6) by ion implantation. At this time, since there is a thick silicon oxide region in step (5) on the surface of the wafer, phosphorus ions or arsenic ions are blocked from entering the silicon surface, that is, phosphorus ions or arsenic ions are confined between the lower convex curved surfaces.

(8) Diffusion of phosphorous ions or arsenic ions below the silicon surface by furnace tube sintering method to form a PN junction with the lower protruding curved surface area. Due to the blocking of the thick silicon oxide, the diffusion width of phosphorus ions or arsenic ions in the horizontal direction is limited between the thick silicon oxide layers. In addition, the diffusion depth of phosphorus ions or arsenic ions in the vertical direction is less than or equal to the depth of the recessed region, that is, the horizontal plane at the bottom of the diffused phosphorus or arsenic ions is higher than the horizontal plane at the bottom of the thick silicon oxide layer high.

(9) Forming a ring-shaped photoresist region on the surface of the crystal obtained in step (8) by photolithography, the ring-shaped photoresist region is located at the edge of the crystal surface and covers the crystal surface.

(10) Etch away the silicon oxide under the area not covered by photoresist by dry or wet etching, and then remove the photoresist.

(11) Deposit Schottky metal on the surface of the wafer obtained in step (10), and form the Schottky interface of metal silicon by furnace tube or rapid heat treatment; as shown in Figure 10.

(12) Evaporate or sputter a thick cathode surface metal layer on the surface of the wafer obtained in step (11), and then separate or separate the cathode surface metal layer by photolithography and etching.

(13) Thin the silicon wafer substrate to an appropriate thickness, and evaporate or sputter the metal layer on the back of the anode on the bottom surface of the wafer.

Claims (5)

1. the method for using the selective oxidation technology of silicon to manufacture junction barrier Schottky diode, comprises crystal generation step and encapsulation step, it is characterized in that: described crystal generation step comprises: (1) covering a layer of silicon epitaxial layer on the silicon wafer substrate; (2) First grow a thin layer of silicon oxide on the silicon epitaxial layer, and then deposit a layer of silicon nitride on it; (3) Forming a plurality of block photoresist regions on the surface of the silicon nitride layer by photolithography, and these block photoresist regions are independently distributed and cover the surface of the silicon nitride layer; (4) Etch the silicon nitride under the area not covered by the photoresist by dry etching, and then remove the photoresist; (5) Use the furnace tube sintering method to grow a thick layer of silicon oxide bidirectionally on the upper and lower surfaces of the silicon oxide in the area without silicon nitride. At this time, due to the downward growth of the silicon oxide, the silicon surface becomes some independent lower layers convex surface; (6) Use phosphoric acid to remove the remaining silicon nitride; (7) impurity ions are implanted on the surface of the crystal obtained in step (6) by ion implantation. At this time, the surface of the wafer has a region of thick silicon oxide described in step (5), and the impurity ions are blocked and cannot enter the silicon surface; (8) Diffusion of impurity ions below the surface of the silicon wafer by the furnace tube sintering method to form a P region, which forms a PN junction with the lower N-type silicon epitaxial layer; (9) forming a ring-shaped photoresist region on the surface of the crystal obtained in step (8) by photolithography, the ring-shaped photoresist region is located at the edge of the crystal surface and covers the crystal surface; (10) Etch away the silicon oxide under the area not covered by photoresist by dry or wet etching, and then remove the photoresist; (11) Deposit Schottky metal on the surface of the wafer gained in step (10), and form the Schottky interface of metal silicon with furnace tube or rapid heat treatment method; (12) Evaporate or sputter a thick surface metal layer on the surface of the wafer obtained in step (11), then use photolithography and etching methods to separate or separate the surface metal layer; (13) Thin the silicon wafer substrate to an appropriate thickness, and vapor-deposit or sputter the back metal layer on the bottom surface of the wafer. 2. the method for using the selective oxidation technology of silicon to manufacture junction barrier Schottky diodes according to claim 1, is characterized in that: in step (2), described silicon oxide is SiO ₂ , and described silicon nitride is Si ₃ N ₄ . 3. The method for manufacturing junction barrier Schottky diodes using silicon selective oxidation technology according to claim 1 or 2, characterized in that: in step (2), the thickness of silicon oxide is smaller than the thickness of silicon nitride. 4. the method for using the selective oxidation technology of silicon to manufacture junction barrier Schottky diodes according to claim 1 is characterized in that: in step (8), the diffusion depth of impurity ions in the vertical direction is less than or equal to that under the epitaxial layer The depth of the convex surface. 5. the method for using the selective oxidation technology of silicon to manufacture junction barrier Schottky diode according to claim 1, is characterized in that: When an N+ type silicon substrate is used, the covered epitaxial layer is an N-type epitaxial layer, and the implanted impurity ions are P-type boron ions or boron compound ions; When a P+ type silicon wafer substrate is used, the covered epitaxial layer is a P− type epitaxial layer, and the implanted impurity ions are N type phosphorus ions or arsenic ions.