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CN103647028A - Array substrate, manufacturing method thereof and display device - Google Patents

Array substrate, manufacturing method thereof and display device Download PDF

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Publication number
CN103647028A
CN103647028A CN201310706776.0A CN201310706776A CN103647028A CN 103647028 A CN103647028 A CN 103647028A CN 201310706776 A CN201310706776 A CN 201310706776A CN 103647028 A CN103647028 A CN 103647028A
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layer
anode
array substrate
gate
active layer
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CN103647028B (en
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宋泳锡
刘圣烈
崔承镇
金熙哲
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BOE Technology Group Co Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment

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Abstract

本发明公开了一种阵列基板制作方法，包括：在基板上形成包括数据线、源极及漏极的图形；形成包括有源层的图形；形成包括栅绝缘层的图形，且露出所述漏极与待形成的阳极连接的区域；形成包括栅线、栅极及阳极的图形；形成包括像素定义层、有机材料层及透明阴极的图形。还公开了一种阵列基板及显示装置。本发明的方法减少了mask的次数，从而节省了制作工艺流程和制作成本。

Figure 201310706776

The invention discloses a manufacturing method of an array substrate, comprising: forming a pattern including data lines, source electrodes and drain electrodes on the substrate; forming a pattern including an active layer; forming a pattern including a gate insulating layer, and exposing the drain The area where the electrode is connected to the anode to be formed; the pattern including the gate line, the gate and the anode is formed; the pattern including the pixel definition layer, the organic material layer and the transparent cathode is formed. Also disclosed are an array substrate and a display device. The method of the present invention reduces the number of masks, thereby saving the production process and production cost.

Figure 201310706776

Description

Array base palte and preparation method thereof, display unit
Technical field
The present invention relates to Display Technique field, particularly a kind of array base palte and preparation method thereof, display unit.
Background technology
The AMOLED display unit of traditional top transmitting as shown in Figure 1, comprise: be formed on the first grid 2 on substrate 1, second grid 2 ＇ and grid line (not shown), be formed on first grid 2, gate insulation layer 3 on second grid 2 ＇ and grid line, be formed on the first active layer 4 and the second active layer 4 ＇ on gate insulation layer 3, be formed on the etching barrier layer 5 on the first active layer 4 and the second active layer 4 ＇, the the first source-drain layer 6(being formed on etching barrier layer 5 comprises the first source electrode and the first drain electrode) and the second source-drain layer 6 ＇ (comprising the second source electrode and the second drain electrode), be formed on the passivation layer 7 on the first source-drain layer 6 and the second source-drain layer 6 ＇.Wherein, first grid 2, gate insulation layer 3, the first active layer 4, etching barrier layer 5 and the first source-drain layer 6 form switching thin-film transistor (switching TFT), and second grid 2 ＇, gate insulation layer 3, the second active layer 4 ＇, etching barrier layer 5 and the second source-drain layer 6 ＇ form and drive thin-film transistor (drive TFT).
Passivation layer 7 is formed on the first source-drain layer 6 and the second source-drain layer 6 ＇, is also formed with for anode 8(opaque on it) connect the via hole of the second source-drain layer 6 ＇, anode 8 is formed on passivation layer 7.On anode 8, be also formed with pixel defining layer 11 and organic luminous layer 9, on organic luminous layer 9, form transparent cathode 10.
Wherein, active layer is oxide semiconductor material normally, and the TFT forming is OxideTFT, therefore also need extra one deck etching barrier layer 5 in case when etching source-drain layer oxide semiconductor material be damaged, affect the performance of TFT.Therefore, making above-mentioned AMOLED display unit needs 7 masking process (mask) to form (via hole on the via hole on the via hole on grid, gate insulation layer, active layer, etching barrier layer, source-drain layer, passivation layer, each mask of pixel defining layer) conventionally, complex process, cost is high.
Summary of the invention
(1) technical problem that will solve
The technical problem to be solved in the present invention is: the manufacture craft and the cost that how to reduce display unit.
(2) technical scheme
For solving the problems of the technologies described above, the invention provides a kind of array substrate manufacturing method, comprising:
On substrate, form the figure that comprises data wire, source electrode and drain electrode;
Formation comprises the figure of active layer;
Formation comprises the figure of gate insulation layer, and exposes the region of described drain electrode and anodic bonding to be formed;
Formation comprises the figure of grid line, grid and anode;
Formation comprises the figure of pixel defining layer, organic material layer and transparent cathode.
Wherein, described formation comprises that the step of the figure of active layer specifically comprises:
On the substrate that is formed with data wire, source electrode and drain electrode, form photoresist;
Described photoresist is carried out to exposure imaging, remove the photoresist of the graphics field of corresponding described active layer;
Form successively active layer material film, in the graphics field of the described active layer of correspondence, active layer material film connects described source electrode and drain electrode;
Peel off remaining photoresist and be formed on the active layer material film on described residue photoresist, to form the figure of described active layer.
Wherein, described active layer material film is oxide semiconductor thin-film.
Wherein, described formation comprises that the step of the figure of grid line, grid and anode specifically comprises:
Form gate electrode material film being formed with on the substrate of gate insulation layer;
By composition technique, form the figure comprise grid line, grid and anode, drain described in described anodic bonding.
Wherein, the thickness of described gate electrode material film is:
Figure BDA0000441902390000021
Wherein, grid material is to have the metal of reflective characteristic or the metallic compound of conduction.
The metal wherein, with reflective characteristic comprises: Ag, Au, Al, Ti or Cr; The metallic compound of described conduction comprises: AlX, MoX or CuX.
The present invention also provides a kind of array base palte, comprises the grid line and the data wire that are formed on substrate, and a plurality of pixel cells that limited by described grid line and data wire, and described in each, pixel cell is divided into TFT regions and light-emitting zone;
Described TFT regions is formed with at least one thin-film transistor, and described thin-film transistor comprises source-drain electrode layer, active layer, gate insulation layer and the grid being formed on successively on described substrate;
Above the substrate of described light-emitting zone, be formed with anode, the drain electrode of source-drain electrode layer described in described anodic bonding, described anode and grid are same material and form in one-time process, anode top is formed with organic luminous layer and negative electrode successively, and the organic luminous layer of described anode and anode corresponding region and negative electrode are formed with OLED jointly;
On described thin-film transistor, be also formed with pixel defining layer.
Wherein, described organic luminous layer and negative electrode cover whole substrate regions, and described pixel defining layer is formed between thin-film transistor and described organic luminous layer.
Wherein, described pixel defining layer also covers described grid line and data wire corresponding region.
Wherein, the material of described grid and anode is to have the metal of reflective characteristic or the metallic compound of conduction.
The metal wherein, with reflective characteristic comprises: Ag, Au, Al, Ti or Cr; The metallic compound of described conduction comprises: AlX, MoX or CuX.
Wherein, the thickness of described grid and anode is:
Figure BDA0000441902390000031
The present invention also provides a kind of display unit, comprises the array base palte described in above-mentioned any one.
(3) beneficial effect
Adopt the manufacture method of array base palte of the present invention to reduce the number of times of mask, thereby saved fabrication processing and cost of manufacture.
Accompanying drawing explanation
The array base-plate structure schematic diagram of the OLED display unit of Fig. 1 existing top transmitting;
Fig. 2 forms the structural representation of source-drain electrode layer on substrate in array substrate manufacturing method of the present invention;
Fig. 3 forms the structural representation of photoetching offset plate figure on the basis of Fig. 2;
Fig. 4 is the structural representation that forms active layer and etching barrier layer material film on the basis of Fig. 3;
Fig. 5 is the structural representation that forms active layer and etching barrier layer figure on the basis of Fig. 4;
Fig. 6 forms the structural representation of gate insulation layer on the basis of Fig. 5;
Fig. 7 forms the structural representation of via hole on the basis of Fig. 6 on gate insulation layer;
Fig. 8 forms the structural representation of gate electrode material film on the basis of Fig. 7;
Fig. 9 forms the structural representation of grid and anode on the basis of Fig. 8;
Figure 10 forms the structural representation of pixel defining layer on the basis of Fig. 9;
Figure 11 is the structural representation of the final array base palte forming of method of the present invention.
Embodiment
Below in conjunction with drawings and Examples, the specific embodiment of the present invention is described in further detail.Following examples are used for illustrating the present invention, but are not used for limiting the scope of the invention.
The array substrate manufacturing method of the embodiment of the present invention comprises the steps:
Step 1, at substrate 101(transparency carrier, as glass substrate or quartz base plate) the upper figure that forms data wire, source-drain electrode layer.This step can be specifically on substrate 101, to form (mode that can be sputter, evaporation or chemical vapour deposition (CVD) CVD forms) source to leak metallic film, then by composition technique (generally including the techniques such as photoresist coating, exposure, development, etching, photoresist lift off), form the figure of source electrode 102a and drain electrode 102b, as shown in Figure 2.
Step 2 forms the figure of active layer on the substrate of Fig. 1.Specifically comprise:
On the substrate 101 of Fig. 1, apply photoresist, as shown in Figure 3, photoresist is carried out to exposure imaging, remove the photoresist of active layer and etching barrier layer region A, residue photoresist 103.
As shown in Figure 4, form successively active layer material film 104 ＇, except active layer material film 104 ＇ of active layer region A cover on substrate 101, active layer material film 104 ＇ in other region all cover on photoresist 103.In Fig. 4, at source layer material film 104 ＇, one deck etching barrier layer material film 105 ＇ can also have been formed.
As shown in Figure 5, peel off residue photoresist 103, form the figure of active layer 104.In the present embodiment, active layer material is oxide semiconductor, as IGZO.In Fig. 5, can also form the figure (etching barrier layer 105 is not essential) of etching barrier layer 105.
Step 3, forms and to comprise the figure of gate insulation layer, and exposes the region of drain electrode and anodic bonding to be formed.This step specifically comprises:
As shown in Figure 6, on the substrate after step 2, form gate insulation layer 106.
As shown in Figure 7, in the present embodiment, by composition technique in the region formation of drain electrode 102b and anodic bonding to be formed the via hole 107 through gate insulation layer 106.Certainly the gate insulation layer film in the region of anode region and drain electrode and anodic bonding to be formed can also be fallen by composition technique direct etching, finally to form gate insulation layer 106.
Step 4, forms the figure that comprises grid line, grid and anode.This step specifically comprises:
As shown in Figure 8, on the substrate after step 3, form gate electrode material film 108.
As shown in Figure 9, form the figure of grid 109 by composition technique at area of grid C, anode region D forms the figure of anode 110.After forming, grid 109 formed the thin-film transistor (comprising source electrode 102a, drain electrode 102b, active layer 104, etching barrier layer 105, gate insulation layer 106 and grid 109) of top gate structure.
In the present embodiment, because anode 110 will reflect the light that luminous organic material sends, therefore, the material of grid 109 and anode 110 is to have the metal of reflective characteristic or the metallic compound of conduction, can be Ag, Au, AlX, MoX, CuX, Al, Ti or Cr, wherein AlX, MoX or CuX be the metallic compounds of conduction.The thickness of grid 109 and anode 110 is:
Step 5, forms the figure that comprises pixel defining layer, organic material layer and transparent cathode.Specifically comprise:
As shown in figure 10, region E(on substrate after step 4 is TFT regions) by composition technique, form pixel defining layer 111, the region F that does not form pixel defining layer 111 is pixel region, it is the light-emitting zone of organic luminous layer, conventionally pixel defining layer 111 is mainly used in blocking the region that TFT, grid line and data wire are corresponding, to avoid the active layer 104 of the oxide semiconductor in thin-film transistor by illumination, thus the performance of assurance thin-film transistor.
On 10 basis, form successively in the drawings organic luminous layer 112 and negative electrode 113, as shown in figure 11, the anode 110 that region F is corresponding, organic luminous layer 112 and negative electrode 113 are formed with OLED jointly, thereby form the array base palte of OLED display unit.
The array substrate manufacturing method of the present embodiment is composition technique in step 1 to respectively having used a mask(in step 5), totally 5 mask.7 mask techniques with respect to existing array base palte, have reduced number mask time, have saved technological process and cost.
The embodiment of the present invention also provides the array base palte that has said method to make, and comprises the grid line and the data wire that are formed on substrate, and a plurality of pixel cells that limited by described grid line and data wire.Described in each, pixel cell as shown in figure 11, is divided into TFT regions E and light-emitting zone F;
TFT regions E is formed with at least one thin-film transistor, and described thin-film transistor comprises that the source-drain electrode layer that is formed on successively on described substrate 101 (comprising source electrode 102a and drain electrode 102b), active layer 104, etching barrier layer 105(can not have etching barrier layer 105 yet), gate insulation layer 106 and grid 109.
Above the substrate 101 of light-emitting zone F, be formed with anode 110, anode 110 connects the drain electrode 102b of described source-drain electrode layer.Anode 110 is same material with grid 109 and forms in one-time process.Anode top is formed with organic luminous layer 112 and negative electrode 113 successively, and organic luminous layer 112 and the negative electrode 113 of anode 110 and anode 110 corresponding regions (being region F) are formed with OLED jointly.This thin-film transistor is used for driving Organic Light Emitting Diode.
On described thin-film transistor, be also formed with pixel defining layer 111.Region due to organic luminous layer 112 when making and the whole substrate 101 of negative electrode 113 covering, for fear of the light that organic luminous layer 112 is luminous and light-emitting zone F sends of thin-film transistor corresponding region E and have influence on the performance of thin-film transistor, pixel defining layer 111 is formed between thin-film transistor and organic luminous layer 112.Pixel defining layer 111 also covers grid line and data wire corresponding region.
The array base palte of the present embodiment is the array base palte of top transmitting OLED display unit, therefore the material of grid 109 and anode 110 is to have the metal of reflective characteristic or the metallic compound of conduction, as: Ag, Au, AlX, MoX, CuX, Al, Ti or Cr etc., wherein AlX, MoX or CuX are the metallic compounds of conduction.The thickness of grid 109 and anode 110 is:
The present invention also provides a kind of display unit, comprises above-mentioned array base palte.This display unit can be: any product or parts with Presentation Function such as oled panel, mobile phone, panel computer, television set, display, notebook computer, DPF, navigator.
Above execution mode is only for illustrating the present invention; and be not limitation of the present invention; the those of ordinary skill in relevant technologies field; without departing from the spirit and scope of the present invention; can also make a variety of changes and modification; therefore all technical schemes that are equal to also belong to category of the present invention, and scope of patent protection of the present invention should be defined by the claims.

Claims (14)

1.一种阵列基板制作方法，其特征在于，包括：1. A method for manufacturing an array substrate, comprising: 在基板上形成包括数据线、源极及漏极的图形；forming patterns including data lines, source electrodes and drain electrodes on the substrate; 形成包括有源层的图形；forming a pattern comprising an active layer; 形成包括栅绝缘层的图形，且露出所述漏极与待形成的阳极连接的区域；forming a pattern including a gate insulating layer, and exposing a region where the drain is connected to the anode to be formed; 形成包括栅线、栅极及阳极的图形；forming a pattern including grid lines, grids and anodes; 形成包括像素定义层、有机材料层及透明阴极的图形。A pattern including a pixel definition layer, an organic material layer and a transparent cathode is formed. 2.如权利要求1所述的阵列基板制作方法，其特征在于，所述形成包括有源层的图形的步骤具体包括：2. The method for manufacturing an array substrate according to claim 1, wherein the step of forming the pattern including the active layer specifically comprises: 在形成有数据线、源极及漏极的基板上形成光刻胶；forming a photoresist on the substrate formed with data lines, source electrodes and drain electrodes; 对所述光刻胶进行曝光显影，去除对应所述有源层的图形区域的光刻胶；Exposing and developing the photoresist to remove the photoresist corresponding to the pattern area of the active layer; 依次形成有源层材料薄膜，在对应所述有源层的图形区域，有源层材料薄膜连接所述源极和漏极；forming an active layer material film in sequence, and connecting the source electrode and the drain electrode in the pattern area corresponding to the active layer; 剥离剩余的光刻胶及形成在所述剩余光刻胶上的有源层材料薄膜，以形成所述有源层的图形。stripping off the remaining photoresist and the active layer material film formed on the remaining photoresist to form the pattern of the active layer. 3.如权利要求2所述的阵列基板制作方法，其特征在于，所述有源层材料薄膜为氧化物半导体薄膜。3. The method for fabricating an array substrate according to claim 2, wherein the active layer material thin film is an oxide semiconductor thin film. 4.如权利要求1所述的阵列基板制作方法，其特征在于，所述形成包括栅线、栅极及阳极的图形的步骤具体包括：4. The method for fabricating an array substrate according to claim 1, wherein the step of forming a pattern including a gate line, a gate, and an anode specifically comprises: 在形成有栅绝缘层的基板上形成栅极材料薄膜；forming a gate material thin film on the substrate formed with the gate insulating layer; 通过构图工艺形成包括栅线、栅极及阳极的图形，所述阳极连接所述漏极。A pattern including a gate line, a gate and an anode is formed through a patterning process, and the anode is connected to the drain. 5.如权利要求4所述的阵列基板制作方法，其特征在于，所述栅极材料薄膜的厚度为： 5. The method for manufacturing an array substrate according to claim 4, wherein the thickness of the gate material film is: 6.如权利要求4所述的阵列基板制作方法，其特征在于，栅极材料为具有反光特性的金属或导电的金属化合物。6 . The method for fabricating the array substrate according to claim 4 , wherein the gate material is a metal or a conductive metal compound with reflective properties. 7 . 7.如权利要求6所述的阵列基板制作方法，其特征在于，所述具有反光特性的金属包括：Ag、Au、Al、Ti或Cr；所述导电的金属化合物包括：AlX、MoX或CuX。7. The method for fabricating an array substrate according to claim 6, wherein the metal with reflective properties comprises: Ag, Au, Al, Ti or Cr; the conductive metal compound comprises: AlX, MoX or CuX . 8.一种阵列基板，包括形成在基板上的栅线和数据线，以及由所述栅线和数据线限定的多个像素单元，其特征在于，每个所述像素单元划分为薄膜晶体管区域和发光区域；8. An array substrate, comprising gate lines and data lines formed on the substrate, and a plurality of pixel units defined by the gate lines and data lines, characterized in that each of the pixel units is divided into thin film transistor regions and the luminous area; 所述薄膜晶体管区域形成有至少一个薄膜晶体管，所述薄膜晶体管包括依次形成在所述基板之上的源漏电极层、有源层、栅绝缘层和栅极；The thin film transistor region is formed with at least one thin film transistor, and the thin film transistor includes a source and drain electrode layer, an active layer, a gate insulating layer and a gate sequentially formed on the substrate; 在所述发光区域的基板上方形成有阳极，所述阳极连接所述源漏电极层的漏极，所述阳极与栅极为相同材料且在一次工艺中形成，阳极上方依次形成有有机发光层和阴极，且所述阳极及阳极对应区域的有机发光层和阴极共同形成有机发光二极管；An anode is formed above the substrate of the light-emitting region, the anode is connected to the drain of the source-drain electrode layer, the anode and the gate are made of the same material and formed in one process, and an organic light-emitting layer and an organic light-emitting layer are sequentially formed above the anode a cathode, and the anode and the organic light-emitting layer and the cathode in the region corresponding to the anode jointly form an organic light-emitting diode; 所述薄膜晶体管之上还形成有像素定义层。A pixel definition layer is also formed on the thin film transistor. 9.如权利要求8所述的阵列基板，其特征在于，所述有机发光层和阴极覆盖整个基板区域，所述像素定义层形成在薄膜晶体管和所述有机发光层之间。9. The array substrate according to claim 8, wherein the organic light emitting layer and the cathode cover the entire substrate area, and the pixel definition layer is formed between the thin film transistor and the organic light emitting layer. 10.如权利要求9所述的阵列基板，其特征在于，所述像素定义层还覆盖所述栅线和数据线对应区域。10 . The array substrate according to claim 9 , wherein the pixel definition layer also covers areas corresponding to the gate lines and the data lines. 11 . 11.如权利要求8～10中任一项所述的阵列基板，其特征在于，所述栅极和阳极的材料为具有反光特性的金属或导电的金属化合物。11. The array substrate according to any one of claims 8-10, wherein the material of the grid and the anode is a metal or a conductive metal compound with light-reflecting properties. 12.如权利要求11所述的阵列基板，其特征在于，所述具有反光特性的金属包括：Ag、Au、Al、Ti或Cr；所述导电的金属化合物包括：AlX、MoX或CuX。12 . The array substrate according to claim 11 , wherein the metal with reflective properties comprises: Ag, Au, Al, Ti or Cr; and the conductive metal compound comprises: AlX, MoX or CuX. 13.如权利要求8～10中任一项所述的阵列基板，其特征在于，所述栅极和阳极的厚度为：
Figure FDA0000441902380000021
13. The array substrate according to any one of claims 8-10, wherein the thicknesses of the grid and the anode are:
Figure FDA0000441902380000021
 14.一种显示装置，其特征在于，包括如权利要求8～13中任一项所述的阵列基板。14. A display device, comprising the array substrate according to any one of claims 8-13.
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CN106410030A (en) * 2016-11-08 2017-02-15 深圳市华星光电技术有限公司 Manufacturing method of organic thin-film transistor
CN108231824A (en) * 2016-12-16 2018-06-29 京东方科技集团股份有限公司 A kind of OLED display panel and preparation method thereof
CN109407893A (en) * 2018-12-17 2019-03-01 武汉华星光电半导体显示技术有限公司 Touch-control display panel and preparation method thereof
US11188178B2 (en) 2018-12-17 2021-11-30 Wuhan China Star Optofi Fctronics Semiconductor Display Technology Co., Ltd. Touch display panel, manufacturing method thereof, and touch display device
CN115132655A (en) * 2022-06-28 2022-09-30 Tcl华星光电技术有限公司 Display panel manufacturing method and display panel
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