CN103634604B - Multi-core DSP (digital signal processor) motion estimation-oriented data prefetching method - Google Patents

Abstract

The invention discloses a multi-core DSP (digital signal processor) motion estimation-oriented data prefetching method. According to the method, data of a coding block and a reference block are prefetched to a local storage according to the space relevancy of data in motion estimation and the data of a prediction motion vector prefetching coding bock and the reference block, so the parallel performing between the motion estimation operation of the current coding block and the data loading operation of the next code block and the reference block are realized, the influence of the storage to the speed of a multi-core processor in the motion estimation is reduced, and tests prove that the data prefetching method enables the motion estimation processing speed in the multi-core DSP parallel video coding to be obviously improved.

Description

A data prefetching method for multi-core DSP motion estimation

technical field

The invention belongs to the field of multimedia encoding and decoding, and in particular relates to a data prefetching method for motion estimation in parallel video coding of an embedded multi-core DSP processor, which is a method for accelerating video motion estimation processing through data prefetching.

Background technique

Motion estimation is one of the main components of video coding based on the hybrid coding framework. Motion estimation completes operations such as prediction, motion search, motion compensation, DCT transformation, and quantization in units of data blocks. In video coding, motion estimation takes data blocks as units. Processing unit, the data block of motion estimation in H.264/AVC encoding includes macroblock (MB), sub-macroblock, block, etc., the data block of motion estimation in HEVC encoding includes coding unit (CU), prediction unit (PU) and Transform unit (TU), etc., the motion estimation of P frame needs the data of the current coded frame and a reference frame, the motion estimation of B frame needs the data of the current coded frame and a forward reference frame, a backward reference frame, and the processed data The throughput is very high. In the video sequence of 1080i format, the resolution of each frame image is 1920×1080, 60 frames of images are output per second, and the encoded data generated per second by YUV (4:2:0) format reaches 0.746Gbps. The estimated data reaches above 1.5Gbps, and with the improvement of video quality, the amount of generated video data is still increasing sharply. Video coding in embedded systems is increasingly implemented by multi-core DSP processors. The embedded multi-core DSP processor has a multi-level storage structure. Each core has its own local memory, and all cores share MSM memory and large-capacity off-chip memory. The local memory has a small capacity and the fastest speed; the MSM memory is large and slow, and the external memory has a large capacity and slow speed. Due to the small local storage space of the multi-core DSP processor, the data of the entire coded frame and reference frame cannot be stored. It is necessary to divide the coded frame and reference frame into small data blocks, and store the data of the current coded block and reference block of the coded frame in Internal memory while encoded frames and reference frames are stored in external memory. As shown in Figure 1, in the embedded multi-core video encoder, the video data is first obtained from video acquisition and temporarily stored in a large-capacity external memory, and is read from the external memory to the internal memory for calculation during encoding. However, the processor The performance increases at a rate of 60% per year, while the memory access performance increases by less than 10% per year. The performance gap between the processor and the memory is still increasing, and the memory becomes the bottleneck of the system performance. Seriously, due to the large amount of data required for motion estimation, the memory bottleneck becomes an important factor affecting the processing speed.

In order to reduce the impact of storage bottlenecks, the storage performance of multi-core processors using a multi-level storage structure is guaranteed by the hit rate of the Cache. However, a Cache miss in a multi-level storage structure will cause long delays in external memory access operations, and the long delay time can reach up to Hundreds of processor clock cycles reduce the execution speed of the processor. For example, the worst-case delay of TMS320C6678 memory Cache read failure is 287 clock cycles, totaling 287ns (the core works at 1GHz). In motion estimation, the amount of data to be processed is large, and the impact caused by Cache misses is more obvious. The data prefetch technology reads the data in advance before the data is used, and reduces the waiting time of the processor by overlapping calculation and memory access operations. The existing patent application No. 200410101465.2 "Method for reading macroblock data in the process of video encoding and decoding" solves the problem of buffer hit rate failure by establishing a "macroblock address mapping table", but this method only provides a The index method of macroblock data in video frames can only reduce the impact of Cache failure, and does not realize the problem of data prefetching of reference frames in encoding. In motion estimation, data of multiple reference blocks often needs to be searched, and the amount of data is larger. , which also has a greater impact on motion estimation. The patent "data prefetching system in video processing" with the application number of 200710046929.8 implements data block prefetching by adding a "data prefetching module" between the processor and the memory, but this way of realizing prefetching by adding hardware units does not It is suitable for commercial embedded DSP processors, and because of the lack of synchronization mechanism, this method is not suitable for parallel implementation of multi-core DSP processors.

The present invention prefetches the data of coded frames and reference frames according to the data spatial correlation and predicted motion vectors of motion estimation processing in parallel coding, realizes the parallelism of data reading and motion estimation processing, and effectively reduces the storage bottleneck for multi-core DSP processing The influence of processor processing speed, experiments show that this method effectively improves the execution speed of embedded multi-core DSP processor motion estimation.

Contents of the invention

In order to overcome the delay caused by multi-core DSP processor accessing the memory when it is applied to motion estimation, the present invention discloses a technology for prefetching the data of encoded frames and reference frames according to the spatial correlation of data in motion estimation and the predicted motion vector. When the previous data block is encoded, DMA is used to prefetch the next encoded block and reference data, realizing the parallelism of motion estimation data reading and processing. Experiments prove that this method effectively improves the processing speed of motion estimation operation of multi-core DSP processor.

To achieve the above object, the present invention adopts the following technical solutions:

A data prefetching method for multi-core DSP motion estimation (as shown in Figure 4), the steps are as follows:

Step 1. Set the size of the prefetched data block, divide the size of the coding block and the reference block, and store the data of the coding block and the reference block in the local memory of the core, and set the storage area as a Ping-Pang structure;

Step 2. If the coding block currently performing motion estimation belongs to a P frame, perform prediction and motion search operations, and prefetch the data of the next coding block and reference block;

Step 3. If the coding block currently performing motion estimation belongs to a B frame, perform prediction and motion search operations, and prefetch the data of the next coding block, forward reference block, and backward reference block.

The step 1 specifically includes the following operations:

(1) Coded frames and reference frames are divided into coded blocks and reference blocks according to the multi-core DSP local memory capacity and the size of data blocks processed in motion estimation. The data of coded image frames and reference frames are stored in the external large-capacity memory. The current coded block and the data of the reference block are stored in the local memory;

(2) The coded frame is divided into coded blocks and coded lines. As shown in Figure 2, each core of the multi-core DSP performs the motion estimation operation in units of coded lines, that is, the current core immediately obtains the next first motion estimation operation after finishing a coded line motion estimation operation Continue without motion estimation encoding;

(3) Set the system control table. The system control table includes the current encoding frame counter, the first encoding row indicator in the current encoding frame that has not performed motion estimation operation, and the encoding status table of the current encoding frame. The system control table is shared by multiple cores, and the Realize the synchronization of each core;

(4) Set a Ping-Pang structure storage area for the current encoding block and the reference data block in the local memory, the current encoding is Pang, and the data is prefetched to Ping.

The step 2 specifically includes the following steps:

(1) If the current coding block belongs to a P frame, perform the prediction and motion search operations in the motion estimation of the coding block;

(2) Start DMA to prefetch the data of the next coding block of the current coding block from the external memory to the internal memory of the core, and the source address, destination address, and data block size are calculated according to formula (1);

$\left\{\begin{array}{c}\mathrm{<span\; class="notranslate">\; DMA</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; src</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; fenc</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; base</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; corei</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; line</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; line</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; block</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; block</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; size</span>}\\ <span\; class="notranslate">\; +</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; corei</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; block</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; block</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; width</span>}\\ \mathrm{<span\; class="notranslate">\; DMA</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; dst</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; corei</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; fenc</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; base</span>}\\ \mathrm{<span\; class="notranslate">\; data</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; size</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; block</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; size</span>}\end{array}\right.<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span>$

Where block_width is the width of the coding block, block_hight is the height of the coding block, block_size is the size of the coding block, block_size=block_width×block_hight, DMA_src is the source address of the i-th core DMA transfer data, DMA_dst is the destination address of the i-th core DMA transfer data , data_size is the size of the transported data, corei_fenc_base is the starting address of the encoding block data of the i-th core stored internally, fenc_base is the starting address of the current encoding frame, corei_line is the current encoding line of the i-th core, and line_block is the encoding line Size, corei_block is the current coding block of the i-th core.

(3) Start DMA to prefetch the data of the reference block of the next coding block of the current coding block from the external memory to the internal memory of the core, that is, prefetch the data of multiple reference blocks centered on the predicted motion vector in the reference frame to For the local memory of the core, the number of prefetched reference data blocks is determined by the motion search method, and the source address, destination address, and data block size are calculated according to formula (2);

$\left\{\begin{array}{c}\mathrm{<span\; class="notranslate">\; DMA</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; src</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; fref</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; base</span>}\\ <span\; class="notranslate">\; +</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; mvp</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; line</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; pix</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; block</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; width</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; mvp</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; block</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; hight</span>}<span\; class="notranslate">\; )</span>\\ \mathrm{<span\; class="notranslate">\; DMA</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; dst</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; corei</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; ref</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; base</span>}\\ \mathrm{<span\; class="notranslate">\; data</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; size</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; block</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; size</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; bref</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; size</span>}\end{array}\right.<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; )</span>$

Among them, DMA_src is the source address of the i-th core DMA handling data, DMA_dst is the destination address of the i-th core DMA handling data, fref_base is the first address of the reference frame, line_pix is the number of pixels in a line in the reference frame, mvp_x, mvp_y are motion vectors Predicted value. After the motion search of the current coding block is completed, the motion vector prediction value can be obtained according to the motion vector prediction method. corei_ref_base is the first address of the data storage of the reference block, bref_size is the size of the reference data block, and other parameters are the same as formula (1);

(4) Perform motion compensation (MC), DCT transformation, and quantization operations;

(5) Update the control table, and set the encoding flag of the current encoding block;

(6) Steps (1), (2), (3), (4), and (5) are repeated until the motion estimation operation of each coding block in the current coding line ends.

Described step 3 specifically comprises the following steps:

(1) If the current coding block belongs to a B frame, perform the prediction and motion search operations in the motion estimation of the coding block;

(2) Start DMA to prefetch the data of the next coding block of the current coding block from the external memory to the local memory of the core, and the source address, destination address, and data block size are calculated according to formula (1);

(3) Start DMA to prefetch the data of the forward reference block of the next data block of the current coding block to the internal memory of the core, that is, prefetch the data of multiple reference blocks centered on the predicted motion vector in the reference frame to the core The local memory of , the number of prefetched reference blocks is determined by the motion search method, and the source address, destination address, and data block size are calculated according to formula (2);

(4) Start DMA to prefetch the data of the backward reference block of the next data block of the current coding block to the internal memory of the core, that is, prefetch the data of multiple reference blocks centered on the predicted motion vector in the reference frame to the core The local storage area of , the number of prefetched reference blocks is determined by the motion search method, and the source address, destination address, and data block size are calculated according to formula (2);

(5) Perform motion compensation (MC), DCT transformation, and quantization operations;

(6) Update the control table, and set the encoding flag of the current encoding block;

(7) Steps (1), (2), (3), (4), (5), and (6) are repeated until the motion estimation operation of each coding block in the current coding line ends.

The advantage of the present invention compared with prior art is:

1. The present invention realizes the parallelism of data reading and data processing in motion estimation, and accelerates the encoding speed of multi-core DSP processors;

2. The pre-reading of the motion estimation data realized by the data pre-fetching method of the present invention makes full use of the memory bandwidth and reduces the memory bottleneck problem;

3. The present invention makes full use of the DMA high-speed data transmission part of the embedded multi-core DSP processor to speed up the data transmission process.

Description of drawings

A schematic diagram of the multi-core encoder storage structure in Fig. 1 video surveillance;

Fig. 2 schematic diagram of coding row division in the present invention;

Fig. 3 is a schematic diagram of a data storage structure in a specific embodiment of the present invention;

FIG. 4 is a flowchart of a data prefetching method for multi-core DSP parallel video coding in the present invention.

detailed description

The specific implementation of the present invention in TMS320C6678LE evaluation board of TI Company is given below.

TI's TMS320C6678LE evaluation board contains a TMS320C6678 chip, and the external storage space is DDR3 memory, 512MB. TMS320C6678 chip contains 8 cores, core0 to core7, each core has a working frequency of 1.0GHz, each core contains 32KB primary data buffer memory L1D and 32KB primary program buffer memory L1P, each core has 512KB secondary memory Shared memory MSM with 4MB, set the first-level data buffer memory as cache, the coded block and reference block data in motion estimation are stored in the secondary memory, and the coded video and reference frame data are stored in the external memory DDR3.

The motion estimation adopts the diamond search method, and the search window is 48×48, so the data of 9 reference blocks centered on the motion vector prediction value are prefetched in the reference frame. The video format is YUV4:2:0, the resolution is 704×576, and the encoding block size is 16×16, so one encoding frame has 36 encoding lines, each encoding line has 44 encoding blocks, and the video start address is 0x82000000, before The starting address of the forward reference frame is 0x80000000, and the starting address of the backward reference frame is 0x80800000. The current encoding block data of each core and the first address of the reference block data are corei_fenc_base, corei_ref_base0, corei_ref_base1, and each storage area is a Ping-Pang structure. That is, the current motion estimation uses Pang data, and the prefetched data is stored in Ping.

Set the parallel encoding control table, the control table includes enc_tab, cur_enc_frame, first_unenc_line, the encoding control table and motion vector are multi-core shared data, stored in the MSM memory on-chip, as shown in Figure 3, multi-core is accessed in a mutually exclusive manner, and the semaphore For semphone0, other encoding parameters are stored in L2 of each core. Each core of core0~core7 sets the current coding line indicator core0_line~core7_line and the current coding block indicator core0_block~core0_block, corei_line is used to indicate the line number of the coding line processed by the current core, and corei_block is used to indicate the number of the current core coding block.

The data prefetch between DDR3 and L2 is realized by QDMA. core0~core7 respectively use QDMA0~QDMA7 of TCC0 in EDMA3 as the data prefetch channel of each core, set to AB-sync and LINK mode, and the PaRAMSet of QDMA0~QDMA7 is 00 ～02, 10～12, 20～22, 30～32, 40～42, 50～52, 60～62, 70～72.

The specific implementation process is:

(1) core0 reads in the video sequence and records the total number of frames of the video sequence (total_frames);

(2) core0 initializes the global parameters, the cur_enc_frame of the control table is initialized to -1, and the first_unenc_line is -1;

(3) Judging whether there are unencoded frames, that is, whether cur_enc_frame is greater than total_frames, if greater, the encoding ends, otherwise transfer to (4);

(4) Initialize the encoding state table as "0", and first_unenc_line as 0;

(5) Determine whether there is an unencoded line, that is, whether first_unenc_line is greater than 36, if it is greater than the current encoding frame ends, go to (3), otherwise, go to (6);

(6) Obtain the coding line, that is, each core reads first_unenc_line to corei_line in a mutually exclusive manner, corei_block=0, first_unenc_line plus 1;

(7) Calculate the first address of the encoding block by cur_enc_frame, corei_line, corei_block, and the three component addresses of Y, U, and V are respectively:

$\left\{\begin{array}{c}\mathrm{<span\; class="notranslate">\; Y</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0</span>}\mathrm{<span\; class="notranslate">\; x</span>}\mathrm{<span\; class="notranslate">\; 82000000</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; cur</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; enc</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; frame</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; 608256</span>}\\ <span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; corei</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; line</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; 11264</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; corei</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; block</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; 16</span>}\\ \mathrm{<span\; class="notranslate">\; u</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0</span>}\mathrm{<span\; class="notranslate">\; x</span>}\mathrm{<span\; class="notranslate">\; 82000000</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; cur</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; enc</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; frame</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; 608256</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 0</span>}\mathrm{<span\; class="notranslate">\; x</span>}\mathrm{<span\; class="notranslate">\; 63000</span>}\\ <span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; corei</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; line</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; 5632</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; corei</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; block</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; 8</span>}\\ \mathrm{<span\; class="notranslate">\; V</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0</span>}\mathrm{<span\; class="notranslate">\; x</span>}\mathrm{<span\; class="notranslate">\; 82000000</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; cur</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; enc</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; frame</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; 608256</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 0</span>}\mathrm{<span\; class="notranslate">\; wxya</span>}\mathrm{<span\; class="notranslate">\; 00</span>}\\ <span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; corei</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; line</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; 5632</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; corei</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; blick</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; 8</span>}\end{array}\right.$

data_size are: 256, 64, 64;

(8) Judging whether the motion search of the left, upper left, upper, and upper right adjacent to the current coding block is completed, if completed, continue, if not completed, wait for the end of the adjacent block motion search;

(9) Determine whether the data of the current encoding block is transported to L2, if so, continue, otherwise wait for the end of the transport;

(10) Perform prediction and motion search operations for coding blocks;

(11) Prefetch the next coded block and its reference macroblock data as shown in Figure 4. The source address, destination address, and data block size of the prefetched data of the P frame coded block and the B frame coded block are determined by formula (1) and Formula (2) calculation, block_width is 16, block_hight is 16, line_pix is 704, fenc_base=0x82000000+cur_enc_frame×608256, bref_size is 9;

(12) Perform motion compensation (MC), DCT transformation, and quantization operations;

(13) Modify enc_tab in the control table, that is, enc_tab[corei_line,corei_block]=1;

(14) Judging whether the current coding line is over, that is, whether corei_block is less than 44, if it is, turn to (8) to continue the current coding line processing, otherwise turn to (5) for the next coding line processing;

(15) Repeat (5) to (14) until the processing of all video frames of the video ends.

The test results are shown in the table below: (QP=27)

When the video image group is IBBP BBP BBP BBP BB structure, the average performance is improved by about 15%.

Claims (3)

1. A data prefetching method for multi-core DSP motion estimation, characterized in that: the steps are as follows: Step 1. Set the size of the prefetched data block, divide the size of the coding block and the reference block, and store the data of the coding block and the reference block in the local memory of the core, and set the storage area as a Ping-Pang structure; Step 2. If the coding block currently performing motion estimation belongs to a P frame, perform prediction and motion search operations, and prefetch the data of the next coding block and reference block; Step 3. If the coding block currently performing motion estimation belongs to a B frame, perform prediction and motion search operations, and prefetch the data of the next coding block, forward reference block, and backward reference block; The step 1 specifically includes the following operations: (1) Coding frames and reference frames are divided into coding blocks and reference blocks according to the local storage capacity of the multi-core DSP and the data block size processed in motion estimation. The data of the coding frames and reference frames are stored in the external large-capacity memory, and the current coding block and The data of the reference block is stored in the local memory; (2) The coded frame is divided into coded blocks and coded lines, and each core of the multi-core DSP performs the motion estimation operation in units of coded lines, that is, the current core obtains the first coded line without motion estimation immediately after finishing the motion estimation operation of a coded line keep going; (3) Set the system control table. The system control table includes the current coded frame counter, the first coded row indicator in the current coded frame without motion estimation operation, and the coded state table of the current coded frame. The system control table is shared by multiple cores to realize Synchronization of each core; (4) Ping-Pang structure storage areas are set for the current coding block and the reference data block in the local memory, the current coding is Pang, and the data is prefetched to Ping. 2. a kind of data prefetching method facing multi-core DSP motion estimation according to claim 1, is characterized in that: described step 2 specifically comprises the steps: (2.1) If the current coding block belongs to a P frame, perform prediction and motion search operations on the coding block; (2.2) DMA is started to prefetch the data of the next coded block of the current coded block to the internal memory of the core from the external memory, and the source address, destination address, and data block size are calculated by formula (1); $\left\{\begin{array}{c}\mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; m</span>}\mathrm{<span\; class="notranslate">\; A</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; r</span>}\mathrm{<span\; class="notranslate">\; c</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; f</span>}\mathrm{<span\; class="notranslate">\; e</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; c</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; e</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; o</span>}\mathrm{<span\; class="notranslate">\; r</span>}\mathrm{<span\; class="notranslate">\; e</span>}\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; l</span>}\mathrm{<span\; class="notranslate">\; i</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; e</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; l</span>}\mathrm{<span\; class="notranslate">\; i</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; e</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; l</span>}\mathrm{<span\; class="notranslate">\; o</span>}\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; l</span>}\mathrm{<span\; class="notranslate">\; o</span>}\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; i</span>}\mathrm{<span\; class="notranslate">\; z</span>}\mathrm{<span\; class="notranslate">\; e</span>}\\ <span\; class="notranslate">\; +</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; o</span>}\mathrm{<span\; class="notranslate">\; r</span>}\mathrm{<span\; class="notranslate">\; e</span>}\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; l</span>}\mathrm{<span\; class="notranslate">\; o</span>}\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; l</span>}\mathrm{<span\; class="notranslate">\; o</span>}\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; w</span>}\mathrm{<span\; class="notranslate">\; i</span>}\mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; t</span>}\mathrm{<span\; class="notranslate">\; h</span>}\\ \mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; m</span>}\mathrm{<span\; class="notranslate">\; A</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; o</span>}\mathrm{<span\; class="notranslate">\; r</span>}\mathrm{<span\; class="notranslate">\; e</span>}\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; f</span>}\mathrm{<span\; class="notranslate">\; e</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; c</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; e</span>}\\ \mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; t</span>}\mathrm{<span\; class="notranslate">\; a</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; i</span>}\mathrm{<span\; class="notranslate">\; z</span>}\mathrm{<span\; class="notranslate">\; e</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; l</span>}\mathrm{<span\; class="notranslate">\; o</span>}\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; i</span>}\mathrm{<span\; class="notranslate">\; z</span>}\mathrm{<span\; class="notranslate">\; e</span>}\end{array}\right.<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span>$ Where block_width is the width of the coding block, block_hight is the height of the coding block, block_size is the size of the coding block, block_size=block_width×block_hight, DMA_src is the source address of the i-th core DMA transfer data, DMA_dst is the destination address of the i-th core DMA transfer data , data_size is the size of the transported data, corei_fenc_base is the starting address of the encoding block data of the i-th core stored internally, fenc_base is the starting address of the current encoding frame, corei_line is the current encoding line of the i-th core, and line_block is the encoding line Size, corei_block is the current coding block of the i-th core; (2.3) Start the DMA to prefetch the data of the reference block of the next coding block of the current coding block from the external memory to the internal memory of the core, that is, prefetch the data of multiple reference blocks centered on the predicted motion vector in the reference frame to For the local memory of the core, the number of prefetched reference data blocks is determined by the motion search method, and the source address, destination address, and data block size are calculated according to formula (2); $\left\{\begin{array}{c}\mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; m</span>}\mathrm{<span\; class="notranslate">\; A</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; r</span>}\mathrm{<span\; class="notranslate">\; c</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; f</span>}\mathrm{<span\; class="notranslate">\; r</span>}\mathrm{<span\; class="notranslate">\; e</span>}\mathrm{<span\; class="notranslate">\; f</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; e</span>}\\ <span\; class="notranslate">\; +</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; m</span>}\mathrm{<span\; class="notranslate">\; v</span>}\mathrm{<span\; class="notranslate">\; p</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; l</span>}\mathrm{<span\; class="notranslate">\; i</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; e</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; p</span>}\mathrm{<span\; class="notranslate">\; i</span>}\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; l</span>}\mathrm{<span\; class="notranslate">\; o</span>}\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; w</span>}\mathrm{<span\; class="notranslate">\; i</span>}\mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; t</span>}\mathrm{<span\; class="notranslate">\; h</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; m</span>}\mathrm{<span\; class="notranslate">\; v</span>}\mathrm{<span\; class="notranslate">\; p</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; l</span>}\mathrm{<span\; class="notranslate">\; o</span>}\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; h</span>}\mathrm{<span\; class="notranslate">\; i</span>}\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; h</span>}\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; )</span>\\ \mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; m</span>}\mathrm{<span\; class="notranslate">\; A</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; o</span>}\mathrm{<span\; class="notranslate">\; r</span>}\mathrm{<span\; class="notranslate">\; e</span>}\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; r</span>}\mathrm{<span\; class="notranslate">\; e</span>}\mathrm{<span\; class="notranslate">\; f</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; e</span>}\\ \mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; t</span>}\mathrm{<span\; class="notranslate">\; a</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; i</span>}\mathrm{<span\; class="notranslate">\; z</span>}\mathrm{<span\; class="notranslate">\; e</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; l</span>}\mathrm{<span\; class="notranslate">\; o</span>}\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; i</span>}\mathrm{<span\; class="notranslate">\; z</span>}\mathrm{<span\; class="notranslate">\; e</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; r</span>}\mathrm{<span\; class="notranslate">\; e</span>}\mathrm{<span\; class="notranslate">\; f</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; i</span>}\mathrm{<span\; class="notranslate">\; z</span>}\mathrm{<span\; class="notranslate">\; e</span>}\end{array}\right.<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; )</span>$ Among them, DMA_src is the source address of the i-th core DMA handling data, DMA_dst is the destination address of the i-th core DMA handling data, fref_base is the first address of the reference frame, line_pix is the number of pixels in a line in the reference frame, mvp_x, mvp_y are motion vectors Prediction value, after the motion search of the current coded block is completed, the motion vector prediction value can be obtained according to the motion vector prediction method, corei_ref_base is the first address of the data storage of the reference block, bref_size is the number of reference data blocks, and other parameters are the same as formula (1); (2.4) Perform motion compensation (MC), DCT transformation, and quantization operations; (2.5) Update the system control table, and the current encoding block encoding flag position is set; (2.6) Steps (2.1), (2.2), (2.3), (2.4), (2.5) are repeated until the motion estimation operation of each coding block in the current coding line ends. 3. a kind of data prefetching method facing multi-core DSP motion estimation according to claim 1, is characterized in that: described step 3 specifically comprises the steps: (3.1) If the current coding block belongs to a B frame, perform prediction and motion search operations on the coding block; (3.2) DMA is started to prefetch the data of the next coded block of the current coded block to the local memory of the core from the external memory, and the source address, destination address, and data block size are calculated by formula (1); (3.3) Start DMA to prefetch the data of the forward reference block of the next data block of the current coding block to the internal memory of the core, that is, prefetch the data of multiple reference blocks centered on the predicted motion vector in the reference frame to the core The local memory of the prefetching reference block is determined by the motion search method, and the source address, destination address, and data block size are calculated according to formula (2); (3.4) Start DMA to prefetch the data of the backward reference block of the next data block of the current coding block to the internal memory of the core, that is, prefetch the data of multiple reference blocks centered on the predicted motion vector in the reference frame to the core The local storage area, the number of prefetched reference blocks is determined by the motion search method, and the source address, destination address, and data block size are calculated according to formula (2); (3.5) Perform motion compensation (MC), DCT transformation, and quantization operations; (3.6) Update the system control table, and the current encoding block encoding flag position is set; (3.7) Steps (3.1), (3.2), (3.3), (3.4), (3.5), (3.6) are repeated until the motion estimation operation of each coding block in the current coding line ends.