CN103604795B - A kind of across yardstick thermometal collaborative enhancing Raman scattering chip and preparation method thereof - Google Patents
A kind of across yardstick thermometal collaborative enhancing Raman scattering chip and preparation method thereof Download PDFInfo
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Abstract
本发明公开了一种跨尺度双金属协同增强拉曼散射芯片，包括芯片基底，所述芯片基底上加工有微结构阵列，所述微结构阵列表面镀有两层金属膜；本发明还公开了一种制备跨尺度双金属协同增强拉曼散射芯片的方法，首先选取适合的芯片基底材料，然后在所选基底材料表面加工微结构阵列，最后在微结构阵列表面依次镀两层金属膜。本发明的跨尺度双金属协同增强拉曼散射芯片具有跨尺度多级结构，芯片基底的微米级结构与金属纳米级岛膜结构之间的协同作用以及两层金属膜的双金属协同作用，使该芯片集多重拉曼增强因子于一身，具有超高的分析灵敏度；本发明制备拉曼芯片的方法简单，重复性高，易于实现规模化生产。
The invention discloses a cross-scale bimetal synergistically enhanced Raman scattering chip, which includes a chip base, on which a microstructure array is processed, and the surface of the microstructure array is coated with two layers of metal films; the invention also discloses A method for preparing a cross-scale bimetal synergistically enhanced Raman scattering chip. First, a suitable chip substrate material is selected, then a microstructure array is processed on the surface of the selected substrate material, and finally two layers of metal films are sequentially plated on the surface of the microstructure array. The cross-scale bimetal synergistically enhanced Raman scattering chip of the present invention has a cross-scale multi-level structure, the synergy between the micron-scale structure of the chip substrate and the metal nano-scale island film structure and the bimetallic synergy of the two-layer metal film make the The chip integrates multiple Raman enhancement factors and has ultra-high analysis sensitivity; the method for preparing the Raman chip of the invention is simple, has high repeatability, and is easy to realize large-scale production.
Description
技术领域technical field
本发明涉及一种拉曼芯片及其制备方法，特别涉及一种跨尺度双金属协同增强拉曼散射芯片及其制备方法。The invention relates to a Raman chip and a preparation method thereof, in particular to a cross-scale bimetal synergistically enhanced Raman scattering chip and a preparation method thereof.
背景技术Background technique
入射光与物质分子相互作用时引起分子做受迫振动从而产生散射光，其中散射光的频率和入射光的频率相同的谱线是瑞利散射，散射光的频率和入射光的频率不同的谱线是拉曼散射。拉曼散射光谱是特征指纹光谱，与物质分子的振动、转动能级有关，能反映被测物质的分子组成和结构形态，是分析物质结构的有力工具；但由于拉曼光谱的信号强度非常弱，因而其检测灵敏度低，致使拉曼光谱在很长一段时间内没有得到很好的应用。When the incident light interacts with the material molecules, the molecules are forced to vibrate to produce scattered light, where the frequency of the scattered light is the same as that of the incident light is Rayleigh scattering, and the frequency of the scattered light is different from that of the incident light Lines are Raman scattering. Raman scattering spectrum is a characteristic fingerprint spectrum, which is related to the vibration and rotational energy levels of substance molecules, and can reflect the molecular composition and structural shape of the measured substance. It is a powerful tool for analyzing the structure of substances; , so its detection sensitivity is low, so Raman spectroscopy has not been well applied for a long time.
表面增强拉曼光谱技术的出现，极大地改善了这一状况。当物质分子吸附在粗糙的金属表面时，表面局域等离子激元被激发引起的电磁增强（即物理增强），以及粗糙表面上的原子簇与吸附其上的分子形成拉曼增强的活性点（即化学增强），这两者的作用使被测物的拉曼散射产生极大的增强效应，其增强因子可达103～107。研究表明，双金属复合纳米结构与单组份金属纳米结构相比，具有独特的电子学和光学性质能够增强拉曼光谱检测效果。目前，双金属复合纳米材料主要采用化学合成法制备，该方法在制备过程中存在金属纳米材料的形状和尺寸较难控制的缺陷，因而难以实现规模化生产，无法满足大量分析测试的需求，从而限制了其产业化及在各个领域的应用。The emergence of surface-enhanced Raman spectroscopy has greatly improved this situation. When material molecules are adsorbed on a rough metal surface, the electromagnetic enhancement (that is, physical enhancement) caused by the excitation of surface localized plasmons, and the atomic clusters on the rough surface and the molecules adsorbed on it form Raman-enhanced active points ( That is, chemical enhancement), the action of the two makes the Raman scattering of the measured object produce a great enhancement effect, and its enhancement factor can reach 10 3 to 10 7 . Studies have shown that compared with single-component metal nanostructures, bimetallic composite nanostructures have unique electronic and optical properties that can enhance the detection effect of Raman spectroscopy. At present, bimetallic composite nanomaterials are mainly prepared by chemical synthesis, which has the defect that the shape and size of metal nanomaterials are difficult to control during the preparation process, so it is difficult to achieve large-scale production and cannot meet the needs of a large number of analytical tests. It limits its industrialization and application in various fields.
发明内容Contents of the invention
有鉴于此，本发明的目的在于提供一种具有高检测灵敏度的拉曼芯片，本发明还提供一种可大规模制备拉曼芯片的方法。In view of this, the purpose of the present invention is to provide a Raman chip with high detection sensitivity, and the present invention also provides a method for large-scale preparation of Raman chips.
为达到上述目的，本发明提供如下技术方案：本发明的跨尺度双金属协同增强拉曼散射芯片，包括芯片基底，所述芯片基底上加工有微结构阵列，所述微结构阵列表面依次镀有两层金属膜。In order to achieve the above object, the present invention provides the following technical solutions: the cross-scale bimetal synergistically enhanced Raman scattering chip of the present invention includes a chip substrate, on which a microstructure array is processed, and the surface of the microstructure array is sequentially plated with Two layers of metal film.
本发明的跨尺度双金属协同增强拉曼散射芯片具有跨尺度多级结构，芯片基底的微米级结构与金属纳米级岛膜结构之间的协同作用以及两层金属膜的双金属协同作用，使该芯片集多重拉曼增强因子于一身，具有更加显著的拉曼散射增强能力。The cross-scale bimetal synergistically enhanced Raman scattering chip of the present invention has a cross-scale multi-level structure, the synergy between the micron-scale structure of the chip substrate and the metal nano-scale island film structure and the bimetallic synergy of the two-layer metal film make the The chip integrates multiple Raman enhancement factors, and has a more significant Raman scattering enhancement capability.
进一步，所述芯片基底材料为硅、玻璃、石英、聚二甲基硅氧烷或聚甲基丙烯酸甲酯。Further, the chip base material is silicon, glass, quartz, polydimethylsiloxane or polymethylmethacrylate.
进一步，所述微结构阵列的微结构呈柱形、锥形、球形、三角形、金字塔形或倒金字塔形。Further, the microstructures of the microstructure array are cylindrical, conical, spherical, triangular, pyramidal or inverted pyramidal.
进一步，所述微结构阵列的微结构尺寸为0.5～100μm，阵列周期为0.5～100μm。Further, the microstructure size of the microstructure array is 0.5-100 μm, and the array period is 0.5-100 μm.
进一步，所述金属为Au、Ag、Cu或Pt。Further, the metal is Au, Ag, Cu or Pt.
进一步，所述两层金属膜中第一层金属膜厚度为100～500nm，第二层金属膜厚度为5～100nm。Further, the thickness of the first metal film in the two-layer metal film is 100-500 nm, and the thickness of the second metal film is 5-100 nm.
本发明还公开了一种制备跨尺度双金属协同增强拉曼散射芯片的方法，包括以下步骤：The invention also discloses a method for preparing a cross-scale bimetal synergistically enhanced Raman scattering chip, comprising the following steps:
步骤一：选取硅、玻璃、石英、聚二甲基硅氧烷或聚甲基丙烯酸甲酯作为芯片基底材料；Step 1: Select silicon, glass, quartz, polydimethylsiloxane or polymethyl methacrylate as the chip substrate material;
步骤二：在所选基底材料表面加工微结构阵列，所加工的微结构阵列的微结构呈柱形、锥形、球形、三角形、金字塔形或倒金字塔形；Step 2: processing the microstructure array on the surface of the selected base material, the microstructure of the processed microstructure array is cylindrical, conical, spherical, triangular, pyramidal or inverted pyramidal;
步骤三：在微结构阵列表面依次镀两层金属膜。Step 3: coating two layers of metal films sequentially on the surface of the microstructure array.
进一步，所述微结构阵列的微结构尺寸为0.5～100μm，阵列周期为0.5～100μm。Further, the microstructure size of the microstructure array is 0.5-100 μm, and the array period is 0.5-100 μm.
进一步，所述两层金属膜中第一层金属膜厚度为100～500nm，第二层金属膜厚度为5～100nm。Further, the thickness of the first metal film in the two-layer metal film is 100-500 nm, and the thickness of the second metal film is 5-100 nm.
本发明制备跨尺度双金属协同增强拉曼散射芯片的方法简单，重复性高，易于实现规模化生产。The method for preparing the cross-scale bimetal synergistically enhanced Raman scattering chip of the present invention is simple, has high repeatability, and is easy to realize large-scale production.
附图说明Description of drawings
为了使本发明的目的、技术方案和有益效果更加清楚，本发明提供如下附图进行说明：In order to make the purpose, technical scheme and beneficial effect of the present invention clearer, the present invention provides the following drawings for illustration:
图1为实施例1制得的跨尺度双金属协同增强拉曼散射芯片的剖面结构示意图；Fig. 1 is the schematic cross-sectional structure diagram of the cross-scale bimetal synergistically enhanced Raman scattering chip prepared in embodiment 1;
图2为实施例1制得的跨尺度双金属协同增强拉曼散射芯片的扫描电子显微镜照片；Fig. 2 is the scanning electron micrograph of the cross-scale bimetallic synergistically enhanced Raman scattering chip prepared in embodiment 1;
图3为利用实施例1制得的跨尺度双金属协同增强拉曼散射芯片，通过532nm激发光的RenishawinVia显微拉曼光谱仪测试10nM罗丹明B的拉曼光谱图。Fig. 3 is the Raman spectrum of 10nM rhodamine B tested by a RenishawinVia micro-Raman spectrometer with 532nm excitation light using the cross-scale bimetal synergistically enhanced Raman scattering chip prepared in Example 1.
具体实施方式detailed description
下面将结合附图，对本发明的优选实施例进行详细的描述。The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
以下实施例将公开一种跨尺度双金属协同增强拉曼散射（Trans-scaleBimetallicSynergisticEnhancedRamanScattering，TBSERS）芯片，包括芯片基底1，所述芯片基底1上加工有微结构阵列，所述微结构阵列表面依次镀有两层金属膜2和3。The following examples will disclose a Trans-scale Bimetallic Synergistic Enhanced Raman Scattering (TBSERS) chip, including a chip substrate 1 on which a microstructure array is processed, and the surface of the microstructure array is sequentially plated There are two metal films 2 and 3.
其中，所述芯片基底1材料为硅、玻璃、石英、聚二甲基硅氧烷（PDMS）或聚甲基丙烯酸甲酯（PMMA）。Wherein, the material of the chip substrate 1 is silicon, glass, quartz, polydimethylsiloxane (PDMS) or polymethylmethacrylate (PMMA).
所述微结构阵列的微结构呈柱形、锥形、球形、三角形、金字塔形或倒金字塔形。The microstructures of the microstructure array are columnar, conical, spherical, triangular, pyramidal or inverted pyramidal.
所述微结构阵列的微结构尺寸为0.5～100μm，阵列周期为0.5～100μm。The microstructure size of the microstructure array is 0.5-100 μm, and the array period is 0.5-100 μm.
所述金属为Au、Ag、Cu或Pt。The metal is Au, Ag, Cu or Pt.
实施例1：Example 1:
本实施例制备TBSERS芯片的方法，包括以下步骤：This embodiment prepares the method for TBSERS chip, comprises the following steps:
步骤一：选取芯片基底1材料；Step 1: Select the chip substrate 1 material;
步骤二：在所选基底材料表面加工微结构阵列；Step 2: processing the microstructure array on the surface of the selected base material;
步骤三：在微结构阵列表面依次镀两层金属膜。Step 3: coating two layers of metal films sequentially on the surface of the microstructure array.
作为本实施例制备TBSERS芯片的方法的改进，所述步骤一芯片基底1原材料为硅。As an improvement to the method for preparing the TBSERS chip in this embodiment, the raw material of the chip substrate 1 in the step 1 is silicon.
作为本实施例制备TBSERS芯片的方法的改进，所述步骤二所加工的微结构阵列的微结构呈倒金字塔形。As an improvement to the method for preparing the TBSERS chip in this embodiment, the microstructure of the microstructure array processed in the second step is in the shape of an inverted pyramid.
作为本实施例制备TBSERS芯片的方法的改进，所述微结构阵列的微结构尺寸为1.5μm，阵列周期为2.0μm。As an improvement to the method for preparing the TBSERS chip in this embodiment, the microstructure size of the microstructure array is 1.5 μm, and the array period is 2.0 μm.
作为本实施例制备TBSERS芯片的方法的改进，所镀金属膜为两层。As an improvement to the method for preparing the TBSERS chip in this embodiment, the metal film to be plated is two layers.
作为本实施例制备TBSERS芯片的方法的改进，所述两层金属膜中第一层金属膜厚度为300nm，第二层金属膜厚度为10nm。As an improvement to the method for preparing the TBSERS chip in this embodiment, the thickness of the first metal film in the two-layer metal film is 300 nm, and the thickness of the second metal film is 10 nm.
作为本实施例制备TBSERS芯片的方法的改进，所述两层金属膜中第一层金属膜为Au膜，所述第二层金属膜为Ag膜。As an improvement to the method for preparing the TBSERS chip in this embodiment, the first metal film in the two-layer metal film is an Au film, and the second metal film is an Ag film.
本实施例所制得的TBSERS芯片如图1所示，从下往上依次包括芯片基底1，附着在芯片基底1上的第一层金属膜2和附着在第一层金属膜2上的第二层金属膜3。The TBSERS chip prepared in this embodiment is shown in Figure 1, and includes a chip substrate 1 from bottom to top, a first layer of metal film 2 attached to the chip substrate 1, and a first layer of metal film 2 attached to the first layer of metal film 2. Two-layer metal film 3.
实施例2：Example 2:
本实施例制备TBSERS芯片的方法，包括以下步骤：This embodiment prepares the method for TBSERS chip, comprises the following steps:
步骤一：选取芯片基底1材料；Step 1: Select the chip substrate 1 material;
步骤二：在所选基底材料表面加工微结构阵列；Step 2: processing the microstructure array on the surface of the selected base material;
步骤三：在微结构阵列表面依次镀两层金属膜。Step 3: coating two layers of metal films sequentially on the surface of the microstructure array.
作为本实施例制备TBSERS芯片的方法的改进，所述步骤一芯片基底1原材料为玻璃。As an improvement to the method for preparing a TBSERS chip in this embodiment, the raw material of the first chip substrate 1 is glass.
作为本实施例制备TBSERS芯片的方法的改进，所述步骤二所加工的微结构阵列的微结构呈锥形。As an improvement to the method for preparing the TBSERS chip in this embodiment, the microstructures of the microstructure array processed in the second step are tapered.
作为本实施例制备TBSERS芯片的方法的改进，所述微结构阵列的微结构尺寸为2μm，阵列周期为2μm。As an improvement to the method for preparing the TBSERS chip in this embodiment, the microstructure size of the microstructure array is 2 μm, and the array period is 2 μm.
作为本实施例制备TBSERS芯片的方法的改进，所镀金属膜为两层。As an improvement to the method for preparing the TBSERS chip in this embodiment, the metal film to be plated is two layers.
作为本实施例制备TBSERS芯片的方法的改进，所述两层金属膜中第一层金属膜厚度为120nm，第二层金属膜厚度为20nm。As an improvement to the method for preparing the TBSERS chip in this embodiment, the thickness of the first metal film in the two-layer metal film is 120 nm, and the thickness of the second metal film is 20 nm.
作为本实施例制备TBSERS芯片的方法的改进，所述两层金属膜中第一层金属膜为Ag膜，所述第二层金属膜为Au膜。As an improvement to the method for preparing the TBSERS chip in this embodiment, the first metal film in the two-layer metal film is an Ag film, and the second metal film is an Au film.
实施例3：Example 3:
本实施例制备TBSERS芯片的方法，包括以下步骤：This embodiment prepares the method for TBSERS chip, comprises the following steps:
步骤一：选取芯片基底1材料；Step 1: Select the chip substrate 1 material;
步骤二：在所选基底材料表面加工微结构阵列；Step 2: processing the microstructure array on the surface of the selected base material;
步骤三：在微结构阵列表面依次镀两层金属膜。Step 3: coating two layers of metal films sequentially on the surface of the microstructure array.
作为本实施例制备TBSERS芯片的方法的改进，所述步骤一芯片基底1原材料为石英。As an improvement to the method for preparing the TBSERS chip in this embodiment, the raw material of the chip substrate 1 in the step 1 is quartz.
作为本实施例制备TBSERS芯片的方法的改进，所述步骤二所加工的微结构阵列的微结构呈球形。As an improvement to the method for preparing the TBSERS chip in this embodiment, the microstructures of the microstructure array processed in the second step are spherical.
作为本实施例制备TBSERS芯片的方法的改进，所述微结构阵列的微结构尺寸为30μm，阵列周期为30μm。As an improvement to the method for preparing the TBSERS chip in this embodiment, the microstructure size of the microstructure array is 30 μm, and the array period is 30 μm.
作为本实施例制备TBSERS芯片的方法的改进，所镀金属膜为两层。As an improvement to the method for preparing the TBSERS chip in this embodiment, the metal film to be plated is two layers.
作为本实施例制备TBSERS芯片的方法的改进，所述两层金属膜中第一层金属膜厚度为180nm，第二层金属膜厚度为30nm。As an improvement to the method for preparing the TBSERS chip in this embodiment, the thickness of the first metal film in the two-layer metal film is 180 nm, and the thickness of the second metal film is 30 nm.
作为本实施例制备TBSERS芯片的方法的改进，所述两层金属膜中第一层金属膜为Au膜，所述第二层金属膜为Pt膜。As an improvement to the method for preparing the TBSERS chip in this embodiment, the first metal film in the two-layer metal film is an Au film, and the second metal film is a Pt film.
实施例4：Example 4:
本实施例制备TBSERS芯片的方法，包括以下步骤：This embodiment prepares the method for TBSERS chip, comprises the following steps:
步骤一：选取芯片基底1材料；Step 1: Select the chip substrate 1 material;
步骤二：在所选基底材料表面加工微结构阵列；Step 2: processing the microstructure array on the surface of the selected base material;
步骤三：在微结构阵列表面依次镀两层金属膜。Step 3: coating two layers of metal films sequentially on the surface of the microstructure array.
作为本实施例制备TBSERS芯片的方法的改进，所述步骤一芯片基底1原材料为PDMS。As an improvement of the method for preparing the TBSERS chip in this embodiment, the raw material of the chip substrate 1 in the step 1 is PDMS.
作为本实施例制备TBSERS芯片的方法的改进，所述步骤二所加工的微结构阵列的微结构呈三角形。As an improvement to the method for preparing the TBSERS chip in this embodiment, the microstructure of the microstructure array processed in the second step is triangular in shape.
作为本实施例制备TBSERS芯片的方法的改进，所述微结构阵列的微结构尺寸为60μm，阵列周期为60μm。As an improvement to the method for preparing the TBSERS chip in this embodiment, the microstructure size of the microstructure array is 60 μm, and the array period is 60 μm.
作为本实施例制备TBSERS芯片的方法的改进，所镀金属膜为两层。As an improvement to the method for preparing the TBSERS chip in this embodiment, the metal film to be plated is two layers.
作为本实施例制备TBSERS芯片的方法的改进，所述两层金属膜中第一层金属膜厚度为220nm，第二层金属膜厚度为30nm。As an improvement to the method for preparing the TBSERS chip in this embodiment, the thickness of the first metal film in the two-layer metal film is 220 nm, and the thickness of the second metal film is 30 nm.
作为本实施例制备TBSERS芯片的方法的改进，所述两层金属膜中第一层金属膜为Cu膜，所述第二层金属膜为Ag膜。As an improvement to the method for preparing the TBSERS chip in this embodiment, the first metal film in the two-layer metal film is a Cu film, and the second metal film is an Ag film.
实施例5：Example 5:
本实施例制备TBSERS芯片的方法，包括以下步骤：This embodiment prepares the method for TBSERS chip, comprises the following steps:
步骤一：选取芯片基底1材料；Step 1: Select the chip substrate 1 material;
步骤二：在所选基底材料表面加工微结构阵列；Step 2: processing the microstructure array on the surface of the selected base material;
步骤三：在微结构阵列表面依次镀两层金属膜。Step 3: coating two layers of metal films sequentially on the surface of the microstructure array.
作为本实施例制备TBSERS芯片的方法的改进，所述步骤一芯片基底1原材料为PMMA。As an improvement to the method for preparing the TBSERS chip in this embodiment, the raw material of the chip substrate 1 in the step 1 is PMMA.
作为本实施例制备TBSERS芯片的方法的改进，所述步骤二所加工的微结构阵列的微结构呈金字塔形。As an improvement to the method for preparing the TBSERS chip in this embodiment, the microstructure of the microstructure array processed in the second step is pyramid-shaped.
作为本实施例制备TBSERS芯片的方法的改进，所述微结构阵列的微结构尺寸为80μm，阵列周期为80μm。As an improvement to the method for preparing the TBSERS chip in this embodiment, the microstructure size of the microstructure array is 80 μm, and the array period is 80 μm.
作为本实施例制备TBSERS芯片的方法的改进，所镀金属膜为两层。As an improvement to the method for preparing the TBSERS chip in this embodiment, the metal film to be plated is two layers.
作为本实施例制备TBSERS芯片的方法的改进，所述两层金属膜中第一层金属膜厚度为270nm，第二层金属膜厚度为40nm。As an improvement to the method for preparing the TBSERS chip in this embodiment, the thickness of the first metal film in the two-layer metal film is 270 nm, and the thickness of the second metal film is 40 nm.
作为本实施例制备TBSERS芯片的方法的改进，所述两层金属膜中第一层金属膜为Ag膜，所述第二层金属膜为Au膜。As an improvement to the method for preparing the TBSERS chip in this embodiment, the first metal film in the two-layer metal film is an Ag film, and the second metal film is an Au film.
实施例6：Embodiment 6:
本实施例制备TBSERS芯片的方法，包括以下步骤：This embodiment prepares the method for TBSERS chip, comprises the following steps:
步骤一：选取芯片基底1材料；Step 1: Select the chip substrate 1 material;
步骤二：在所选基底材料表面加工微结构阵列；Step 2: processing the microstructure array on the surface of the selected base material;
步骤三：在微结构阵列表面依次镀两层金属膜。Step 3: coating two layers of metal films sequentially on the surface of the microstructure array.
作为本实施例制备TBSERS芯片的方法的改进，所述步骤一芯片基底1原材料为PDMS。As an improvement of the method for preparing the TBSERS chip in this embodiment, the raw material of the chip substrate 1 in the step 1 is PDMS.
作为本实施例制备TBSERS芯片的方法的改进，所述步骤二所加工的微结构阵列的微结构呈柱形。As an improvement to the method for preparing the TBSERS chip in this embodiment, the microstructures of the microstructure array processed in the second step are columnar.
作为本实施例制备TBSERS芯片的方法的改进，所述微结构阵列的微结构尺寸为100μm，阵列周期为100μm。As an improvement to the method for preparing the TBSERS chip in this embodiment, the microstructure size of the microstructure array is 100 μm, and the array period is 100 μm.
作为本实施例制备TBSERS芯片的方法的改进，所镀金属膜为两层。As an improvement to the method for preparing the TBSERS chip in this embodiment, the metal film to be plated is two layers.
作为本实施例制备TBSERS芯片的方法的改进，所述两层金属膜中第一层金属膜厚度为300nm，第二层金属膜厚度为50nm。As an improvement to the method for preparing the TBSERS chip in this embodiment, the thickness of the first metal film in the two-layer metal film is 300 nm, and the thickness of the second metal film is 50 nm.
作为本实施例制备TBSERS芯片的方法的改进，所述两层金属膜中第一层金属膜为Au膜，所述第二层金属膜为Ag膜。As an improvement to the method for preparing the TBSERS chip in this embodiment, the first metal film in the two-layer metal film is an Au film, and the second metal film is an Ag film.
图2为实施例1制备的TBSERS芯片的扫描电子显微镜照片，从图中可以看出芯片表面的多级结构。FIG. 2 is a scanning electron micrograph of the TBSERS chip prepared in Example 1, from which it can be seen that the multi-level structure of the chip surface.
图3为利用实施例1的TBSERS芯片，通过532nm激发光的RenishawinVia显微拉曼光谱仪测试10nM罗丹明B的拉曼光谱图。从图中可以看出：通过TBSERS芯片可以检测到低浓度物质的拉曼信号，能明显区分其拉曼特征峰。Fig. 3 is the Raman spectrum of 10nM rhodamine B tested by the RenishawinVia micro-Raman spectrometer with 532nm excitation light using the TBSERS chip of Example 1. It can be seen from the figure that the Raman signal of low-concentration substances can be detected through the TBSERS chip, and its Raman characteristic peaks can be clearly distinguished.
最后说明的是，以上优选实施例仅用以说明本发明的技术方案而非限制，尽管通过上述优选实施例已经对本发明进行了详细的描述，但本领域技术人员应当理解，可以在形式上和细节上对其作出各种各样的改变，而不偏离本发明权利要求书所限定的范围。Finally, it should be noted that the above preferred embodiments are only used to illustrate the technical solutions of the present invention and not to limit them. Although the present invention has been described in detail through the above preferred embodiments, those skilled in the art should understand that it can be described in terms of form and Various changes may be made in the details without departing from the scope of the invention defined by the claims.
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