CN103580520A - Inverter modulating device and method - Google Patents

Abstract

The invention discloses an inverter modulation device and method. The invention controls the mutual switching of two modulation modes by detecting the output power and comparing the output power value with the set power value. When the output power is less than the set power, select A continuous modulation wave is used, and when the output power is greater than the set power, a discontinuous modulation wave is selected, and then the selected modulation wave passes through the output signal of the modulation device as the drive signal of the inverter. In the modulation method proposed by the present invention, when the inverter is light-loaded and the switching loss is not significant, the continuous modulation wave is used to reduce the loss on the output filter to improve efficiency, and when the inverter is heavy-loaded, the discontinuous modulation wave is used to The switching loss of the inverter is greatly reduced to improve efficiency, so that in the full power range, the efficiency of the inverter is higher than that of a single modulation wave, and the switching method is simple, reliable, and easy to implement.

Description

Modulation device and method for an inverter

technical field

The invention relates to an inverter and its modulation technology, in particular to a modulation device and method for an inverter. the

Background technique

Inverters are devices that convert direct current into alternating current and are used in a wide range of applications. At present, the modulation method of the inverter often uses a single modulation method, and each modulation method has a certain optimal working range. For example, the common continuous modulation method has a small output ripple and can obtain a good output current. Compared with the continuous modulation method, the discontinuous modulation method can reduce the switching loss of the bridge arm. On the other hand, , which increases the ripple of the output current, thereby increasing the magnetic loss on the output filter. Efficiency is a very important factor for inverters. Higher inverter conversion efficiency means that more power can be output, and for the inverter itself, higher efficiency can reduce the heat generated by the inverter. Under the condition of the cooling device, the temperature of the inverter can be reduced, thereby improving the reliability of the inverter. the

Contents of the invention

The purpose of the present invention is to overcome the deficiencies of the prior art and provide a modulation device and method for an inverter. the

The modulation device of the inverter is: A-phase continuous modulation wave generator and A-phase discontinuous modulation wave generator are respectively connected to the 1-pin input terminal and 2-pin input terminal of the first selector, and the output terminal of the first selector is connected to The positive input terminal of the first comparator and the positive input terminal of the second comparator, the first triangular wave generator is connected to the negative input terminal of the first comparator, the second triangular wave generator is connected to the negative input terminal of the second comparator, the first The output terminal of the comparator is connected to the input terminal of the first inverter and the input terminal of the first dead zone module at the same time, the output terminal of the first inverter is connected to the input terminal of the second dead zone module, and the output terminal of the first dead zone module terminal is connected to the input terminal of the first driving module, the output terminal of the second dead zone module is connected to the input terminal of the second driving module, the output signal of the first driving module is the driving signal of the bridge arm switch S _a1 , the output of the second driving module The signal is the driving signal of the bridge arm switch S _a3 , the output terminal of the second comparator is connected to the input terminal of the second inverter and the input terminal of the third dead zone module at the same time, and the output terminal of the second inverter is connected to the fourth dead zone module. The input terminal of the zone module, the output terminal of the third dead zone module is connected to the input terminal of the third drive module, the output terminal of the fourth dead zone module is connected to the input terminal of the fourth drive module, and the output signal of the third drive module is the bridge arm The driving signal of the switch S _a2 , the output signal of the fourth driving module is the driving signal of the bridge arm switch S _a4 ;

The B-phase continuous modulation wave generator and the B-phase discontinuous modulation wave generator are respectively connected to the 1-pin input terminal and 2-pin input terminal of the second selector, and the output terminal of the second selector is connected to the positive input terminal of the third comparator at the same time and the positive input terminal of the fourth comparator, the first triangular wave generator is connected to the negative input terminal of the third comparator, the second triangular wave generator is connected to the negative input terminal of the fourth comparator, and the output terminal of the third comparator is connected to the first comparator at the same time The input terminal of the three inverters and the input terminal of the fifth dead zone module, the output terminal of the third inverter is connected to the input terminal of the sixth dead zone module, and the output terminal of the fifth dead zone module is connected to the input terminal of the fifth drive module terminal, the output terminal of the sixth dead zone module is connected to the input terminal of the sixth driving module, the output signal of the fifth driving module is the driving signal of the bridge arm switch S _b1 , and the output signal of the sixth driving module is the driving signal of the bridge arm switch S _b3 Drive signal, the output terminal of the fourth comparator is connected to the input terminal of the fourth inverter and the input terminal of the seventh dead zone module at the same time, the output terminal of the fourth inverter is connected to the input terminal of the eighth dead zone module, and the seventh The output terminal of the dead zone module is connected to the input terminal of the seventh driving module, the output terminal of the eighth dead zone module is connected to the input terminal of the eighth driving module, the output signal of the seventh driving module is the driving signal of the bridge arm switch S _b2 , the The output signal of the eight drive modules is the drive signal of the bridge arm switch S _b4 ;

The C-phase continuous modulation wave generator and the C-phase discontinuous modulation wave generator are respectively connected to the 1-pin input terminal and 2-pin input terminal of the third selector, and the output terminal of the third selector is connected to the positive input terminal of the fifth comparator at the same time and the positive input of the sixth comparator, the first triangular wave generator is connected to the negative input of the fifth comparator, the second triangular wave generator is connected to the negative input of the sixth comparator, and the output of the fifth comparator is connected to the fifth comparator at the same time. The input terminal of the fifth inverter and the input terminal of the ninth dead zone module, the output terminal of the fifth inverter is connected to the input terminal of the tenth dead zone module, and the output terminal of the ninth dead zone module is connected to the input terminal of the ninth drive module terminal, the output end of the tenth dead zone module is connected to the input end of the tenth driving module, the output signal of the ninth driving module is the driving signal of the bridge arm switch S _c1 , and the output signal of the tenth driving module is the driving signal of the bridge arm switch S _c3 Drive signal, the output terminal of the sixth comparator is connected to the input terminal of the sixth inverter and the input terminal of the eleventh dead zone module at the same time, the output terminal of the sixth inverter is connected to the input terminal of the twelfth dead zone module, The output terminal of the eleventh dead zone module is connected to the input terminal of the eleventh drive module, the output terminal of the twelfth dead zone module is connected to the input terminal of the twelfth drive module, and the output signal of the eleventh drive zone module is the bridge arm The driving signal of the switch S _c2 , the output signal of the twelfth driving module is the driving signal of the bridge arm switch S _c4 ;

The input signals of the first multiplier are respectively the sampling value of the A-phase current and the sampling value of the AC line voltage at the rear end of the inverter filter, and the input signals of the second multiplier are respectively the B-phase at the rear end of the inverter filter. The sampling value of the current and the sampling value of the BC line voltage, the output terminal of the first multiplier is connected to the input terminal of pin 1 of the adder, the output terminal of the second multiplier is connected to the input terminal of pin 2 of the adder, and the output terminal of the adder is connected to The negative input terminal of the seventh comparator, the positive input terminal signal of the seventh comparator is the set power value P _t , the output terminal of the seventh comparator is connected to the first selector, the second selector, and the third selector at the same time sel selects the input terminal.

The modulation method of the inverter is: switch between two modulation modes, according to the output signal of the adder, that is, the detected output power P _out , and set the power value P _t through the seventh comparator for hysteresis comparison, the hysteresis power is ΔP, when the detected output power is greater than the hysteresis upper limit of the set power, that is, P _out > P _t + ΔP2, the output of the seventh comparator switches from the original state to a positive level, when the detected output power P _out is less than the set The lower limit of power hysteresis, that is, when P _out <P _t -ΔP2, the output of the seventh comparator switches from the original state to negative level, and the output of the seventh comparator controls the first selector, the second selector, and the third selector When the output of the seventh comparator is high level, the first selector, the second selector, and the third selector output A-phase continuous modulation wave, B-phase continuous modulation wave, and C-phase continuous modulation wave in sequence. , when the output of the seventh comparator is low level, the first selector, the second selector, and the third selector output A-phase discontinuous modulation wave, B-phase discontinuous modulation wave, and C-phase discontinuous modulation wave in sequence; The phase first selector output modulation wave is compared with the first triangular carrier and the second triangular carrier respectively, and the two signals generated after comparing with the first triangular carrier and the third triangular carrier are generated by the inverter to complement the signal, The two signals and their complementary signals pass through the dead zone module and the drive module, the first drive module, the second drive module, the third drive module, and the four output signals of the fourth drive module are used as four switches of the A-phase bridge arm of the inverter The driving signal of the tube, the driving signal of the B-phase and C-phase bridge arms is similar to the A-phase, after comparing the selected modulation of the corresponding phase with the carrier, the complementary signal is generated through the inverter, and then passed through the dead zone module and the driver The module generates the drive signal corresponding to the phase;

根据V_ref的相角θ，和调制比m，以及三电平空间矢量图得到V_ref所在的大扇区区域和小扇区区域，根据所在三角形小扇区中的三个合成矢量V₁，V₂，V₃，其中V₃为冗余矢量，计算三个合成矢量对应的作用时间T₁，T₂，T₃，将T₃时间分配给两个V₃冗余矢量，保证每个开关周期内，每相桥臂开关动作两次的条件下，以V₃→V₁→V₂→V₃→V₃→V₂→V₁→V₃的7段式序列计算对应A，B，C桥臂各电平的作用时间T_a，T_b，T_c，继而得到三电平的连续调制波，包括A相连续调制波，B相连续调制波，C相连续调制波；  The continuous modulation wave is: according to the required output voltage V _a , V _b , V _c synthesized vector V _ref ,

According to the phase angle θ of V _ref , the modulation ratio m, and the three-level space vector diagram, the large sector area and the small sector area where V _ref is located are obtained. According to the three synthetic vectors V ₁ in the triangular small sector where it is located, V ₂ , V ₃ , where V ₃ is a redundant vector, calculate the action time T ₁ , T ₂ , T ₃ corresponding to the three synthetic vectors, and assign the T ₃ time to the two V ₃ redundant vectors to ensure that each switch In the period, under the condition _{that each} phase bridge arm _{switch acts} twice, _{the corresponding} A, _B , _B , The action time T _a , T _b , T _c of each level of the C bridge arm, and then obtain the three-level continuous modulation wave, including the A-phase continuous modulation wave, the B-phase continuous modulation wave, and the C-phase continuous modulation wave;

The discontinuous modulation wave is as follows: on the basis of the continuous modulation wave sequence, the role of two _V3 redundant vectors is changed to adopt one of the _V3 redundant vectors to ensure that one phase of the bridge arm in one switching cycle The level remains unchanged, that is, the corresponding bridge arm switch does not act within one switching cycle, and the 7-segment continuous sequence becomes a 5-segment intermittent sequence, V ₁ →V ₂ →V ₃ →V ₂ →V ₁ , Thus, A-phase discontinuous modulation wave, B-phase discontinuous modulation wave, and C-phase discontinuous modulation wave are obtained. Compared with continuous modulation wave, each phase bridge arm has one-third of the time in a power frequency cycle. The arm switch remains inactive;

The first triangular wave carrier expression u1 _tri (t) is:

${\mathrm{<span\; class="notranslate">\; u</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\left\{\begin{array}{cc}{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; -</span>\frac{\mathrm{<span\; class="notranslate">\; 2</span>}{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; \&Center\; Dot;</span>\mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; ,</span>& \mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; \&Center\; Dot;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; \&le;</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; <</span>\mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; \&Center\; Dot;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; +</span>\frac{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}\\ \frac{\mathrm{<span\; class="notranslate">\; 2</span>}{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; \&Center\; Dot;</span>\mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; -</span>\frac{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; ,</span>& \mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; \&Center\; Dot;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; +</span>\frac{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; \&le;</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; <</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span>\end{array}\right.$

The second triangular wave carrier expression u2 _tri (t) is:

${\mathrm{<span\; class="notranslate">\; u</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\left\{\begin{array}{cc}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; +</span>\frac{\mathrm{<span\; class="notranslate">\; 2</span>}{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; \&Center\; Dot;</span>\mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; ,</span>& \mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; \&Center\; Dot;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; \&le;</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; <</span>\mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; \&Center\; Dot;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; +</span>\frac{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}\\ <span\; class="notranslate">\; -</span>\frac{\mathrm{<span\; class="notranslate">\; 2</span>}{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; \&CenterDot;</span>\mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; -</span>\frac{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; ,</span>& \mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; \&Center\; Dot;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; +</span>\frac{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; \&le;</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; <</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span>\end{array}\right.$

The parameters in the expression are: triangular carrier amplitude U _tri , triangular carrier period T _tri , and N is an integer.

In the modulation method proposed by the present invention, when the inverter is light-loaded and the switching loss is not significant, the continuous modulation wave is used to reduce the loss on the output filter to improve efficiency, and when the inverter is heavy-loaded, the discontinuous modulation wave is used to The switching loss of the inverter is greatly reduced to improve efficiency, so that in the full power range, the efficiency of the inverter is higher than that of a single modulation wave, and the switching method is simple, reliable, and easy to implement. the

Description of drawings

Fig. 1 is the circuit block diagram of the modulation device of inverter;

Figure 2 is a circuit structure diagram of a three-level T-type inverter;

Fig. 3 is a kind of realization circuit of rising edge delay module;

Fig. 4 is the sequence of three-level continuous modulation wave and discontinuous modulation wave;

Figure 5 shows the hysteresis switching of the modulation mode according to the output power and the set power;

Figure 6 shows the modulation wave and driving waveform generated by continuous modulation;

Figure 7 shows the modulation wave and driving waveform generated by discontinuous modulation. the

Detailed ways

The present invention will be described in detail below in conjunction with the accompanying drawings. the

As shown in Figure 1, the modulation device of the inverter is: A-phase continuous modulation wave generator 1 and A-phase discontinuous modulation wave generator 2 are respectively connected to the 1-pin input terminal and 2-pin input terminal of the first selector 7, The output terminal of the first selector 7 is connected to the positive input terminal of the first comparator 10 and the positive input terminal of the second comparator 11 simultaneously, and the first triangular wave generator 46 is connected to the negative input terminal of the first comparator 10, and the second triangular wave The generator 47 is connected to the negative input terminal of the second comparator 11, and the output terminal of the first comparator 10 is connected to the input terminal of the first inverter 16 and the input terminal of the first dead zone module 22 at the same time, and the first inverter 16 The output terminal of the second dead zone module 23 is connected to the input terminal of the second dead zone module 23, the output terminal of the first dead zone module 22 is connected to the input terminal of the first driving module 34, and the output terminal of the second dead zone module 23 is connected to the input of the second driving module 35 end, the output signal of the first driving module 34 is the driving signal of the bridge arm switch S _a1 , the output signal of the second driving module 35 is the driving signal of the bridge arm switch S _a3 , and the output terminal of the second comparator 11 is connected to the second The input terminal of the inverter 17 and the input terminal of the third dead zone module 24, the output terminal of the second inverter 17 is connected to the input terminal of the fourth dead zone module 25, and the output terminal of the third dead zone module 24 is connected to the third dead zone module 24. The input end of the driving module 36, the output end of the fourth dead zone module 25 is connected to the input end of the fourth driving module 37, the output signal of the third driving module 36 is the driving signal of the bridge arm switch S _a2 , and the output signal of the fourth driving module 37 is The output signal is the driving signal of the bridge arm switch S _a4 ;

The B-phase continuous modulation wave generator 3 and the B-phase discontinuous modulation wave generator 4 are respectively connected to the 1-pin input terminal and the 2-pin input terminal of the second selector 8, and the output terminal of the second selector 8 is connected to the third comparator at the same time The positive input terminal of 12 and the positive input terminal of the fourth comparator 13, the first triangular wave generator 46 connects the negative input terminal of the third comparator 12, and the second triangular wave generator 47 connects the negative input terminal of the fourth comparator 13, The output terminal of the third comparator 12 is connected to the input terminal of the third inverter 18 and the input terminal of the fifth dead zone module 26 at the same time, and the output terminal of the third inverter 18 is connected to the input terminal of the sixth dead zone module 27, The output terminal of the fifth dead zone module 26 is connected to the input terminal of the fifth driving module 38, the output terminal of the sixth dead zone module 27 is connected to the input terminal of the sixth driving module 39, and the output signal of the fifth driving module 38 is a bridge arm switch The driving signal of S _b1 , the output signal of the sixth driving module 39 is the driving signal of the bridge arm switch S _b3 , the output terminal of the fourth comparator 13 is connected to the input terminal of the fourth inverter 19 and the seventh dead zone module 28 at the same time The input terminal of the fourth inverter 19 is connected to the input terminal of the eighth dead zone module 29, the output terminal of the seventh dead zone module 28 is connected to the input terminal of the seventh driving module 40, and the output terminal of the eighth dead zone module 29 The output end is connected to the input end of the eighth driving module 41, the output signal of the seventh driving module 40 is the driving signal of the bridge arm switch S _b2 , and the output signal of the eighth driving module 41 is the driving signal of the bridge arm switch S _b4 ;

The C-phase continuous modulation wave generator 5 and the C-phase discontinuous modulation wave generator 6 are respectively connected to the 1-pin input terminal and the 2-pin input terminal of the third selector 9, and the output terminal of the third selector 9 is connected to the fifth comparator at the same time The positive input terminal of 14 and the positive input terminal of the sixth comparator 15, the first triangular wave generator 46 connects the negative input terminal of the fifth comparator 14, and the second triangular wave generator 47 connects the negative input terminal of the sixth comparator 15, The output terminal of the fifth comparator 14 is connected to the input terminal of the fifth inverter 20 and the input terminal of the ninth dead zone module 30 at the same time, and the output terminal of the fifth inverter 20 is connected to the input terminal of the tenth dead zone module 31, The output terminal of the ninth dead zone module 30 is connected to the input terminal of the ninth driving module 42, the output terminal of the tenth dead zone module 31 is connected to the input terminal of the tenth driving module 43, and the output signal of the ninth driving module 42 is a bridge arm switch The driving signal of S _c1 , the output signal of the tenth driving module 43 is the driving signal of the bridge arm switch S _c3 , the output terminal of the sixth comparator 15 is connected to the input terminal of the sixth inverter 21 and the eleventh dead zone module at the same time 32, the output of the sixth inverter 21 is connected to the input of the twelfth dead zone module 33, the output of the eleventh dead zone module 32 is connected to the input of the eleventh driving module 44, and the twelfth The output terminal of the dead zone module 33 is connected to the input terminal of the twelfth drive module 45, the output signal of the eleventh drive zone module 44 is the drive signal of the bridge arm switch _Sc2 , and the output signal of the twelfth drive module 45 is the bridge arm switch S c2. a driving signal of the switch S _c4 ;

The input terminal signals of the first multiplier 50 are respectively the sampling value of the A-phase current and the sampling value of the AC line voltage at the rear end of the inverter filter, and the input terminal signals of the second multiplier 51 are respectively the sampling values of the inverter filter rear end. The sampling value of the B-phase current and the sampling value of the BC line voltage, the output terminal of the first multiplier 50 is connected to the 1-pin input terminal of the adder 49, and the output terminal of the second multiplier 51 is connected to the 2-pin input terminal of the adder 49, The output terminal of the adder 49 is connected to the negative input terminal of the seventh comparator 48, the positive input terminal signal of the seventh comparator 48 is the set power value _Pt , and the output terminal of the seventh comparator 48 is connected to the first selector 7 at the same time. , the sel selection input terminals of the second selector 8 and the third selector 9 .

The inverter modulation method is: switch between two modulation modes, according to the output signal of the adder 49, that is, the detected output power P _out , and the set power value P _t through the seventh comparator 48 for hysteresis comparison, the hysteresis The power is ΔP. When the detected output power is greater than the hysteresis upper limit of the set power, that is, when P _out >P _t +ΔP2, the output of the seventh comparator 48 is switched from the original state to a positive level. When the detected output power P _out Less than the hysteresis lower limit of the set power, that is, when P _out <P _t -ΔP2, the output of the seventh comparator 48 is switched from the original state to a negative level, and the output of the seventh comparator 48 controls the first selector 7, the second Selector 8, the output modulation wave of the third selector 9, when the output of the seventh comparator 48 is high level, the first selector 7, the second selector 8, and the third selector 9 output A-phase continuous modulation wave in sequence , B-phase continuous modulation wave, C-phase continuous modulation wave, when the output of the seventh comparator 48 is low level, the first selector 7, the second selector 8, and the third selector 9 output A-phase intermittent modulation wave in sequence , B-phase intermittent modulation wave, C-phase intermittent modulation wave; A-phase first selector output modulation wave is compared with the first triangular carrier and the second triangular carrier respectively, and will be compared with the first triangular carrier and the third triangular carrier The two-way signals generated last pass through the inverter to generate complementary signals, and the two-way signals and their complementary signals pass through the dead zone module and the driving module, the first driving module, the second driving module, the third driving module, and the fourth driving module The four output signals of the inverter are used as the drive signals of the four switch tubes of the A-phase bridge arm of the inverter. The drive signals of the B-phase and C-phase bridge arms are similar to those of the A-phase. After comparing the selected modulation of the corresponding phase with the carrier, The complementary signal is generated through the inverter, and then the driving signal of the corresponding phase is generated through the dead zone module and the driving module;

根据V_ref的相角θ，和调制比m，以及三电平空间矢量图得到V_ref所在的大扇区区域和小扇区区域，根据所在三角形小扇区中的三个合成矢量V₁，V₂，V₃，其 中V₃为冗余矢量，计算三个合成矢量对应的作用时间T₁，T₂，T₃，将T₃时间分配给两个V₃冗余矢量，保证每个开关周期内，每相桥臂开关动作两次的条件下，以V₃→V₁→V₂→V₃→V₃→V₂→V₁→V₃的7段式序列计算对应A，B，C桥臂各电平的作用时间T_a，T_b，T_c，继而得到三电平的连续调制波，包括A相连续调制波，B相连续调制波，C相连续调制波；  The continuous modulation wave is: according to the required output voltage V _a , V _b , V _c synthesized vector V _ref ,

According to the phase angle θ of V _ref , the modulation ratio m, and the three-level space vector diagram, the large sector area and the small sector area where V _ref is located are obtained. According to the three synthetic vectors V ₁ in the triangular small sector where it is located, V ₂ , V ₃ , where V ₃ is a redundant vector, calculate the action time T ₁ , T ₂ , T ₃ corresponding to the three synthetic vectors, and assign the T ₃ time to the two V ₃ redundant vectors to ensure that each switch In the period, under the condition _{that each} phase bridge arm _switch acts twice, _{the corresponding} A _{, B} , _B , The action time T _a , T _b , T _c of each level of the C bridge arm, and then obtain the three-level continuous modulation wave, including the A-phase continuous modulation wave, the B-phase continuous modulation wave, and the C-phase continuous modulation wave;

The discontinuous modulation wave is as follows: on the basis of the continuous modulation wave sequence, the role of two _V3 redundant vectors is changed to adopt one of the _V3 redundant vectors to ensure that one phase of the bridge arm in one switching cycle The level remains unchanged, that is, the corresponding bridge arm switch does not act within one switching cycle, and the 7-segment continuous sequence becomes a 5-segment intermittent sequence, V ₁ →V ₂ →V ₃ →V ₂ →V ₁ , Thus, A-phase discontinuous modulation wave, B-phase discontinuous modulation wave, and C-phase discontinuous modulation wave are obtained. Compared with continuous modulation wave, each phase bridge arm has one-third of the time in a power frequency cycle. The arm switch remains inactive;

The first triangular wave carrier expression u1 _tri (t) is:

${\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="u"\; filenames="131105092938.png"\; state="\{\{state\}\}">u</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 1</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\left\{\begin{array}{cc}{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; -</span>\frac{\mathrm{<span\; class="notranslate">\; 2</span>}{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; \&CenterDot;</span>\mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; ,</span>& \mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; \&CenterDot;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; \&le;</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; <</span>\mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; \&Center\; Dot;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; +</span>\frac{{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="T\; tri"\; filenames="131105092848.png,131105092944.png"\; state="\{\{state\}\}">T</figure-callout></span><figure-callout\; id="2"\; label="T\; tri"\; filenames="131105092848.png,131105092944.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}\\ \frac{\mathrm{<span\; class="notranslate">\; 2</span>}{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; \&Center\; Dot;</span>\mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; -</span>\frac{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; ,</span>& \mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; \&Center\; Dot;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; +</span>\frac{{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="T\; tri"\; filenames="131105092848.png,131105092944.png"\; state="\{\{state\}\}">T</figure-callout></span><figure-callout\; id="2"\; label="T\; tri"\; filenames="131105092848.png,131105092944.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; \&le;</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; <</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span>\end{array}\right.$

The second triangular wave carrier expression u2 _tri (t) is:

${\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="u"\; filenames="131105092848.png,131105092944.png"\; state="\{\{state\}\}">u</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 2</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\left\{\begin{array}{cc}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; +</span>\frac{\mathrm{<span\; class="notranslate">\; 2</span>}{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; \&Center\; Dot;</span>\mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; ,</span>& \mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; \&Center\; Dot;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; \&le;</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; <</span>\mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; \&Center\; Dot;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; +</span>\frac{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}\\ <span\; class="notranslate">\; -</span>\frac{\mathrm{<span\; class="notranslate">\; 2</span>}{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; \&Center\; Dot;</span>\mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; -</span>\frac{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; ,</span>& \mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; \&Center\; Dot;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; +</span>\frac{{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="T\; tri"\; filenames="131105092848.png,131105092944.png"\; state="\{\{state\}\}">T</figure-callout></span><figure-callout\; id="2"\; label="T\; tri"\; filenames="131105092848.png,131105092944.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; \&le;</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; <</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span>\end{array}\right.$

The parameters in the expression are: triangular carrier amplitude U _tri , triangular carrier period T _tri , and N is an integer.

working principle:

Fig. 2 is a three-level inverter applied in the present invention, a full-bridge bridge arm composed of 12 full-control switches with anti-parallel diodes, including S _a1 , S _a2 , S _a3 , and S _a4 of the A-phase bridge arm , S _b1 , S _b2 , S _b3 , S _b4 of the B-phase bridge arm, S _c1 , S _c2 , S _c3 , S _c4 of the C-phase bridge arm, and the output of the bridge arm is connected to the LCL filter. AC line voltage sampled value v _ac , BC line voltage sampled value v _bc , A-phase current sampled value i _a , and B-phase current sampled value i _b are used for the power detection link in the present invention;

As shown in Figure 3, an implementation circuit of the dead zone module consists of an AND gate, a resistor and a capacitor. When the input signal is a rising edge, the level of the input terminal 1 of the AND gate changes from low to high, and the level of the AND gate The level of the input terminal 2 is the level of the capacitor pin 1. The level of the input terminal 2 of the AND gate is charged from zero to high level. When the level of the input terminal 2 of the AND gate is less than the input high level threshold, the output terminal 3 of the AND gate The output is low level. When the input terminal 2 of the AND gate is charged to the input high level threshold, the output terminal 3 of the AND gate is turned over to high level, and the input rising edge signal is delayed and output. The rising edge delay is determined by the resistance and capacitance size decision;

As shown in Figure 4, the modulated wave used in the present invention produces a vector V _ref synthesized by voltage in the three-level space vector, first determine the position of the sector, and according to the corresponding three synthesized vectors V ₁ where the small sector is located, V ₂ , V ₃ , as shown in Figure 4, when the composite vector is in the I-2 sector, V ₁ is PPN, V ₂ is PON, V ₃ is PPO/OON, calculate the action time of each vector, and continuously modulate the wave In the I-2 sector, the sequence is PPO→PPN→PON→OON→PON→PPN→PPO. In one switching cycle, the switching tube of each phase bridge arm acts twice, and the intermittent modulation wave is 5-stage type, in the I-2 sector, the sequence is PPN→PON→OON→PON→PPN, within one switching cycle, the switch tube of one phase arm does not act, the switch tube of the other two phase arms acts twice, and the others Sectors are analogous;

Figure 5 shows the switching of the modulation mode according to the set power value P _t and the hysteresis power ΔP. According to the current working state of the inverter, the continuous modulation wave generator and the discontinuous generator of each phase in A, B, and C are respectively Generate continuous and discontinuous modulated waves with optional control output. At this time, the current power is monitored by the power monitoring link, and the AC line voltage v _ac after the inverter filter, the A-phase output current i _a , the BC line voltage v _bc , and the B-phase output current i _b pass through the first multiplier , the second multiplier, and the adder can obtain the current output power P _out ;

When the inverter is running at a lower power, the output power is less than the lower limit of the set power hysteresis, that is, keeping P _out <P _t -ΔP2, the level of the comparison output of the seventh comparator remains at a high level, and the high level Level control of the first selector, the second selector, and the third selector output A-phase continuous modulation wave, B-phase continuous modulation wave, C-phase continuous modulation wave, and the continuous modulation wave is compared with the triangular carrier wave and then generated by reverse The complementary signals are then passed through the dead zone module to generate a dead zone, and output as a driving signal for the switching tube of the inverter bridge arm. Figure 6 shows the three-level continuous modulation wave and its corresponding drive;

When the power of the inverter increases slowly from low power, when it is detected that the output power exceeds the hysteresis upper limit of the set power, that is, P _out > P _t +ΔP2, the output level of the seventh comparator is changed from the original high The level is changed to a low level, and the level transition controls the output of the first selector, the second selector, and the third selector from the original A-phase continuous modulation wave, B-phase continuous modulation wave, and C-phase continuous modulation Wave, change to A-phase discontinuous modulation wave, B-phase discontinuous modulation wave, C-phase discontinuous modulation wave, compare the discontinuous modulation wave with the triangular carrier wave, generate complementary signals by reverse, and then pass through the dead zone module A dead zone is generated, and the output is used as a drive signal for the switching tube of the bridge arm of the inverter. As shown in Figure 7, the three-level discontinuous modulation wave and its corresponding drive are shown;

When the inverter maintains a large power output, that is, maintains P _out > P _t +ΔP2, the output of the seventh comparator is continuously low, controlling the output of the first selector, the second selector, and the third selector Respectively keep as A-phase discontinuous modulation wave, B-phase discontinuous modulation wave, C-phase discontinuous modulation wave, the discontinuous modulation wave and the triangular carrier wave are compared to generate complementary signals through the reverse direction, and then pass through the dead zone module to generate dead Area, output as the driving signal of the switching tube of the inverter bridge arm;

Conversely, when the power of the inverter is gradually reduced from high power, when it is detected that the output power is lower than the lower limit of the hysteresis of the set power, that is, P _out <P _t -ΔP2, the output level of the seventh comparison is changed from the original The low level changes to the high level, and the level jump controls the output of the first selector, the second selector, and the third selector from the original A-phase intermittent modulation wave, B-phase intermittent modulation wave, and C-phase intermittent modulation wave. Phase discontinuous modulation wave, change to output A phase continuous modulation wave, B phase continuous modulation wave, C phase continuous modulation wave, compare the discontinuous modulation wave with the triangular carrier wave and generate complementary signals through reverse, and then pass through the dead The zone module generates a dead zone, and the output is used as a drive signal for the switch tube of the inverter bridge arm.

Claims (2)

1. An inverter modulation device, characterized in that the A-phase continuous modulation wave generator (1) and the A-phase discontinuous modulation wave generator (2) are respectively connected to the 1-pin input terminal of the first selector (7) and the 2-pin input terminal, the output terminal of the first selector (7) is simultaneously connected to the positive input terminal of the first comparator (10) and the positive input terminal of the second comparator (11), the first triangular wave generator (46) Connect to the negative input terminal of the first comparator (10), connect the second triangular wave generator (47) to the negative input terminal of the second comparator (11), and connect the output terminal of the first comparator (10) to the first inverting The input terminal of the device (16) and the input terminal of the first dead zone module (22), the output terminal of the first inverter (16) is connected to the input terminal of the second dead zone module (23), and the first dead zone module ( The output terminal of 22) is connected to the input terminal of the first driving module (34), the output terminal of the second dead zone module (23) is connected to the input terminal of the second driving module (35), and the output signal of the first driving module (34) is the driving signal of the bridge arm switch S _a1 , the output signal of the second driving module (35) is the driving signal of the bridge arm switch S _a3 , and the output terminal of the second comparator (11) is connected to the second inverter (17) at the same time and the input terminal of the third dead zone module (24), the output terminal of the second inverter (17) is connected to the input terminal of the fourth dead zone module (25), and the output of the third dead zone module (24) terminal is connected to the input terminal of the third driving module (36), the output terminal of the fourth dead zone module (25) is connected to the input terminal of the fourth driving module (37), and the output signal of the third driving module (36) is a bridge arm switch The driving signal of S _a2 , the output signal of the fourth driving module (37) is the driving signal of the bridge arm switch S _a4 ; The B-phase continuous modulation wave generator (3) and the B-phase discontinuous modulation wave generator (4) are respectively connected to the 1-pin input terminal and 2-pin input terminal of the second selector (8), and the second selector (8) The output terminal is connected to the positive input terminal of the third comparator (12) and the positive input terminal of the fourth comparator (13) at the same time, and the first triangular wave generator (46) is connected to the negative input terminal of the third comparator (12). The second triangular wave generator (47) is connected to the negative input terminal of the fourth comparator (13), and the output terminal of the third comparator (12) is connected to the input terminal of the third inverter (18) and the fifth dead zone module ( 26), the output terminal of the third inverter (18) is connected to the input terminal of the sixth dead zone module (27), the output terminal of the fifth dead zone module (26) is connected to the fifth driving module (38) The input terminal, the output terminal of the sixth dead zone module (27) is connected to the input terminal of the sixth driving module (39), the output signal of the fifth driving module (38) is the driving signal of the bridge arm switch S _b1 , and the sixth driving module The output signal of (39) is the driving signal of the bridge arm switch S _b3 , and the output terminal of the fourth comparator (13) is simultaneously connected to the input terminal of the fourth inverter (19) and the input of the seventh dead zone module (28) terminal, the output terminal of the fourth inverter (19) is connected to the input terminal of the eighth dead zone module (29), the output terminal of the seventh dead zone module (28) is connected to the input terminal of the seventh drive module (40), and the The output terminal of the eighth dead zone module (29) is connected to the input terminal of the eighth driving module (41), the output signal of the seventh driving module (40) is the driving signal of the bridge arm switch S _b2 , and the output signal of the eighth driving module (41) The output signal is the driving signal of the bridge arm switch S _b4 ; The C-phase continuous modulation wave generator (5) and the C-phase discontinuous modulation wave generator (6) are respectively connected to the 1-pin input terminal and 2-pin input terminal of the third selector (9), and the third selector (9) The output terminal is simultaneously connected to the positive input terminal of the fifth comparator (14) and the positive input terminal of the sixth comparator (15), and the first triangular wave generator (46) is connected to the negative input terminal of the fifth comparator (14). The second triangular wave generator (47) is connected to the negative input terminal of the sixth comparator (15), and the output terminal of the fifth comparator (14) is connected to the input terminal of the fifth inverter (20) and the ninth dead zone module ( 30), the output terminal of the fifth inverter (20) is connected to the input terminal of the tenth dead zone module (31), the output terminal of the ninth dead zone module (30) is connected to the ninth driving module (42) The input terminal, the output terminal of the tenth dead zone module (31) is connected to the input terminal of the tenth driving module (43), the output signal of the ninth driving module (42) is the driving signal of the bridge arm switch S _c1 , and the tenth driving module The output signal of (43) is the drive signal of the bridge arm switch S _c3 , and the output terminal of the sixth comparator (15) is simultaneously connected to the input terminal of the sixth inverter (21) and the input terminal of the eleventh dead zone module (32). The input terminal, the output terminal of the sixth inverter (21) is connected to the input terminal of the twelfth dead zone module (33), the output terminal of the eleventh dead zone module (32) is connected to the eleventh drive module (44) The input terminal, the output terminal of the twelfth dead zone module (33) is connected to the input terminal of the twelfth drive module (45), the output signal of the eleventh drive zone module (44) is the drive signal of the bridge arm switch S _c2 , The output signal of the twelfth driving module (45) is the driving signal of the bridge arm switch S _c4 ; The input signals of the first multiplier (50) are respectively the sampled value of the A-phase current and the sampled value of the AC line voltage at the back end of the inverter filter, and the input signals of the second multiplier (51) are respectively the The sampled value of the B-phase current and the sampled value of the BC line voltage at the rear end of the filter, the output terminal of the first multiplier (50) is connected to the input terminal of pin 1 of the adder (49), and the output terminal of the second multiplier (51) Connect the 2-pin input terminal of the adder (49), the output terminal of the adder (49) is connected to the negative input terminal of the seventh comparator (48), and the positive input terminal signal of the seventh comparator (48) is the set power value P _t , the output terminal of the seventh comparator ( 48 ) is simultaneously connected to the sel selection input terminals of the first selector ( 7 ), the second selector ( 8 ), and the third selector ( 9 ). 2. An inverter modulation method using the device as claimed in claim 1, characterized in that the switching of the two modulation modes is based on the output signal of the adder (49), that is, the detected output power P _out , and the set power The value P _t is compared by the seventh comparator (48), and the hysteresis power is ΔP. When the detected output power is greater than the hysteresis upper limit of the set power, that is, P _out > P _t + ΔP2, the seventh comparator (48) The output switches from the original state to a positive level. When the detected output power P _out is less than the hysteresis lower limit of the set power, that is, P _out <P _t -ΔP2, the output of the seventh comparator (48) changes from the original The state is switched to negative level, the output of the seventh comparator (48) controls the output modulation wave of the first selector (7), the second selector (8), and the third selector (9), when the seventh comparator ( 48) When the output is high level, the first selector (7), the second selector (8), and the third selector (9) sequentially output A-phase continuous modulation wave, B-phase continuous modulation wave, and C-phase continuous modulation wave , when the output of the seventh comparator (48) is low level, the first selector (7), the second selector (8), and the third selector (9) output A-phase intermittent modulation wave sequentially, B-phase Continuous modulation wave, phase C discontinuous modulation wave; Phase A first selector output modulation wave is compared with the first triangular carrier and the second triangular carrier respectively, and the two generated after comparing with the first triangular carrier and the third triangular carrier The two-way signal generates a complementary signal through the inverter, and the two-way signal and its complementary signal pass through the dead zone module and the driving module, the first driving module, the second driving module, the third driving module, and the four outputs of the fourth driving module The signal is used as the driving signal of the four switching tubes of the A-phase bridge arm of the inverter. The driving signals of the B-phase and C-phase bridge arms are similar to the A-phase. After comparing the selected modulation of the corresponding phase with the carrier, it passes through the inverter Generate complementary signals, and then generate corresponding phase drive signals through the dead zone module and the drive module; The continuous modulation wave is: according to the required output voltage V _a , V _b , V _c synthesized vector V _ref ,

According to the phase angle θ of V _ref , the modulation ratio m, and the three-level space vector diagram, the large sector area and the small sector area where V _ref is located are obtained. According to the three synthetic vectors V ₁ in the triangular small sector where it is located, V ₂ , V ₃ , where V ₃ is a redundant vector, calculate the action time T ₁ , T ₂ , T ₃ corresponding to the three synthetic vectors, and assign the T ₃ time to the two V ₃ redundant vectors to ensure that each switch In the period, under the condition _{that each} phase bridge arm _switch acts twice, _{the corresponding} A _{, B} , _B , The action time T _a , T _b , T _c of each level of the C bridge arm, and then obtain the three-level continuous modulation wave, including the A-phase continuous modulation wave, the B-phase continuous modulation wave, and the C-phase continuous modulation wave; The discontinuous modulation wave is as follows: on the basis of the continuous modulation wave sequence, the role of two _V3 redundant vectors is changed to adopt one of the _V3 redundant vectors to ensure that one phase of the bridge arm in one switching cycle The level remains unchanged, that is, the corresponding bridge arm switch does not act within one switching cycle, and the 7-segment continuous sequence becomes a 5-segment intermittent sequence, V ₁ →V ₂ →V ₃ →V ₂ →V ₁ , Thus, A-phase discontinuous modulation wave, B-phase discontinuous modulation wave, and C-phase discontinuous modulation wave are obtained. Compared with continuous modulation wave, each phase bridge arm has one-third of the time in a power frequency cycle. The arm switch remains inactive; The first triangular wave carrier expression u1 _tri (t) is: ${\mathrm{<span\; class="notranslate">\; u</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\left\{\begin{array}{cc}{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; -</span>\frac{\mathrm{<span\; class="notranslate">\; 2</span>}{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; \&CenterDot;</span>\mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; ,</span>& \mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; \&CenterDot;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; \&le;</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; <</span>\mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; \&CenterDot;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; +</span>\frac{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}\\ \frac{\mathrm{<span\; class="notranslate">\; 2</span>}{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; \&Center\; Dot;</span>\mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; -</span>\frac{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; ,</span>& \mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; \&CenterDot;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; +</span>\frac{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; \&le;</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; <</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span>\end{array}\right.$ The second triangular wave carrier expression u2 _tri (t) is: ${\mathrm{<span\; class="notranslate">\; u</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\left\{\begin{array}{cc}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; +</span>\frac{\mathrm{<span\; class="notranslate">\; 2</span>}{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; \&CenterDot;</span>\mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; ,</span>& \mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; \&CenterDot;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; \&le;</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; <</span>\mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; \&CenterDot;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; +</span>\frac{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}\\ <span\; class="notranslate">\; -</span>\frac{\mathrm{<span\; class="notranslate">\; 2</span>}{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; \&CenterDot;</span>\mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; -</span>\frac{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; ,</span>& \mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; \&CenterDot;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; +</span>\frac{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; \&le;</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; <</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; tri</span>}}<span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span>\end{array}\right.$ The parameters in the expression are: triangular carrier amplitude U _tri , triangular carrier period T _tri , and N is an integer.

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