CN103475337B - Rc oscillator - Google Patents

Abstract

The present invention relates to a kind of RC oscillator, comprise operating voltage, reference circuit module, a P channel MOS tube, the 3rd P channel MOS tube, the 4th P channel MOS tube, vibration core logic circuit, the first discharge switch, the second discharge switch, the first sequential electric capacity and the second sequential electric capacity; It is characterized in that, the source-electrode degradation current source be made up of N-channel MOS pipe, degeneration resistance is set respectively at the second end of the first discharge switch, the second end of the second discharge switch.The present invention utilize the output impedance of source-electrode degradation current source with the variation characteristic of temperature and electric current to enable the residual charge amount compensation temperature on sequential electric capacity, working power voltage changes the clock frequency change caused; Thus realize the RC oscillator that a kind of Low Drift Temperature is provided.

Description

RC oscillator

[technical field]

The invention belongs to integrated circuit (IC) design technical field, be specifically related to a kind of RC oscillator.

[background technology]

Generally, RC oscillator is by producing oscillating clock signal to the discharge and recharge time delay of electric capacity, and the clock signal frequency that this circuit structure produces easily is subject to the impact of the factor such as chip power supply voltage, surrounding working environment temperature.In order to overcome working power voltage and ambient temperature to the impact of RC oscillator output clock frequency, numerous design and invention propose various high-precision RC oscillator.Fig. 1 is classical RC oscillator, and it comprises: reference circuit module 1, P channel MOS tube Mp1S, P channel MOS tube Mp2S, P channel MOS tube Mp3S, vibration core logic circuit 3, first sequential electric capacity Ct1S, second sequential electric capacity Ct2S, the first discharge switch S1, the second discharge switch S2.Vibration core logic circuit 3 is provided with first and compares input 31, second and compare input 32, reference voltage input 33, first control signal output 34, second control signal output 35 and clock signal output terminal 36.

Reference circuit module 1 is provided with reference voltage output end 12 and circuit input end 11; Circuit input end 11 connects the drain electrode of P channel MOS tube Mp1S, the source electrode of P channel MOS tube Mp1S connects working power V, the grid of P channel MOS tube Mp1S connects the drain electrode of P channel MOS tube Mp1S, reference voltage output end 12 connects reference voltage input 33, flows through the electric current of P channel MOS tube Mp1S as reference current.

Reference circuit module 1 specifically comprises bandgap voltage reference Bandgap, comparison amplifier CP, N-channel MOS pipe MnS, resistance Rs and DC current source Iref, bandgap voltage reference Bandgap connects working power VDD and the positive input terminal of its output connection comparison amplifier CP, the negative input end of comparison amplifier CP connects the source electrode of N-channel MOS pipe MnS and the first end of resistance Rs, second end of resistance Rs is by DC current source Iref ground connection, the output of comparison amplifier CP connects the grid of N-channel MOS pipe MnS, the source electrode of N-channel MOS pipe MnS is as reference voltage output end 12, the drain electrode of N-channel MOS pipe MnS is as circuit input end 11.

The source electrode of P channel MOS tube Mp2S is all connected working power V with the source electrode of P channel MOS tube Mp3S, the grid of P channel MOS tube Mp2S, the grid of P channel MOS tube Mp3S all connect the grid of P channel MOS tube Mp1S, the drain electrode of P channel MOS tube Mp2S connects the first end of the first sequential electric capacity Ct1S, and the drain electrode of P channel MOS tube Mp3S connects the first end of the second sequential electric capacity Ct1S.The first end of the first discharge switch S1 connects the first end of the first sequential electric capacity Ct1S, and second end of the first discharge switch S1 connects ground; The first end of the second discharge switch S2 connects the first end of the second sequential electric capacity Ct2S, and second end of the second sequential electric capacity Ct2S connects ground.First compares the first end that input 31 connects the first sequential electric capacity Ct1S, second output 23 connects the first end of the second sequential electric capacity Ct2S, first control signal output 34 controls the break-make of the first discharge switch S1, and the second control signal output 35 controls the break-make of the second discharge switch S2.Second end of the first sequential electric capacity Ct1S, second end of the second sequential electric capacity Ct2S all connect ground.

Specifically, main operational principle is: reference circuit module 1 and P channel MOS tube Mp1S, working power V produce reference voltage and reference current jointly, P channel MOS tube Mp2S, P channel MOS tube Mp3S forms current mirror with P channel MOS tube Mp1S respectively, and P channel MOS tube Mp2S, P channel MOS tube Mp3S distinguishes mirror image said reference electric current; Metal-oxide-semiconductor Mp2S charges, when the positive terminal voltage Va on sequential electric capacity Ct1S rises to reference voltage V to the first sequential electric capacity Ct1S with fixed slope _reftime, comparator upset in vibration core logic circuit, the the first discharge switch S1 controlling to be connected with the first sequential electric capacity Ct1S closes, rapidly the electric charge on Ct1S is bled off, conduction impedance due to the first discharge switch S1 is far smaller than the conduction impedance of metal-oxide-semiconductor Mp2S, so at the first discharge switch S1 period of contact, the positive terminal voltage Va of the first sequential electric capacity Ct1S is always close to 0 level; Almost while the first discharge switch S1 closed pair first sequential electric capacity Ct1S discharges, second discharge switch S2 disconnects, metal-oxide-semiconductor Mp3S starts to charge to the second sequential electric capacity Ct2S, and the voltage Vb of anode starts to rise, until the magnitude of voltage of voltage Vb reaches reference voltage V with fixed slope _reffollow-up comparator disconnects the first discharge switch S1, closed second discharge switch S2, metal-oxide-semiconductor Mp2S charges to the first sequential electric capacity Ct1S with fixed slope again, electric charge on second sequential electric capacity Ct2S bleeds off by the second discharge switch S2 completely, the voltage of positive terminal voltage Vb is close to 0 level, and a new charge cycle starts.In above-mentioned oscillator, the waveform of two corresponding positive terminal voltages of sequential electric capacity and output clock clk as shown in Figure 2.A clock oscillation cycle equals two sequential electric capacity Ct1S, Ct2S charging interval sums.If charging current is I _char, capacitance is C, and reference voltage value is V _ref, then clock frequency formula is as follows:

$F_{\mathrm{req}}=\frac{I_{\mathrm{char}}}{2C*V_{\mathrm{ref}}}.$

The RC oscillator of above-mentioned this structure, although use the reference circuit module 1 of bandgap voltage reference Bandgap can produce not temperature variant reference voltage, but due to the impact of temperature coefficient of resistance, the RC oscillator resisting temperature changing capability of this structure is not fine, when using the resistance of dull Temperature Coefficient type, it is poorer that the temperature coefficient of clock can become.In addition the complicated structure of this RC oscillator, and its minimum operating voltage V _dDmin=V _ref+ V _dsatn+ | V _dsatp|+| V _thp|, be difficult to work under 2v and following working power, be not suitable for the operational environment that novel portable mobile battery equipment is powered.

[summary of the invention]

The technical problem to be solved in the present invention is to provide a kind of RC oscillator, and it has the feature of Low Drift Temperature.

Above-mentioned technical problem solves by the following technical programs:

A kind of RC oscillator, comprises operating voltage, reference circuit module, a P channel MOS tube, the 3rd P channel MOS tube, the 4th P channel MOS tube, vibration core logic circuit, the first discharge switch, the second discharge switch, the first sequential electric capacity and the second sequential electric capacity; Reference circuit module is provided with reference voltage output end and circuit output end; Vibration core logic circuit is provided with first and compares input, second and compare input, reference voltage input, the first control signal output, the second control signal output and clock signal output terminal; Circuit output end connects the drain terminal of a P channel MOS tube, and the source electrode of a P channel MOS tube connects working power, and the grid of a P channel MOS tube is connected with drain electrode; The source electrode of the 3rd P channel MOS tube, the source electrode of the 4th P channel MOS tube all connect working power, the grid of the 3rd P channel MOS tube, the grid of the 4th P channel MOS tube all connect the grid of a P channel MOS tube, the anode that input is compared in the drain electrode, first of the 3rd P channel MOS tube, the first end of the first discharge switch all connects the first sequential electric capacity, the negativing ending grounding of the first sequential electric capacity; The anode that input is compared in the drain electrode, second of the 4th P channel MOS tube, the first end of the second discharge switch connects the second sequential electric capacity, the negativing ending grounding of the second sequential electric capacity; First control signal output, the second control signal output corresponding control connection first discharge switch, the second discharge switch respectively;

It is characterized in that,

Also comprise the 2nd P channel MOS tube, pressure drop module, the first N-channel MOS pipe, the second N-channel MOS pipe, the 3rd N-channel MOS pipe, resistance Rs1, degeneration resistance Rs2 and degeneration resistance Rs3; The source electrode of the 2nd P channel MOS tube connects working power, the grid of the 2nd P channel MOS tube connects the grid of a P channel MOS tube, the drain electrode of the 2nd P channel MOS tube is by the drain electrode of pressure drop model calling first N-channel MOS pipe, the source electrode of the first N-channel MOS pipe is by resistance Rs1 ground connection, and the grid of the first N-channel MOS pipe is connected with drain electrode; The grid of the second N-channel MOS pipe, the grid of the 3rd N-channel MOS pipe all connect the grid of the first N-channel MOS pipe, the source electrode of the second N-channel MOS pipe is by degeneration resistance Rs2 ground connection, the drain electrode of the second N-channel MOS pipe connects the second end of the first discharge switch, the source electrode of the 3rd N-channel MOS pipe is by degeneration resistance Rs3 ground connection, and the drain electrode of the 3rd N-channel MOS pipe connects the second end of the second discharge switch.

As seen from the above technical solution, the present invention arranges at the second end of the first discharge switch, the second end of the second discharge switch the source-electrode degradation current source be made up of N-channel MOS pipe, degeneration resistance respectively, utilize the output impedance of source-electrode degradation current source with the variation characteristic of temperature and electric current to enable the residual charge amount compensation temperature on sequential electric capacity, working power voltage changes the clock frequency change caused; Thus realize the RC oscillator that a kind of Low Drift Temperature is provided.In order to ensure that oscillator can normally work, the design parameter of each element arranges and must ensure: the first sequential electric capacity second sequential electric capacity before charging to reference voltage completes electric discharge, and the second sequential electric capacity first sequential electric capacity before charging to reference voltage completes electric discharge.

Further scheme is, is serially connected with compensating resistance Rs4 between the drain electrode of described 3rd P channel MOS tube and the anode of described first sequential electric capacity, is serially connected with compensating resistance Rs5 between the drain electrode of described 4th P channel MOS tube and the anode of described second sequential electric capacity.This programme adds a compensating resistance for curent change respectively in the charging circuit of the charging circuit of the first sequential electric capacity, the second sequential electric capacity, when operating voltage increase causes reference current to increase, pressure drop on compensating resistance also can increase, thus make sequential capacitor discharge residual charge rate of rise well below the growth rate of working power voltage, almost can think constant.This negative feedback mechanism makes the output frequency of RC oscillator change because of the change in voltage of working power hardly, has very high Power Supply Rejection Ratio.

Further scheme is, compensating resistance Rs4 and compensating resistance Rs5 are identical element.

Further scheme is, resistance Rs1, degeneration resistance Rs2, degeneration resistance Rs3 adopt the resistance of the positive temperature coefficient of same type to realize.

Further scheme is, resistance Rs1, degeneration resistance Rs2, degeneration resistance Rs3 realize by the active impedance element of the positive temperature coefficient of same type.

Further scheme is, degeneration resistance Rs2 and degeneration resistance Rs3 are identical element, and the second N-channel MOS Guan Yu tri-N-channel MOS pipe is identical element, and the 3rd P channel MOS tube is identical element with the 4th P channel MOS tube.

Further scheme is, described vibration core logic circuit comprises the first comparator, second comparator, first NOR gate, second NOR gate, first not gate, second not gate, buffer, the negative input end of the first comparator is interconnected with the negative input end of the second comparator and is connected reference voltage output end as reference voltage input, the positive input terminal of the first comparator connects the anode of the first sequential electric capacity, the positive input terminal of the second comparator connects the anode of the second sequential electric capacity, the output of the first comparator connects the first input end of the first NOR gate, the output of the second comparator connects the first input end of the second NOR gate, the output of the first NOR gate connects the second input of the second NOR gate, the input of the first not gate, the output of the second NOR gate connects the second input of the first NOR gate, the output of the first not gate connects the input of the second not gate, the output of the second not gate connects the input of buffer, the output of the first not gate is as the first control signal output, the output of the second not gate is as the second control signal output.

Described reference circuit module comprises resistance Rv1, resistance Rv2 and DC current source, second end of resistance Rv1 is successively by resistance Rv2, DC current source ground connection, the first end of resistance Rv1 connects the drain terminal of a P channel MOS tube Mp1 as circuit output end, second end of resistance Rv1 is as reference voltage output end.Adopt the reference circuit module of this structure, this oscillator can be worked under 2v and following working power, be applicable to the operational environment that Portable movable battery apparatus is powered.

[accompanying drawing explanation]

Fig. 1 is the circuit structure of the RC oscillator in background technology;

Fig. 2 is the node voltage of two sequential electric capacity and the waveform of output clock clk of RC oscillator in background technology;

Fig. 3 is the structure chart of RC oscillator of the present invention;

Fig. 4 is the structure chart of vibration core logic circuit of the present invention;

Fig. 5 is the positive terminal voltage of sequential electric capacity of the present invention and the waveform of output clock clk;

Fig. 6 is the positive terminal voltage of sequential electric capacity of the present invention, residual voltage and the output clock clk change waveform with ambient temperature;

Fig. 7 is the positive terminal voltage of sequential electric capacity of the present invention, residual voltage and the output clock clk change waveform with operating voltage.

[embodiment]

As shown in Figure 3, RC oscillator comprises: operating voltage V, reference circuit module 10, one P channel MOS tube Mp1,2nd P channel MOS tube Mp2, the 3rd P channel MOS tube Mp3, the 4th P channel MOS tube Mp4, compensating resistance Rs4, compensating resistance Rs5, pressure drop module Vdc, the first N-channel MOS pipe Mn1, second N-channel MOS pipe Mn2,3rd N-channel MOS pipe Mn3, resistance Rs1, degeneration resistance Rs2, degeneration resistance Rs3, vibration core logic circuit 30, first sequential electric capacity Ct1, the second sequential electric capacity Ct2, first discharge switch sw_a, the second discharge switch sw_b.

In the present embodiment, compensating resistance Rs4 and compensating resistance Rs5 are identical element, degeneration resistance Rs2 and degeneration resistance Rs3 are identical element, second N-channel MOS pipe Mn2 is identical element with the 3rd N-channel MOS pipe Mn3, and the 3rd P channel MOS tube Mp3 is identical element with the 4th P channel MOS tube Mp4.

Vibration core logic circuit 3 is provided with first and compares input 301, second and compare input 302, reference voltage input 303, first control signal output 304, second control signal output 305 and clock signal output terminal 306.

Reference circuit module is provided with circuit output end and reference voltage output end.Reference circuit module comprises resistance Rv1, resistance Rv2 and benchmark DC current source Iref, second end of resistance Rv1 is successively by resistance Rv2, DC current source Iref ground connection, and the first end of resistance Rv1 connects the drain terminal of a P channel MOS tube Mp1 as circuit output end; The grid of source electrode connection working power VDD, a P channel MOS tube Mp1 of the one P channel MOS tube Mp1 is connected with drain electrode.Reference circuit module 10 and a P channel MOS tube, working power VDD produce the reference passageway of reference current, reference voltage, and the electric current flowing through this path is reference current, and second end of resistance Rv1 connects reference voltage input 303 as reference voltage output end.Adopt said reference circuit module 10, this oscillator can be worked under 2v and following working power, be applicable to the operational environment that Portable movable battery apparatus is powered.

Resistance Rv1, resistance Rv2 are variable resistor, by the adjustment to variable resistor resistance, can carry out process deviation trim after chip production to the clock frequency of oscillator.The effect of DC current source Iref isolates with ground to ensure, allows the reference current of generation, reference voltage not affect by Earth noise.

The source electrode of the 2nd P channel MOS tube Mp2 connects working power VDD, the grid of the 2nd P channel MOS tube Mp2 connects the grid of a P channel MOS tube Mp1, the drain electrode of the 2nd P channel MOS tube Mp2 connects the drain electrode of the first N-channel MOS pipe Mn1 by pressure drop module Vdc, the source electrode of the first N-channel MOS pipe Mn1 is by resistance Rs1 ground connection, and the grid of the first N-channel MOS pipe Mn1 is connected with drain electrode;

The grid of the second N-channel MOS pipe Mn2, the grid of the 3rd N-channel MOS pipe Mn3 all connects the grid of the first N-channel MOS pipe Mn1, the source electrode of the second N-channel MOS pipe Mn2 is by degeneration resistance Rs2 ground connection, the drain electrode of the second N-channel MOS pipe Mn2 connects second end of the first discharge switch sw_a, the source electrode of the 3rd N-channel MOS pipe Mn3 is by degeneration resistance Rs3 ground connection, the drain electrode of the 3rd N-channel MOS pipe Mn3 connects second end of the second discharge switch sw_b, the first end of the first discharge switch sw_a connects the anode of the first sequential electric capacity Ct1, the first end of the second discharge switch sw_b connects the anode of the second sequential electric capacity Ct2.

The source electrode of the 3rd P channel MOS tube Mp3, the source electrode of the 4th P channel MOS tube Mp4 all connect working power VDD, the grid of the 3rd P channel MOS tube Mp3, the grid of the 4th P channel MOS tube Mp4 all connect the grid of a P channel MOS tube Mp1, the drain electrode of the 3rd P channel MOS tube Mp3 connects the anode of the first sequential electric capacity Ct1, the negativing ending grounding of the first sequential electric capacity Ct1 by compensating resistance Rs4; The drain electrode of the 4th P channel MOS tube Mp4 connects the anode of the second sequential electric capacity Ct2, the negativing ending grounding of the second sequential electric capacity Ct2 by compensating resistance Rs5.

Second end of the reference voltage input 303 contact resistance Rv1 of vibration core logic circuit 3, first compares the anode that input 301 connects the first sequential electric capacity Ct1, second compares the anode that input 302 connects the second sequential electric capacity Ct2, first control signal output 304 controls the first discharge switch sw_a, second control signal output 305 controls the second discharge switch sw_b, and clock signal output terminal 306 is as the output of this oscillator.

Vibration core logic circuit 3 comprises the first comparator 311, second comparator 322, first NOR gate 313, second NOR gate 314, first not gate 315, second not gate 316, buffer 317, the negative input end of the first comparator 311 and the negative input end of the second comparator 322 are interconnected and as second end of reference voltage input 303 contact resistance Rv1, the positive input terminal of the first comparator 311 connects the anode of the first sequential electric capacity Ct1, the positive input terminal of the second comparator 322 connects the anode of the second sequential electric capacity Ct2, the output of the first comparator 311 connects the first input end of the first NOR gate 313, the output of the second comparator 322 connects the first input end of the second NOR gate 314, the output of the first NOR gate 313 connects the second input of the second NOR gate 314, the input of the first not gate 315, the output of the second NOR gate 314 connects the second input of the first NOR gate 313, the output of the first not gate 315 connects the input of the second not gate 316, the output of the second not gate 316 connects the input of buffer 317, the output of the first not gate 315 is as the first control signal output 304, the output of the second not gate 316 is as the second control signal output 305.

Principle of the present invention is:

First reference voltage, reference current are not utilize the reference circuit module comprising bandgap voltage reference to produce, but directly obtained through the P channel MOS tube Mp1 series connection that is connected with reference circuit module 10, diode type by working power VDD, such design counteracts the impact of change in voltage on clock frequency of a part of working power; The P channel MOS tube Mp1 series connection dividing potential drop that resistance Rv1, Rv2, diode type connects creates reference voltage V ref, flows through their electric current as reference current I ₀; In this circuit, working power VDD, the 3rd P channel MOS tube Mp3, compensating resistance Rs4 are configured for the first charging circuit charged to the first sequential electric capacity Ct1, working power VDD, the 4th P channel MOS tube Mp4, compensating resistance Rs5 are configured for the second charging circuit charged to the second sequential electric capacity Ct2, because the 3rd P channel MOS tube Mp3, the 4th P channel MOS tube Mp4 form current mirror with a P channel MOS tube Mp1 respectively, the 3rd P channel MOS tube Mp3, the 4th P channel MOS tube Mp4 equal mirror image said reference electric current I ₀and obtain charging current I _fill, thus form charging current source respectively; First charging circuit, the second charging circuit all use I _fillrespectively the first sequential electric capacity Ct1, the second sequential electric capacity Ct2 are charged;

The anode of the first sequential electric capacity Ct1, the anode of the second sequential electric capacity Ct2 all deliver to oscillator core control logic, and vibration core control logic judges the positive terminal voltage V(Va of the first sequential electric capacity Ct1), the positive terminal voltage V(Vb of the second sequential electric capacity Ct2) whether reach reference voltage V _refif, the positive terminal voltage V(Va when one of them sequential electric capacity (if being the first sequential electric capacity Ct1)) and would exceed reference voltage V _refthen control logic is closed the first discharge switch sw_a be connected with the first sequential electric capacity Ct1, discharges to this first sequential electric capacity Ct1; Meanwhile, disconnect the second discharge switch sw_b be connected with another sequential electric capacity (the second sequential electric capacity Ct2), start the charge cycle of this second sequential electric capacity Ct2; Circulation like this; The waveform of the present invention's two positive terminal voltages of sequential electric capacity, output clock clk as shown in Figure 5.

In this circuit, formed the first discharge circuit that the first sequential electric capacity Ct1 is discharged by the second N-channel MOS pipe Mn2, degeneration resistance Rs2 and the first discharge switch sw_a, formed the second discharge circuit that the second sequential electric capacity Ct2 is discharged by the 3rd N-channel MOS pipe Mn3, degeneration resistance Rs3 and the second discharge switch sw_b.

Because a 2nd P channel MOS tube Mp2 and P channel MOS tube Mp1 forms current mirror, the 2nd P channel MOS tube Mp2 mirror image said reference electric current obtains intermediate current I _in, this intermediate current I _inand send into the first N-channel MOS pipe Mn1 through pressure drop module Vdc, because the second N-channel MOS pipe Mn2, the 3rd N-channel MOS pipe Mn3 form current mirror with the first N-channel MOS pipe Mn1 respectively, the second N-channel MOS pipe Mn2, the 3rd N-channel MOS pipe Mn3 equal mirror image intermediate current I _inobtain discharging current I _put, thus forming discharging current source respectively, the second N-channel MOS pipe Mn2 and degeneration resistance Rs2 forms the first source-electrode degradation current source, and the 3rd N-channel MOS pipe Mn3 and degeneration resistance Rs3 forms the second source-electrode degradation current source.In order to provide the temperature coefficient characteristics of optimization, above-mentioned resistance Rs1, degeneration resistance Rs2, degeneration resistance Rs3 adopt the resistance of the positive temperature coefficient of same type to realize, and can certainly be realized by the active impedance element of the positive temperature coefficient of same type; Adopt the resistance of zero/negative temperature coefficient of same type, effect is not very good comparatively speaking.

In order to ensure that oscillator can normally work, the design parameter of each element arranges and must ensure: the first sequential electric capacity second sequential electric capacity before charging to reference voltage completes electric discharge, and the second sequential electric capacity first sequential electric capacity before charging to reference voltage completes electric discharge; In the present embodiment, be embodied in: require discharging current I _put> charging current I _fill.Due to mirror, charging current I _fill, intermediate current I _in, discharging current I _putall with reference current I ₀proportional relation; By adjusting the parameter of (the 3rd P channel MOS tube Mp3 and the 4th P channel MOS tube Mp4), charging current I can be adjusted _fill; By adjusting the 2nd P channel MOS tube Mp2 or/and the parameter of (the 3rd P channel MOS tube Mp3, the 4th P channel MOS tube Mp4), discharging current I can be adjusted _put.

The present invention mainly utilize the output impedance of source-electrode degradation current source with temperature, curent change characteristic to control the electric discharge residual charge amount of corresponding sequential electric capacity number, thus keep oscillator to export the stability of frequency of oscillation.Concrete principle is explained in detail as follows.

Sequential capacitor discharge residual voltage Approximate Equivalent is in the dividing potential drop of the equiva lent impedance of the equiva lent impedance of charging circuit and discharge circuit;

Discharge circuit impedance is the equiva lent impedance of source-electrode degradation current source, is approximately:

$R_{\mathrm{disch}}\≅r_{\mathrm{dsn}}[1+(g_{\mathrm{mn}}+g_{\mathrm{mbn}})R_s]$

Wherein r _dsn, g _mn, g _mbnbe respectively the equivalent drain-source resistance in discharging current source, equivalent transconductance, equivalent substrate mutual conductance, R _sfor the resistance of degeneration resistance.

Charging circuit equiva lent impedance is approximately:

R _ch=r _dsp+R _sch

Wherein r _dspbe respectively the drain-source equiva lent impedance of charging current source, R _schfor the resistance of compensating resistance.

Sequential capacitor discharge residual voltage is approximately:

$V_{\mathrm{residue}}=\frac{R_{\mathrm{disch}}}{R_{\mathrm{ch}}}*\mathrm{VDD}$

By R _disch, R _chsubstitution above formula obtains

$V_{\mathrm{residue}}=\frac{r_{\mathrm{dsn}}[1+(g_{\mathrm{mn}}+g_{\mathrm{mbn}})R_s]}{r_{\mathrm{dsp}}+R_{\mathrm{sch}}}*\mathrm{VDD}=\frac{1+(g_{\mathrm{mn}}+g_{\mathrm{mbn}})R_s}{K_1+K_2}*\mathrm{VDD}$

Wherein K ₁=r _dsp/ r _dsn>>1, and K ₁be approximately constant, K ₂=R _sch/ r _dsn, K ₂vary with temperature very little.By above-mentioned V _residueexpression formula can be found out, if R _sfor positive temperature coefficient, then V _residuethe molecule of expression formula increases along with the increase of temperature, and the electric discharge residual voltage so on sequential electric capacity will increase along with the rising of temperature.If sequential electric capacity residual charge amount increases in one-period, when charging current remains unchanged, then in the next clock cycle, sequential capacitor charging time will diminish, because the sequential capacitance voltage that comparator upset needs is always V _ref, when namely overturning, the quantity of electric charge of sequential electric capacity is always fixed.If the quantity of electric charge that upper one-period remains is larger, then the charging interval of this cycle needs will reduce.If charging current reduces, then the charging interval can remain unchanged.Ambient temperature rises, and causes charging current to reduce, and the output impedance of source-electrode degradation current source is then risen along with temperature and increases, and causes sequential electric capacity residual charge amount to increase, and compensate for charging current and reduces the charging interval increase caused.Thus clock cycle and then clock frequency are similar to maintenance does not vary with temperature, alternatively clock frequency has lower temperature drift coefficient.As shown in Figure 6, in figure, display timing generator electric capacity residual voltage rises along with the increase of temperature, in ptc characteristics for the positive terminal voltage of sequential electric capacity of the present invention and the temperature variant waveform of clock signal.

When working power VDD increases, reference current increases, thus charging current increases, and sequential capacitor charging time reduces.The present invention adds the compensating resistance for curent change in the charge circuit.When charging current increases, then the pressure drop on compensating resistance also can increase, and the increase of sequential electric capacity residual voltage can be cancelled to a great extent.Due to r _dsn=1/ λ I _dsn, then residual voltage V on sequential electric capacity above _residueformula can be re-expressed as:

$V_{\mathrm{residue}}=\frac{1+(g_{\mathrm{mn}}+g_{\mathrm{mbn}})R_s}{K_1+{\mathrm{\λI}}_{\mathrm{dsn}}*R_{\mathrm{sch}}}*\mathrm{VDD}$

Along with the increase of working power VDD, reference current also can increase, the discharging current I of source-electrode degradation current source _dsnalso can increase, the mutual conductance g in certain discharging current source _mn, g _mbnalso can increase, but g _mn, g _mbnincrease be and discharging current I _dsnsquare root proportional, and denominator is along with I _dsnincrease, so residual voltage V on above-mentioned sequential electric capacity _residuein expression formula, the coefficient of VDD is along with I _dsnincrease reduce, the increase of the residual voltage that the voltage increase that the existence of compensating resistance compensate for working power causes, the change of the output clock frequency that finally greatly inhibit the change in voltage due to working power to cause.The existence of compensating resistance makes oscillator output clock frequency of the present invention have very high Power Supply Rejection Ratio.The positive terminal voltage of sequential electric capacity of the present invention and clock signal with the change in voltage of working power waveform as shown in Figure 7.Accompanying drawing 7 shows, sequential electric capacity residual voltage only shows very small increase along with the voltage increase of working power, and the clock frequency caused by the residual charge of increase increases, and is far smaller than the specification of the frequency deviation of clock that most of SOC (system on a chip) can be tolerated.

In addition when working power is constant, other factors as temperature cause reference current to increase time, compensating resistance can reduce residual voltage especially, due to the reduction of sequential electric capacity residual voltage, although charging current increases, but because the next clock cycle needs the quantity of electric charge supplemented also can increase, so the charging interval of next clock cycle can not shorten, but approximate constant; So the existence of compensating resistance inhibits the impact of reference current change on clock frequency greatly.

Seen from the above description, this embodiment provides one and can work at lower voltages, and has the RC oscillator of the well change of opposing working power voltage and variation of ambient temperature ability.

The present invention is not limited to above-described embodiment, based on above-described embodiment, the simple replacement of not making creative work, the scope that the present invention discloses should be belonged to.

Claims (8)

1. a RC oscillator, comprises operating voltage, reference circuit module, a P channel MOS tube, the 3rd P channel MOS tube, the 4th P channel MOS tube, vibration core logic circuit, the first discharge switch, the second discharge switch, the first sequential electric capacity and the second sequential electric capacity; Reference circuit module is provided with reference voltage output end and circuit output end; Vibration core logic circuit is provided with first and compares input, second and compare input, reference voltage input, the first control signal output, the second control signal output and clock signal output terminal; Circuit output end connects the drain terminal of a P channel MOS tube, and the source electrode of a P channel MOS tube connects working power, and the grid of a P channel MOS tube is connected with drain electrode; The source electrode of the 3rd P channel MOS tube, the source electrode of the 4th P channel MOS tube all connect working power, the grid of the 3rd P channel MOS tube, the grid of the 4th P channel MOS tube all connect the grid of a P channel MOS tube, the anode that input is compared in the drain electrode, first of the 3rd P channel MOS tube, the first end of the first discharge switch all connects the first sequential electric capacity, the negativing ending grounding of the first sequential electric capacity; The anode that input is compared in the drain electrode, second of the 4th P channel MOS tube, the first end of the second discharge switch connects the second sequential electric capacity, the negativing ending grounding of the second sequential electric capacity; First control signal output, the second control signal output corresponding control connection first discharge switch, the second discharge switch respectively;

It is characterized in that,

Also comprise the 2nd P channel MOS tube, pressure drop module, the first N-channel MOS pipe, the second N-channel MOS pipe, the 3rd N-channel MOS pipe, resistance Rs1, degeneration resistance Rs2 and degeneration resistance Rs3; The source electrode of the 2nd P channel MOS tube connects working power, the grid of the 2nd P channel MOS tube connects the grid of a P channel MOS tube, the drain electrode of the 2nd P channel MOS tube is by the drain electrode of pressure drop model calling first N-channel MOS pipe, the source electrode of the first N-channel MOS pipe is by resistance Rs1 ground connection, and the grid of the first N-channel MOS pipe is connected with drain electrode; The grid of the second N-channel MOS pipe, the grid of the 3rd N-channel MOS pipe all connect the grid of the first N-channel MOS pipe, the source electrode of the second N-channel MOS pipe is by degeneration resistance Rs2 ground connection, the drain electrode of the second N-channel MOS pipe connects the second end of the first discharge switch, the source electrode of the 3rd N-channel MOS pipe is by degeneration resistance Rs3 ground connection, and the drain electrode of the 3rd N-channel MOS pipe connects the second end of the second discharge switch.

2. RC oscillator according to claim 1, it is characterized in that, be serially connected with compensating resistance Rs4 between the drain electrode of described 3rd P channel MOS tube and the anode of described first sequential electric capacity, between the drain electrode of described 4th P channel MOS tube and the anode of described second sequential electric capacity, be serially connected with compensating resistance Rs5.

3. RC oscillator according to claim 2, is characterized in that, compensating resistance Rs4 and compensating resistance Rs5 are identical element.

4. RC oscillator according to claim 1, is characterized in that, resistance Rs1, degeneration resistance Rs2, degeneration resistance Rs3 adopt the resistance of the positive temperature coefficient of same type to realize.

5. RC oscillator according to claim 1, is characterized in that, resistance Rs1, degeneration resistance Rs2, degeneration resistance Rs3 realize by the active impedance element of the positive temperature coefficient of same type.

6. RC oscillator according to claim 1, it is characterized in that, degeneration resistance Rs2 and degeneration resistance Rs3 are identical element, and the second N-channel MOS Guan Yu tri-N-channel MOS pipe is identical element, and the 3rd P channel MOS tube is identical element with the 4th P channel MOS tube.

7. RC oscillator according to claim 1, it is characterized in that, described vibration core logic circuit comprises the first comparator, second comparator, first NOR gate, second NOR gate, first not gate, second not gate, buffer, negative input end and the negative input end of the second comparator of the first comparator are interconnected and are also connected reference voltage output end as the reference voltage input of vibration core logic circuit, the positive input terminal of the first comparator connects the anode of the first sequential electric capacity, the positive input terminal of the second comparator connects the anode of the second sequential electric capacity, the output of the first comparator connects the first input end of the first NOR gate, the output of the second comparator connects the first input end of the second NOR gate, the output of the first NOR gate connects the second input of the second NOR gate, the input of the first not gate, the output of the second NOR gate connects the second input of the first NOR gate, the output of the first not gate connects the input of the second not gate, the output of the second not gate connects the input of buffer, the output of the first not gate is as the first control signal output, the output of the second not gate is as the second control signal output.

8. the RC oscillator according to claim 1 to 7 any one, it is characterized in that, described reference circuit module comprises resistance Rv1, resistance Rv2 and isolation current source, second end of resistance Rv1 is successively by resistance Rv2, isolation current source ground connection, the first end of resistance Rv1 connects the drain terminal of a P channel MOS tube Mp1 as circuit output end, second end of resistance Rv1 is as reference voltage output end.