CN103441151B - A low forward voltage drop diode - Google Patents

Abstract

The invention discloses a diode structure with low forward voltage drop, which adopts an N-type accumulation MOSFET and reduces the potential barrier of a diode through the body effect of the MOSFET. When a small forward voltage is applied, in N⁺A thin layer for accumulating electrons is formed below the heavy doping region and at the interface of the gate oxide layer and the N-type light doping region to form electron current, so that the forward voltage drop of the diode is further reduced; as the applied voltage increases, P⁺Heavily doped region, N^—Epitaxial region and N⁺The PiN diode formed by the substrate is turned on to provide a large current. When the reverse voltage is blocked, the MOSFET is cut off, the PN junction is quickly exhausted, and the reverse bias PN junction is used for bearing the reverse voltage resistance. The channel length of the N-type accumulation MOSFET is N⁺Heavily doped region and N^—The length of the N-type lightly doped region in the epitaxial region is determined. The invention adopts a groove grid structure, and saves the area of the device. In addition, the invention can adopt single or multiple cells for integration, and multiple parallel cells can share the same terminal, thus being easy to integrate with the conventional circuit, greatly reducing the layout area and lowering the process cost.

Description

A low forward voltage drop diode

technical field

The invention belongs to the technical field of semiconductor power devices and relates to a diode with low forward voltage drop.

Background technique

The diode is the earliest and most basic power electronic device, which promotes the generation and development of power electronics technology, whether it is a modern high-voltage power semiconductor device Insulated Gate Bipolar Transistor (Insulated Gate Bipolar Transistor IGBT) or an early thyristor control system. Missing power diodes. Currently commercialized power diodes are mainly PiN power diodes and Schottky Barrier Diodes. PiN has the advantages of high voltage resistance, high current, low leakage current and low conduction loss. The doping concentration of PiN's intrinsic region is relatively low, and it is easy to form a large injection when it is conducting in the forward direction. The conductance modulation effect produces a large number of Minority carriers reduce the turn-off speed of devices and limit the development of power electronic systems in the direction of high frequency. Schottky diodes are manufactured using the principle of metal-semiconductor junctions formed by the contact between metal and semiconductor. The forward turn-on voltage is small. Because the majority of carriers conduct electricity, the forward current is large, and the Schottky barrier power diode has no minority carrier storage. effect, has a very high switching frequency. However, the drift region resistance in series has a contradictory relationship with the withstand voltage of the device to the power of 2.5, which hinders the high-voltage and high-current application of Schottky barrier power diodes. In addition, Schottky barrier power diodes have extremely poor high-temperature characteristics, large The leakage current and soft breakdown characteristics make silicon Schottky barrier power diodes usually only work in the voltage range below 250V. In order to improve the performance of power diodes, devices such as Junction Barrier controlled Schottky (referred to as JBS), mixed PiN/Schottky diodes (Merged P-i-N/Schottky referred to as MPS), and MOS control diodes (Metal Oxide Semiconductor Controlled Diode) have been proposed in the industry. These devices combine the advantages of PN junction diodes and Schottky diodes, reducing the turn-on voltage of the diodes to a certain extent.

Contents of the invention

The invention discloses a diode structure with low forward voltage drop. An N-type accumulation MOSFET is used. The drain of the N-type accumulation MOSFET is short-circuited with the polysilicon gate to jointly form the anode of the diode with low forward voltage drop. N ⁺ substrate forms the cathode of the low forward diode. The diode has a lower potential barrier than ordinary diodes through the body effect of the MOSFET. When a small forward voltage is applied, a thin layer of electron accumulation is formed under the N ⁺ heavily doped region and at the interface between the oxide layer and the N-type lightly doped region, forming an electron current, which greatly reduces the forward voltage drop of the diode; As the applied voltage increases, the P ⁺ heavily doped region, the N ^- epitaxial region and the N ⁺ substrate form a PiN diode, allowing the device to provide a large current. When blocking in the reverse direction, the MOSFET is turned off, and the PN junction is quickly depleted, and the reverse bias PN junction is used to bear the reverse withstand voltage.

With the present invention, on the one hand, an N ⁺ heavily doped region is introduced into the drift region to provide electrons and form an electron current. On the other hand, the channel length of the accumulation MOSFET is determined by the length of the N-type lightly doped region in the N ⁺ heavily doped region and the N ^- epitaxy region, which is easy to control; the P-type region is heavily doped to form a heavily doped ohmic contact while providing a large number of holes. In addition, the present invention adopts a trench gate structure, and the cell structure can be made smaller, saving device area. At the same time, the present invention can be integrated with single or multiple cells, and multiple parallel cells can share the same terminal, which is not only easy to integrate with conventional circuits, but also greatly reduces the layout area and further reduces the process cost.

In order to achieve the above object, the present invention adopts the following technical solutions:

A kind of diode of low forward voltage drop, it is characterized in that: comprise N ⁺ substrate, metallized cathode is drawn out by N ⁺ substrate, N ⁺ substrate above is N—— epitaxial layer; N ^— the top ^of epitaxial layer has a P Type heavily doped region, one side of P type heavily doped region has N ⁺ heavily doped region, wherein the depth of P type heavily doped region is greater than the depth of N ⁺ heavily doped region; one side of P type heavily doped region The side also has an N-type lightly doped region, and the N ⁺ heavily doped region is adjacent to the N-type lightly doped region; the P-type heavily doped region and the N ^- epitaxial layer form a PN junction; the N ^- epitaxial layer top has The polysilicon gate electrode isolated from it by the gate oxide layer, the N ⁺ heavily doped region and the N type lightly doped region are isolated from the polysilicon gate by the gate oxide layer; the metallized anode is located on the top of the device, covering all the P type heavily doped regions, N ⁺ Heavily doped regions, gate oxide and polysilicon gate.

The device uses an N-type accumulation MOSFET, the drain of the N-type accumulation MOSFET is shorted to the polysilicon gate, which together form the anode of the low forward voltage drop diode, and the N ⁺ substrate forms the cathode of the low forward voltage diode. The N ⁺ heavily doped region is the drain of the MOSFET, the polysilicon gate is the gate of the MOSFET, and the N ⁺ substrate is the source of the MOSFET.

It is further characterized in that: the N ⁺ heavily doped region, the N type lightly doped region, the N ⁻ epitaxial region and the N ⁺ substrate form an electronic path of the N type accumulation MOSFET. The P-type heavily doped region forms a diode structure with the N ^- epitaxy region and the N ⁺ substrate.

Further: the channel length of the N-type accumulation MOSFET is determined by the length of the N ^- type lightly doped region in the N ⁺ heavily doped region and the N- epitaxial region.

Further: the junction depth of the N-type lightly doped region can be flexibly adjusted according to the withstand voltage and turn-on voltage requirements.

Further: the doping concentration of the P-type heavily doped region is greater than 5×10 ¹⁷ cm ^-3 .

A diode extension structure with low forward voltage drop: there is an N ^- type buffer zone between the N- epitaxial layer and the N ⁺ substrate.

Another diode extension structure with low forward voltage drop: the N-type lightly doped region can be replaced by a P-type region, and the depth and concentration of the partitioned P wells can be adjusted to meet the requirements according to different voltage and current requirements.

The advantages of the present invention are as follows:

1. The present invention can integrate single or multiple cell structures, and multiple parallel cells can share the same terminal structure, which is easy to integrate with conventional circuits and greatly reduces the layout area.

2. The present invention can be a planar gate, a grooved gate and other structures.

3. The present invention adopts an N-type accumulation MOSFET, and the potential barrier of the diode is lower than that of an ordinary diode through the body effect of the MOSFET. When a small forward voltage is applied, a thin layer of electron accumulation is formed under the N ⁺ heavily doped region and at the interface between the oxide layer and the N-type lightly doped region, forming an electron current, which greatly reduces the forward voltage drop of the diode; As the applied voltage increases, the P ⁺ heavily doped region, the N ^- epitaxial region and the N ⁺ substrate form a PiN diode, allowing the device to provide a large current. When blocking in the reverse direction, the MOSFET is turned off, and the PN junction is quickly depleted, and the reverse bias PN junction is used to bear the reverse withstand voltage. Simulation data show that the turn-on voltage is less than 0.3V, and the reverse breakdown voltage can reach 140V.

4. The present invention can adjust the concentration of the N-type lightly doped region according to different voltage and current ranges, and the N-type region can be obtained by implanting donor impurities such as arsenic and phosphorus.

5. The junction depth of the P-type heavily doped region and the N ⁺ heavily doped region can only be different from the junction depth of the N-type lightly doped region, that is, the junction depth of the N-type lightly doped region can be flexible according to the withstand voltage and turn-on voltage requirements adjust.

6. The channel length of the N-type accumulation MOSFET is determined by the length of the N-type lightly doped region in the N ⁺ heavily doped region and the N ^- epitaxy region, which can be adjusted according to the different requirements of withstand voltage and turn-on voltage, increasing the flexibility of device design flexibility.

7. The P-type heavily doped region proposed by the present invention provides a large number of holes while forming a heavily doped ohmic contact.

8. The N ⁺ heavily doped region proposed by the present invention provides electrons for MOSFET to form electron current.

Description of drawings

Fig. 1 is a schematic diagram of the structure of a diode device with low forward voltage drop according to the present invention.

FIG. 2 is a planar gate structure of a diode device with low forward voltage drop according to the present invention.

Fig. 3 is an extended structure of the low forward voltage drop diode of the present invention.

FIG. 4 is another extended structure of the low forward voltage drop diode of the present invention.

FIG. 5 is a planar gate structure of the extended structure in FIG. 4 .

Fig. 6 is a schematic diagram of a simulation of a low forward voltage drop diode device of the present invention.

FIG. 7 is a schematic diagram of a simulation of a Schottky diode device.

Fig. 8 is a schematic diagram of a PiN diode device simulation.

Fig. 9 is a comparison of forward curves of low forward voltage drop diodes provided by the present invention, PiN diodes, and Schottky power diodes under the same N ^- epitaxial concentration (2.5×10 ¹⁵ cm ^-3 ) and thickness (10 µm).

Figure 10 is a comparison of the low forward voltage drop diode provided by the present invention, PiN diode, and Schottky power diode reverse leakage current under the same N epitaxial concentration (2.5×10 ¹⁵ cm ^-3 ) and thickness (10µm).

detailed description

The diode with low forward voltage drop proposed by the present invention adopts an N-type accumulation MOSFET, the drain of the N-type accumulation MOSFET is short-circuited with the polysilicon gate, which together constitute the anode of the low forward voltage drop diode, and the N ⁺ substrate Forms the cathode of the low forward diode. The device makes the potential barrier of the diode lower than that of ordinary diodes through the body effect of MOSFET. When a small forward voltage is applied, a thin layer of electron accumulation is formed under the N ⁺ heavily doped region and at the interface between the oxide layer and the N-type lightly doped region, forming an electron current, which greatly reduces the forward voltage drop of the diode; As the applied voltage increases, the P ⁺ heavily doped region, the N ^- epitaxial region and the N ⁺ substrate form a PIN diode, allowing the device to provide a large current. When blocking in the reverse direction, the MOSFET is turned off, and the PN junction is quickly depleted, and the reverse bias PN junction is used to bear the reverse withstand voltage.

As shown in FIG. 1, the low forward voltage drop diode includes a semiconductor including an N ⁺ substrate 7, a metallized cathode 8 on the back of the N ⁺ substrate 7 and an N- epitaxial layer 4 on the front ^of the N ⁺ substrate 7 There is a P-type heavily doped region 3 at the top of the N ^- epitaxial layer 4, and an N-type heavily doped region 2 is on the upper right side of the P-type heavily doped region 3, and the depth of the P-type heavily doped region 3 is greater than the N-type heavily doped region The depth of doped region 2; P-type heavily doped region 3 right bottom is N-type lightly doped region 9, and the doping concentration of N-type lightly doped region 9 is identical with N ^- epitaxial layer 4 in simulation of the present invention; The P-type heavily doped region 3 and the N ^- epitaxial layer 4 form a PN junction; the right side of the top of the N ^- epitaxial layer 4 is a polysilicon gate 5, and the gate oxide layer 6 surrounds the polysilicon gate electrode 5, and the N-type heavily doped region 2 and the polysilicon gate 5 are separated by a gate oxide layer 6; the metallized anode 1 is located on the top layer of the device, covering all P-type heavily doped regions 3, N-type heavily doped regions 2, gate oxide layer 6 and polysilicon gate 5.

The low forward voltage drop diode adopts an N-type accumulation MOSFET, and the drain of the N-type accumulation MOSFET is short-circuited with the polysilicon gate 5, which together constitute the anode 1 of the low forward voltage drop diode, N ⁺ substrate 7 The cathode 8 constituting the low forward diode. The N ⁺ heavily doped region 2 is the drain of the MOSFET, the polysilicon gate 5 is the gate of the MOSFET, and the N ⁺ substrate 7 is the source of the MOSFET.

In the diode with low forward voltage drop, the N ⁺ heavily doped region 2, the N type lightly doped region 9, the N ⁻ epitaxial region 4 and the N ⁺ substrate 7 form the electron path of the N type accumulation MOSFET. The P type heavily doped region 3 forms a diode structure with the N ⁻ epitaxial region 4 and the N ⁺ substrate 7 .

In the low forward voltage drop diode, the channel length of the N-type accumulation MOSFET is determined by the length of the N ^- type lightly doped region 9 between the N ⁺ heavily doped region 2 and the N- epitaxial region 4 .

The difference between the junction depths of the P-type heavily doped region 3 and the N ⁺ heavily doped region 2 of the low forward voltage drop diode can be different from the junction depth of the N-type lightly doped region 9, that is, the N-type lightly doped region 9 Junction depth can be flexibly adjusted according to withstand voltage and turn-on voltage requirements.

The P-type heavily doped region 3 of the diode with low forward voltage drop has a higher doping concentration, greater than 5×10 ¹⁷ cm ^- , which can directly form a heavily doped ohmic contact on the one hand, and provide a large number of holes on the other hand .

The diode with low forward voltage drop introduces an N ⁺ heavily doped region 2 at the top of the N ⁻ epitaxial layer 4 to provide electrons for the drain of the MOSFET to form an electron current.

The low forward voltage drop diode can adjust the depth and concentration of the N-type lightly doped region according to different voltage and current requirements.

The diode with low forward voltage drop adopts a trench gate structure to form a vertical channel, the channel length is easy to control, the cell structure can be made smaller, and the device area is saved.

Use the MEDICI simulation software to simulate the diode with low forward voltage drop shown in Figure 1, and simulate half of the cell structure. The parameters of the simulated device are: P-type heavily doped region 3 concentration: 1×10 ¹⁹ cm ^-3 , the thickness from the top metal anode 8 to the bottom of P-type heavily doped region 3 is 2.0µm; the concentration of N ⁺ heavily doped region 2 is: 1×10 ²⁰ cm ^-3 , and the thickness is 0.2µm; The width of the impurity region 9 is: 0.12µm; the thickness of the gate oxide layer 6 on the left side is: 0.04µm, and the thickness of the gate oxide layer 6 on the lower side is: 0.04µm; the concentration of the N ^- epitaxial layer is: 2.5×10 ¹⁵ cm ^-3 The depth from the bottom of the heavily doped region 3 to the upper part of the N ⁺ substrate 7 is 10µm; the doping concentration of the N ⁺ substrate region 7 is 2.5×10 ²⁰ cm ^-3 , and the thickness is 0.5µm; the width of half a cell is simulated For: 1.44µm.

The working principle of the present invention can be described as follows:

The diode device with low forward voltage drop can adopt structures such as trench gate and planar gate, and the working principles of these structures are similar.

The N ⁺ heavily doped region 2 provides electrons to assist in depleting the N lightly doped region 9 . The P-type heavy doping is implanted once to form a vertical channel, and the length of the channel is the depth of the P-type heavily doped region 3 . The P-type heavily doped region 3 provides a large number of holes while forming a heavily doped ohmic contact. The present invention adopts an N-type accumulation MOSFET, the N ⁺ heavily doped region 2 is the drain of the MOSFET, the polysilicon gate 5 is the gate of the MOSFET, and the N ⁺ substrate region 7 is the source of the MOSFET. The drain of the N-type accumulation MOSFET is short-circuited with the polysilicon gate, which together form the anode 1 of the low forward voltage drop diode, and the N ⁺ substrate forms the cathode 8 of the low forward voltage drop diode. When a small positive voltage is applied to the metal anode 1 and the metal cathode 8 is grounded, the N ⁺ heavily doped region 2 and the N ^- epitaxial layer 4 are connected to form a conductive channel. The P-type heavily doped region 3 is positively pressed, that is, the body region of the N-type accumulation MOSFET is connected to a high potential, and the N ^- epitaxial layer 4 connected to the metal cathode 8 is not pressurized, that is, the source region of the MOSFET is a low potential, and the body source The voltage V _BS is positive. It can be seen from the body effect that the absolute value of the threshold voltage is greater than when the body-source voltage is zero, the charge in the accumulation channel increases, and the conduction current increases. In the two N ⁺ heavily doped regions 2 and at the interface between the bottom of the gate oxide layer 6 and the N ^- epitaxial layer 4, a thin layer of electron accumulation is formed, which is beneficial to further reduce the turn-on voltage of the device. That is, when the forward bias is less than the barrier voltage of the parasitic PN junction between the P-type heavily doped region 3 and the N ⁺ heavily doped region 2, the N-type accumulation MOSFET will also be turned on, and the device is in a forward conduction state, Therefore, the required turn-on voltage of a diode with a low forward voltage drop is relatively low.

P ⁺ heavily doped region 3, N ^- epitaxial region 4 and N ⁺ substrate 7 respectively constitute the P region, I region, and N region of the PIN diode. With the increase of the applied voltage, the P region and the N region in the PIN structure The potential between them is greater than the built-in potential of the PiN diode, the P ⁺ heavily doped region 3 injects holes into the N ^{— epitaxial region 4, and at the same time, the N — epitaxial} region 4 injects holes into the P ⁺ heavily doped region 3, and the PiN diode turns on , causing a large amount of current to flow through the device.

When a reverse bias is applied, there is a potential difference between the cathode and the anode, and the PN junction formed by the P ^- type heavily doped region 3 and the N- epitaxial layer 4 begins to deplete. The doping concentration of the P-type heavily doped region 3 is far greater than the doping concentration of the N ^- epitaxial layer 4, the reverse bias depletion layer mainly expands to the N ^- epitaxial layer 4, and the P-type heavily doped region 3 depletes the N ^- epitaxy Layer 4. The PN junction is quickly depleted and bears the reverse bias voltage. The reverse leakage current of the super barrier diode is determined by the PN junction, which can greatly reduce the size of the reverse leakage current.

Fig. 2 is a planar gate structure of a low forward voltage drop diode device provided by the present invention. The polysilicon gate 5 and the gate oxide layer 6 are formed on the top of the device to form a planar gate structure. The device forms a lateral channel, and the channel length is determined by the width of the N-type lightly doped region 9. Under the same breakdown voltage, this structure requires a longer P-type heavily doped region 3, and the area required for the device is relatively large. .

FIG. 3 is an extended structure of a diode with low forward voltage drop provided by the present invention, wherein there is an N-type buffer zone 11 between the N ⁻ epitaxial layer 4 and the N ⁺ substrate 7 . Likewise, the extension structure can also be made into a planar structure.

FIG. 4 is another extended structure of the diode with low forward voltage drop provided by the present invention, in which the N-type lightly doped region 9 of the present invention in FIG. 1 is replaced by a P-type region 10 . The P-type heavily doped region 3 and the P-type region 10 together form a partitioned P-well. The depth and concentration of the partitioned P-well can be adjusted according to different voltage and current requirements to meet the requirements. The P-type region can be obtained by boron implantation. The extension structure can also be made into a planar structure.

FIG. 5 is a planar gate structure of the extended structure in FIG. 4 . The polysilicon gate 5 and the gate oxide layer 6 are formed on the top of the device to form a planar gate structure. The device forms a lateral channel, and the channel length is determined by the width of the P-type lightly doped region 10. Under the same breakdown voltage, this structure requires a longer P-type heavily doped region 3, and the area required for the device is relatively large. .

Fig. 6 is a schematic diagram of simulation of a diode device with low forward voltage drop provided by the present invention.

FIG. 7 is a schematic diagram of a simulation of a Schottky diode device. The top of the device uses a Schottky contact with a work function of 4.9. The N epitaxial concentration is 2.5×10 ¹⁵ cm ^-3 , and the thickness is 10µm.

Fig. 8 is a schematic diagram of a PiN diode device simulation. The N epitaxial concentration of the device is 2.5×10 ¹⁵ cm ^-3 , and the thickness is 10µm.

Figure 9 is a comparison of the low forward voltage drop diode provided by the present invention and the forward curve of the diode and Schottky power diode under the same N epitaxial concentration (2.5×10 ¹⁵ cm ^-3 ) and thickness (10µm). Since the turn-on of the diode with low forward voltage drop is mainly through the conduction of the channel of the N-type accumulation MOSFET but the current flows through, so the turn-on voltage is relatively low. It can be seen from the comparison that the turn-on voltage of the diode with low forward voltage drop provided by the present invention is about 2.5V, which is obviously better than the forward characteristics of PiN diodes and Schottky diodes.

Figure 10 is a comparison of the low forward voltage drop diode provided by the present invention, PiN diode, and Schottky power diode reverse leakage current under the same N epitaxial concentration (2.5×10 ¹⁵ cm ^-3 ) and thickness (10µm). The diode with low forward voltage drop provided by the invention bears the withstand voltage through the depletion of the reverse bias PN junction in the off state, and reduces the reverse leakage current of the diode.

Claims (4)

1. a kind of diode of low forward voltage drop it is characterised in that: include n⁺Substrate (7), metallization negative electrode (8) is by n⁺Substrate (7) draw, n⁺Substrate (7) is n above^—Epitaxial layer (4)；n^—Epitaxial layer (4) top has a p-type heavily doped region (3), p-type The side of heavily doped region (3) has n⁺Heavily doped region (2), the wherein depth of p-type heavily doped region (3) are more than n⁺Heavily doped region (2) Depth；The side of p-type heavily doped region (3) also has a N-shaped lightly doped district (9), described n⁺Heavily doped region (2) is light with N-shaped Doped region (9) is adjacent, adjusts the concentration of N-shaped lightly doped district (9) according to different voltage x current scope, p-type heavily doped region (3) and n⁺The difference of junction depth of heavily doped region (2) is identical or different with N-shaped lightly doped district (9) junction depth, i.e. N-shaped lightly doped district (9) junction depth root Require to adjust according to pressure and cut-in voltage；P-type heavily doped region (3) and n^—Epitaxial layer (4) forms pn-junction；n^—Epitaxial layer (4) top There is the polygate electrodes (5) being isolated from it by gate oxide (6), n⁺Heavily doped region (2) and N-shaped lightly doped district (9) are led to Cross gate oxide (6) to isolate with polygate electrodes (5)；Metallization anode (1) is located at top device, covers all p-types heavily doped Miscellaneous area (3), n⁺Heavily doped region (2), gate oxide (6) and polygate electrodes (5)；

n⁺Heavily doped region (2), N-shaped lightly doped district (9), n^—Epitaxial layer (4) and n⁺Substrate (7) forms N-shaped accumulation type mosfet's Electronics path；P-type heavily doped region (3) and n^—Epitaxial layer (4) and n⁺Substrate (7) forms pin diode structure；

Described N-shaped accumulation type mosfet channel length is by n⁺Heavily doped region (2) and n^—N-shaped lightly doped district (9) between epitaxial layer (4) Length determines.

2. low forward voltage drop as claimed in claim 1 diode it is characterised in that: the doping of described p-type heavily doped region (3) is dense Degree is more than 5 × 10¹⁷cm^-3.

3. low forward voltage drop as claimed in claim 1 diode it is characterised in that: described n^—Epitaxial layer (4) and n⁺Substrate (7) also there is between N-shaped relief area (11).

4. low forward voltage drop as claimed in claim 1 diode it is characterised in that: described N-shaped lightly doped district (9) replaces with For p-type area (10), p-type heavily doped region (3) and p-type area (10) collectively form subregion p trap, by adjust subregion p trap depth and Meeting different voltage and current requirements, described p-type area (10) can be obtained concentration by the acceptor impurity that injection includes boron.