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CN103367224A - Method for forming groove in substrate - Google Patents

Method for forming groove in substrate Download PDF

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Publication number
CN103367224A
CN103367224A CN2012100930603A CN201210093060A CN103367224A CN 103367224 A CN103367224 A CN 103367224A CN 2012100930603 A CN2012100930603 A CN 2012100930603A CN 201210093060 A CN201210093060 A CN 201210093060A CN 103367224 A CN103367224 A CN 103367224A
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mask layer
substrate
groove
patterned mask
layer
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陈东郁
王志荣
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United Microelectronics Corp
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United Microelectronics Corp
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Abstract

A method of forming a trench in a substrate is disclosed. First, a first patterned mask layer is formed on a substrate, wherein the first patterned mask layer has a first trench. Then, a material layer is formed on the substrate, and the material layer is formed along the first trench conformally. Then, a second patterned mask layer is formed on the material layer to fill the first trench. Then, part of the material layer is removed, and the material layer between the second patterned mask layer and the substrate is remained to form a second trench. Finally, an etching manufacturing process is carried out by taking the first patterning mask layer and the second patterning mask layer as masks.

Description

在基板中形成沟槽的方法Method of forming a trench in a substrate

技术领域 technical field

本发明涉及一种在基板中形成沟槽的方法,特别来说,是涉及一种在基板中形成极窄沟槽的方法。The present invention relates to a method of forming a trench in a substrate, in particular, to a method of forming an extremely narrow trench in a substrate.

背景技术 Background technique

在半导体制作工艺上,为了将集成电路(integrated circuits)的图案顺利地转移到半导体芯片上,必须先将电路图案设计于一光掩模布局图上,之后依据光掩模布局图所输出的光掩模图案(photomask pattern)来制作一光掩模,并且将光掩模上的图案以一定的比例转移到该半导体芯片上,也就是俗称的光刻技术(lithography)。In the semiconductor manufacturing process, in order to smoothly transfer the pattern of integrated circuits (integrated circuits) to the semiconductor chip, the circuit pattern must first be designed on a photomask layout, and then the light output according to the photomask layout A photomask pattern is used to make a photomask, and the pattern on the photomask is transferred to the semiconductor chip in a certain proportion, which is commonly known as lithography.

而随着半导体电路的集成层次的快速增加,目前的光刻技术已经遇到了瓶颈,而无法应付日益缩小的元件尺寸。举例来说,形成金属导线的镶嵌制作工艺须先在硬掩模中形成沟槽图案,然后再将此沟槽图案转印至介电层中,然后在介电层的沟槽中填入金属以形成金属导线。然而受限于目前的半导体技术,现有的光刻技术并无法在掩模层中形成较窄的沟槽图案,故也限制了整体金属化内连线系统的尺寸。With the rapid increase of the integration level of semiconductor circuits, the current photolithography technology has encountered a bottleneck and cannot cope with the ever-shrinking component sizes. For example, the damascene process for forming metal wires must first form trench patterns in the hard mask, then transfer the trench patterns to the dielectric layer, and then fill the trenches in the dielectric layer with metal. to form metal wires. However, limited by the current semiconductor technology, the existing photolithography technology cannot form a narrow trench pattern in the mask layer, which also limits the size of the overall metallization interconnection system.

因此,还需要一种新颖的半导体制作工艺,可以在基板中形成较窄宽度的沟槽。Therefore, there is also a need for a novel semiconductor manufacturing process that can form trenches with narrower widths in the substrate.

发明内容 Contents of the invention

本发明的目的在于提供一种在基板中形成沟槽的方法,能够形成极窄沟槽。It is an object of the present invention to provide a method for forming trenches in a substrate capable of forming extremely narrow trenches.

为达上述目的,根据本发明的一实施方式,本发明所提供的一种在基板中形成沟槽的方法,首先在一基板上形成一第一图案化掩模层,第一图案化掩模层具有一第一沟槽。接着在基板上全面形成一物质层,物质层共形地沿着该第一沟槽形成。然后于物质层上形成一第二图案化掩模层,以填满第一沟槽。接着移除部分的物质层,而保留位于第二图案化掩模层与基板之间的物质层,以形成一第二沟槽。最后,以第一图案化掩模层以及第二图案化掩模层为掩模进行一蚀刻制作工艺。In order to achieve the above object, according to an embodiment of the present invention, a method for forming a groove in a substrate provided by the present invention includes first forming a first patterned mask layer on a substrate, the first patterned mask The layer has a first trench. Then, a material layer is formed on the entire surface of the substrate, and the material layer is conformally formed along the first groove. Then a second patterned mask layer is formed on the material layer to fill up the first trench. Then part of the substance layer is removed, and the substance layer located between the second patterned mask layer and the substrate remains, so as to form a second groove. Finally, an etching process is performed using the first patterned mask layer and the second patterned mask layer as masks.

根据本发明的另一实施方式,本发明所提供的一种在基板中形成沟槽的方法,首先于一基板上形成一第一图案化掩模层,其具有一第一沟槽。接着于第一沟槽的侧壁上形成一物质层。然后形成一第二图案化掩模层,以填满第一沟槽。接着移除基板上的全部的物质层,以形成一第二沟槽。最后,以第一图案化掩模层以及第二图案化掩模层为掩模进行一蚀刻制作工艺。According to another embodiment of the present invention, the present invention provides a method for forming a groove in a substrate. Firstly, a first patterned mask layer is formed on a substrate, which has a first groove. Then a substance layer is formed on the sidewall of the first trench. Then a second patterned mask layer is formed to fill up the first trench. Then all the material layer on the substrate is removed to form a second groove. Finally, an etching process is performed using the first patterned mask layer and the second patterned mask layer as masks.

本发明提出的形成沟槽的方法,其特征是在第一沟槽中共形地形成物质层,然后以第二图案化掩模层填满第一沟槽,最后移除第一沟槽侧壁上的物质层,形成的第二沟槽的宽度大体上会等于物质层的厚度。利用本发明所提供的方法,可以在基板中得到一极窄宽度的沟槽。The method for forming trenches proposed by the present invention is characterized in that a material layer is conformally formed in the first trench, and then the first trench is filled with a second patterned mask layer, and finally the sidewall of the first trench is removed. The upper material layer, the width of the formed second trench is substantially equal to the thickness of the material layer. Utilizing the method provided by the invention, a trench with extremely narrow width can be obtained in the substrate.

附图说明 Description of drawings

图1至图7为本发明一种在基板中形成沟槽的方法的第一实施例的示意图;1 to 7 are schematic diagrams of a first embodiment of a method for forming a trench in a substrate according to the present invention;

图8为本发明一种在基板中形成沟槽的方法的第二实施例的示意图;8 is a schematic diagram of a second embodiment of a method for forming a trench in a substrate according to the present invention;

图9至图10为本发明一种在基板中形成沟槽的方法的第三实施例的示意图;9 to 10 are schematic diagrams of a third embodiment of a method for forming a trench in a substrate according to the present invention;

图11至图12为本发明一种在基板中形成沟槽的方法的又一实施例的示意图;11 to 12 are schematic diagrams of another embodiment of a method for forming a groove in a substrate according to the present invention;

图13至图17为本发明一种在基板中形成沟槽的方法的第四实施例的示意图;13 to 17 are schematic diagrams of a fourth embodiment of a method for forming a trench in a substrate according to the present invention;

图18至图20为本发明一种在基板中形成沟槽的方法的第五实施例的示意图。18 to 20 are schematic diagrams of a fifth embodiment of a method for forming a trench in a substrate according to the present invention.

主要元件符号说明Description of main component symbols

300     基板                  310     第二沟槽300 Substrate 310 Second groove

302     第一图案化掩模层      312     第三掩模层302 first patterned mask layer 312 third mask layer

302a    底第一图案化掩模层    312a    底第三掩模层302a bottom first patterned mask layer 312a bottom third mask layer

302b    顶第一图案化掩模层    312b    顶第三掩模层302b top first patterned mask layer 312b top third mask layer

304     第一沟槽              313     第三图案化掩模层304 first trench 313 third patterned mask layer

304a    底面                314    第二间隙壁(侧壁子)304a Bottom surface 314 Second gap wall (side wall)

304b    侧壁                315    线形图案304b Sidewall 315 Linear Pattern

306     物质层              316    第三沟槽306 Substance Layer 316 Third Groove

308     第二掩模层          318    第四沟槽308 second mask layer 318 fourth groove

309     第二图案化掩模层    320    第五沟槽309 second patterned mask layer 320 fifth trench

具体实施方式 Detailed ways

为使熟悉本发明所属技术领域的一般技术者能更进一步了解本发明,下文特列举本发明的数个较佳实施例,并配合所附附图,详细说明本发明的构成内容及所欲达成的功效。In order to enable those who are familiar with the technical field of the present invention to further understand the present invention, several preferred embodiments of the present invention are listed below, together with the accompanying drawings, the content of the composition of the present invention and the intended achievement are described in detail. effect.

请参考图1至图7,所绘示为本发明一种在基板中形成沟槽的方法的第一实施例的示意图。如图1所示,首先提供一基板300,基板300可以是各种半导体基底,例如是硅基底(silicon substrate)、外延硅基底(epitaxial siliconsubstrate)、硅锗半导体基底(silicon germanium substrate)、碳化硅基底(siliconcarbide substrate)或硅覆绝缘(silicon-on-insulator,SOI)基底,也可以是包含具有非半导体材质的基底,例如是玻璃基底(glass substrate),以在其上形成薄膜晶体管(thin-film-transistor)等显示装置,或是熔融石英块(fused quartz),以在其上形成光掩模。在本发明另一实施例中,基底300可以包含一层或多层的低介电常数层,以在其上形成具有双镶嵌(dual damascene)结构的金属内连线系统。举例而言,基板300可以包含不同的掺杂区(doped region)、一层或多层的低介电常数介电层(low-k dielectric layer)或多层金属内连线系统(metalinterconnection system),并具有一个或多个微电子元件设置于其中,例如是互补式金属氧化物半导体(complementary metal oxide semiconductor,CMOS)或是感光晶体管(photo-diode)等。接着,在基板300上形成一第一图案化掩模层302。在本发明的一实施例中,第一图案化掩模层302中具有一第一沟槽304,第一沟槽304具有一底面304a以及一侧壁304b,其中第一沟槽304的底面304a会暴露基板300。第一图案化掩模层302可以包含各种适用作为硬掩模的材质,例如是氮化硅(silicon nitride)、氮氧化硅(silicon oxynitride)、碳化硅(silicon carbide)或是应用材料公司提供的进阶图案化薄膜(advancedpattern film,APF)。而在另一实施例中,第一图案化掩模层304可以包含一多层膜的结构,例如可以是一磷硅玻璃(phosphor-silicate glass,PSG)层加上位于其上的氮化硅层。在另一实施例中,第一图案化掩模层302也可以包含有机聚合物,例如是旋涂式玻璃(spin-on-glass)或SiLKTM聚合物(SiLKTMpolymer)。Please refer to FIG. 1 to FIG. 7 , which are schematic diagrams of a first embodiment of a method for forming a trench in a substrate according to the present invention. As shown in FIG. 1, a substrate 300 is firstly provided. The substrate 300 can be various semiconductor substrates, such as silicon substrate, epitaxial silicon substrate, silicon germanium substrate, silicon carbide The substrate (siliconcarbide substrate) or silicon-on-insulator (SOI) substrate may also include a substrate having a non-semiconductor material, such as a glass substrate, to form a thin-film transistor (thin- film-transistor), or a fused quartz block (fused quartz) to form a photomask thereon. In another embodiment of the present invention, the substrate 300 may include one or more low dielectric constant layers to form a metal interconnection system having a dual damascene structure thereon. For example, the substrate 300 may include different doped regions, one or more layers of low-k dielectric layers, or a multi-layer metal interconnection system. , and have one or more microelectronic elements disposed therein, such as complementary metal oxide semiconductor (CMOS) or photo-diode. Next, a first patterned mask layer 302 is formed on the substrate 300 . In an embodiment of the present invention, the first patterned mask layer 302 has a first trench 304, the first trench 304 has a bottom surface 304a and a side wall 304b, wherein the bottom surface 304a of the first trench 304 The substrate 300 will be exposed. The first patterned mask layer 302 may include various materials suitable as a hard mask, such as silicon nitride, silicon oxynitride, silicon carbide or materials provided by Applied Materials. Advanced patterned film (advanced pattern film, APF). In another embodiment, the first patterned mask layer 304 may comprise a multi-layer film structure, such as a phosphor-silicate glass (PSG) layer plus silicon nitride thereon. layer. In another embodiment, the first patterned mask layer 302 may also include an organic polymer, such as spin-on-glass or SiLK™ polymer .

接着如图2所示,在基板300上全面形成一物质层306。其中物质层306会形成在第一图案化掩模层302的顶面上并共形地(conformally)沿着一沟槽304的底面304a以及侧壁304b形成,但并不会填满第一沟槽304。形成物质层306的方法包含化学气相沉积(chemical vapor deposition,CVD)制作工艺,例如原子层沉积(atomic layer deposition,ALD)制作工艺等方式,但并不以此为限。在本发明的一实施例中,物质层306例如是硼磷硅玻璃(boronphosphor-silicate glass,BPSG)或是应用材料公司提供的进阶图案化薄膜(advanced pattern film,APF),且物质层306具有一厚度T大体上介于10纳米至200纳米之间。Next, as shown in FIG. 2 , a material layer 306 is formed on the entire substrate 300 . Wherein the substance layer 306 will be formed on the top surface of the first patterned mask layer 302 and conformally (conformally) along the bottom surface 304a and sidewall 304b of a trench 304, but will not fill the first trench groove 304 . The method of forming the material layer 306 includes chemical vapor deposition (chemical vapor deposition, CVD) process, such as atomic layer deposition (atomic layer deposition, ALD) process, etc., but not limited thereto. In an embodiment of the present invention, the material layer 306 is, for example, boronphosphor-silicate glass (boronphosphor-silicate glass, BPSG) or an advanced patterned film (advanced pattern film, APF) provided by Applied Materials, and the material layer 306 It has a thickness T generally between 10 nanometers and 200 nanometers.

如图3所示,在基板300上全面形成一第二掩模层308,其中第二掩模层308会形成在物质层306上,且会将第一沟槽304填满。第二掩模层308的材质可以和第一图案化掩模层302相同也可以不同,其包含各种适合作为掩模层的材质,例如氮化硅、氮氧化硅、碳化硅或是应用材料公司提供的进阶图案化薄膜,但较佳者必须和物质层306之间具有一蚀刻选择比,也就是对一蚀刻剂具有不同的蚀刻速率。而在本发明另一实施例中,第二掩模层308也可以是多晶硅(poly-silicon)或是有机聚合物例如是旋涂式玻璃(spin-on-glass)或光致抗蚀剂层。As shown in FIG. 3 , a second mask layer 308 is fully formed on the substrate 300 , wherein the second mask layer 308 is formed on the substance layer 306 and fills up the first trench 304 . The material of the second mask layer 308 can be the same as or different from that of the first patterned mask layer 302, and it includes various materials suitable as a mask layer, such as silicon nitride, silicon oxynitride, silicon carbide or applied materials. The advanced patterned thin film provided by the company must have an etching selectivity ratio with the substance layer 306, that is, have a different etching rate for an etchant. In another embodiment of the present invention, the second mask layer 308 can also be polysilicon (poly-silicon) or organic polymer such as spin-on-glass (spin-on-glass) or photoresist layer .

如图4所示,进行一平坦化制作工艺,例如是一回蚀刻制作工艺、一化学机械研磨(chemical mechanical polish,CMP)制作工艺、或是两者的组合,以移除第一沟槽304以外的第二掩模层308,仅保留第一沟槽304内的第二掩模层308,以形成第二图案化掩模层309。平坦化制作工艺以能暴露出第一图案化掩模层302上的物质层306为原则,较佳者,平坦化制作工艺会进行到第二掩模层308齐平于第一图案化掩模层302上的物质层306。在本发明较佳实施例中,平坦化制作工艺是采用回蚀刻制作工艺,而由于第二掩模层308与物质层306之间有蚀刻选择比,因此在此平坦化制作工艺中物质层306并不会被移除。As shown in FIG. 4 , a planarization process, such as an etch-back process, a chemical mechanical polish (CMP) process, or a combination of both, is performed to remove the first trench 304 Except for the second mask layer 308 , only the second mask layer 308 in the first trench 304 is reserved to form a second patterned mask layer 309 . The planarization process is based on the principle that the material layer 306 on the first patterned mask layer 302 can be exposed. Preferably, the planarization process will be carried out until the second mask layer 308 is flush with the first patterned mask Layer 306 of matter on layer 302 . In a preferred embodiment of the present invention, the planarization process is an etch-back process, and since there is an etching selectivity ratio between the second mask layer 308 and the material layer 306, the material layer 306 in this planarization process will not be removed.

如图5所示,进行一干蚀刻及/或湿蚀刻制作工艺,以移除位于第一沟槽304的侧壁304b以及第一图案化掩模层302上的物质层306,而保留基板300以及第二图案化掩模层309之间的物质层306。在本发明较佳实施例中,是以第一图案化物质层302以及第二图案化物质层309为掩模进行一干蚀刻制作工艺,来移除部分的物质层306,使得残留下来的物质层306能大体上与第二图案化掩模层309于垂直面上切齐。此时,第一图案化掩模层302以及第二图案化掩模层309之间会形成一第二沟槽310,且第二沟槽310的宽度大体上相同于物质层306的厚度T。As shown in FIG. 5, a dry etching and/or wet etching process is performed to remove the substance layer 306 on the sidewall 304b of the first trench 304 and the first patterned mask layer 302, while the substrate 300 and Substance layer 306 between second patterned mask layers 309 . In a preferred embodiment of the present invention, a dry etching process is performed using the first patterned material layer 302 and the second patterned material layer 309 as masks to remove part of the material layer 306, so that the remaining material layer 306 can be substantially aligned with the second patterned mask layer 309 on the vertical plane. At this time, a second groove 310 is formed between the first patterned mask layer 302 and the second patterned mask layer 309 , and the width of the second groove 310 is substantially the same as the thickness T of the substance layer 306 .

如图6所示,以第一图案化掩模层302以及第二图案化掩模层309为掩模进行一干蚀刻制作工艺,以加深第二沟槽310的深度至基板300中。最后如图7所示,将基板300上的第一图案化掩模层302、第二图案化掩模层309以及物质层306全部移除,如此一来,即可在基板300中形成一第三沟槽316,且第三沟槽316的宽度大体上等于物质层306的厚度T。利用本发明的方法,可在基板300中形成一极窄的第三沟槽316。在一实施例中,若基板300为半导体基板,则本发明的方法可以应用在例如浅沟槽隔离(shallow trenchisolation,STI)、非平面晶体管例如鳍状晶体管(Fin-FET)或多栅极晶体管(multigate FET)等方面;在另一实施例中,若基板300包含低介电常数层,则可以利用第三沟槽316来形成金属内连线系统中例如双镶嵌等制作工艺,但不以上述为限。As shown in FIG. 6 , a dry etching process is performed using the first patterned mask layer 302 and the second patterned mask layer 309 as masks to deepen the depth of the second trench 310 into the substrate 300 . Finally, as shown in FIG. 7 , the first patterned mask layer 302 , the second patterned mask layer 309 and the substance layer 306 on the substrate 300 are all removed, so that a first patterned mask layer 302 can be formed in the substrate 300 There are three grooves 316 , and the width of the third groove 316 is substantially equal to the thickness T of the material layer 306 . Using the method of the present invention, an extremely narrow third trench 316 can be formed in the substrate 300 . In one embodiment, if the substrate 300 is a semiconductor substrate, the method of the present invention can be applied to, for example, shallow trench isolation (shallow trench isolation, STI), non-planar transistors such as fin transistors (Fin-FET) or multi-gate transistors. (multigate FET), etc.; in another embodiment, if the substrate 300 includes a low dielectric constant layer, the third trench 316 can be used to form a metal interconnection system such as dual damascene and other manufacturing processes, but not with The above is limited.

请参考图8,所绘示为本发明一种在基板中形成沟槽的方法的第二实施例的示意图。在进行完图5的制作工艺后,如图8所示,还可以更减小第二沟槽310的宽度,例如在第二沟槽310的侧壁上形成一第二间隙壁314,以在第二沟槽310之中形成一第四沟槽318。后续,再进行蚀刻制作工艺以将第四沟槽318的图案转印至基板300中,而形成了更窄的沟槽图案。Please refer to FIG. 8 , which is a schematic diagram of a second embodiment of a method for forming a trench in a substrate according to the present invention. After performing the manufacturing process in FIG. 5, as shown in FIG. A fourth trench 318 is formed in the second trench 310 . Subsequently, an etching process is performed to transfer the pattern of the fourth trench 318 to the substrate 300 to form a narrower trench pattern.

请参考图9与图10,所绘示为本发明一种在基板中形成沟槽的方法的第三实施例的示意图。如图9所示,本实施例与第一实施例的区别在于,在形成第一图案化掩模层302之前,还可在基板300上全面形成一第三掩模层312,然后如图10所示,将第二沟槽310的图案转印至第三掩模层312中,以形成第三图案化掩模层313。详细来说,图9是先进行一干蚀刻制作工艺,并以第一图案化掩模层302以及第二图案化掩模层309为掩模,以加深第二沟槽310的深度至第三掩模层312中,以在第三掩模层312中形成一第五沟槽320,然后再去除第一图案化掩模层302、第二图案化掩模层309以及物质层306。最后,以第三图案化掩模层313为掩模进行一蚀刻制作工艺来蚀刻基板300,同样可以得到如图7中基板300具有第三沟槽316的结构。Please refer to FIG. 9 and FIG. 10 , which are schematic diagrams of a third embodiment of a method for forming trenches in a substrate according to the present invention. As shown in FIG. 9, the difference between this embodiment and the first embodiment is that, before forming the first patterned mask layer 302, a third mask layer 312 can also be fully formed on the substrate 300, and then as shown in FIG. 10 As shown, the pattern of the second groove 310 is transferred into the third mask layer 312 to form a third patterned mask layer 313 . In detail, in FIG. 9, a dry etching process is performed first, and the first patterned mask layer 302 and the second patterned mask layer 309 are used as masks to deepen the depth of the second trench 310 to the third mask. In the mold layer 312 , a fifth groove 320 is formed in the third mask layer 312 , and then the first patterned mask layer 302 , the second patterned mask layer 309 and the substance layer 306 are removed. Finally, an etching process is performed using the third patterned mask layer 313 as a mask to etch the substrate 300 , and the structure with the third groove 316 in the substrate 300 as shown in FIG. 7 can also be obtained.

值得注意的是,第三图案化掩模层313可以包含各种硬掩模材质,例如氮化硅、氮氧化硅、碳化硅或是应用材料公司提供的进阶图案化薄膜。在本发明的一实施例中,第三图案化掩模层313可以和第一图案化掩模层302一样具有多层膜的结构,例如一磷硅玻璃层加上位于其上的氮化硅层。若第三图案化掩模层313为单层膜结构时,较佳者,第三图案化掩模层313与第一图案化掩模层302以及第二图案化掩模层309之间会具有蚀刻选择比,其中第一图案化掩模层302与第二图案化掩模层309的材质可以相同也可以不同。在本发明的一实施例中,第三图案化掩模层313例如是进阶图案化薄膜,第一图案化掩模层302例如是氮化硅层,第二图案化掩模层309例如是光致抗蚀剂层,而物质层306例如是硼磷硅玻璃层。It should be noted that the third patterned mask layer 313 may include various hard mask materials, such as silicon nitride, silicon oxynitride, silicon carbide, or advanced patterned films provided by Applied Materials. In an embodiment of the present invention, the third patterned mask layer 313 may have the same multi-layer structure as the first patterned mask layer 302, such as a phosphosilicate glass layer plus silicon nitride on it. layer. If the third patterned mask layer 313 is a single-layer film structure, preferably, there will be a layer between the third patterned mask layer 313 and the first patterned mask layer 302 and the second patterned mask layer 309. Etching selectivity, wherein the materials of the first patterned mask layer 302 and the second patterned mask layer 309 can be the same or different. In an embodiment of the present invention, the third patterned mask layer 313 is, for example, an advanced patterned film, the first patterned mask layer 302 is, for example, a silicon nitride layer, and the second patterned mask layer 309 is, for example, A photoresist layer, and the substance layer 306 is, for example, a borophosphosilicate glass layer.

而在本发明另一实施态样中,本实施例也可搭配第二实施例的步骤,如图11所示,利用在第五沟槽320中形成第二间隙壁314的方法,后续可在基板300中形成一更窄沟槽的结构。或者,在本发明另一实施态样中,在图11之后,也可移除第三图案化掩模层313而保留第二间隙壁314,然后再以第二间隙壁314为掩模进行蚀刻制作工艺来移除部分的基底300。如此一来,可在基底300中形成极窄的线形图案(line pattern)315。此线形图案315可应用形成如平面晶体管的栅极,或是非平面晶体管的鳍状结构等制作工艺。In another embodiment of the present invention, this embodiment can also be combined with the steps of the second embodiment. As shown in FIG. A narrower trench structure is formed in the substrate 300 . Alternatively, in another embodiment of the present invention, after FIG. 11 , the third patterned mask layer 313 can also be removed to keep the second spacer 314, and then etching is performed using the second spacer 314 as a mask. The fabrication process removes part of the substrate 300 . In this way, a very narrow line pattern (line pattern) 315 can be formed in the substrate 300 . The linear pattern 315 can be used to form a gate of a planar transistor or a fin structure of a non-planar transistor.

请参考图13至图17,所绘示为本发明一种在基板中形成沟槽的方法的第四实施例的示意图。第四实施例的特点在于,掩模层是使用多层的态样,可更佳地确保蚀刻制作工艺的准确性。如图13所示,第一图案化掩模层302包含一底第一图案化掩模层302a以及一顶第一图案化掩模层302b;第三掩模层312包含一底第三掩模层312a以及一顶第三掩模层312b。在本发明的一实施例中,底第一图案化掩模层302a以及底第三掩模层312a包含相同材质,例如是氧化硅层;而顶第一图案化掩模层302b以及顶第三掩模层312b包含相同材质,例如是氮化硅;第二掩模层308例如是光致抗蚀剂层或有机分子层;物质层306例如是硼磷硅玻璃层。Please refer to FIG. 13 to FIG. 17 , which are schematic diagrams of a fourth embodiment of a method for forming a trench in a substrate according to the present invention. The characteristic of the fourth embodiment is that the mask layer is multi-layered, which can better ensure the accuracy of the etching process. As shown in Figure 13, the first patterned mask layer 302 includes a bottom first patterned mask layer 302a and a top first patterned mask layer 302b; the third mask layer 312 includes a bottom third mask layer 312a and a third mask layer 312b. In an embodiment of the present invention, the bottom first patterned mask layer 302a and the bottom third mask layer 312a comprise the same material, such as a silicon oxide layer; and the top first patterned mask layer 302b and the top third mask layer The mask layer 312b includes the same material, such as silicon nitride; the second mask layer 308 is, for example, a photoresist layer or an organic molecular layer; the material layer 306 is, for example, a borophosphosilicate glass layer.

接着如图14所示,进行一平坦化制作工艺,例如是回蚀刻制作工艺,以移除第一沟槽304以外的第二掩模层308,仅保留第一沟槽304内的第二掩模层308,以形成第二图案化掩模层309。由于第二掩模层308和物质层306之间具有蚀刻选择比,故蚀刻制作工艺并不会移除物质层306。在一实施例中,若第二掩模层308的材质为光致抗蚀剂层或有机分子层,此回蚀刻可使用包含CHF3/O2的蚀刻气体。Next, as shown in FIG. 14 , a planarization process, such as an etch-back process, is performed to remove the second mask layer 308 outside the first trench 304, leaving only the second mask layer in the first trench 304. mold layer 308 to form a second patterned mask layer 309 . Due to the etching selectivity between the second mask layer 308 and the substance layer 306 , the etching process will not remove the substance layer 306 . In one embodiment, if the material of the second mask layer 308 is a photoresist layer or an organic molecular layer, the etching back may use an etching gas containing CHF 3 /O 2 .

如图15所示,以顶第一图案化掩模层302b以及第二图案化掩模层309为掩模进行一干蚀刻制作工艺,以移除位于第一沟槽304的侧壁304b以及第一图案化掩模层302上的物质层306,而保留基板300以及第二图案化掩模层309之间的物质层306。在一实施例中,若物质层306的材质为硼磷硅玻璃层,此干蚀刻制作工艺可使用包含CF4/O2或C4F8/O2的气体。As shown in FIG. 15, a dry etching process is performed using the top first patterned mask layer 302b and the second patterned mask layer 309 as a mask to remove the sidewall 304b of the first trench 304 and the first trench 304. The substance layer 306 on the mask layer 302 is patterned, while the substance layer 306 between the substrate 300 and the second patterned mask layer 309 remains. In one embodiment, if the material layer 306 is a borophosphosilicate glass layer, the dry etching process may use a gas containing CF 4 /O 2 or C 4 F 8 /O 2 .

如图16所示,以第二图案化掩模层309为掩模进行一干蚀刻制作工艺,以移除顶第一图案化掩模层302b以及部分的顶第三掩模层312b。由于顶第一图案化掩模层302b以及顶第三掩模层312b采用相同的材质,例如氮化硅,且底第一图案化掩模层302a以及底第三掩模层312a采用相同材质,例如是氧化硅层,且两者之间具有蚀刻选择比,故此蚀刻制作工艺会以底第一图案化掩模层302a以及底第三掩模层312a为蚀刻停止层。在一实施例中,此蚀刻制作工艺可使用包含CF4/O2或C4F8/O2的气体。As shown in FIG. 16 , a dry etching process is performed using the second patterned mask layer 309 as a mask to remove the top first patterned mask layer 302 b and part of the top third mask layer 312 b. Since the top first patterned mask layer 302b and the top third mask layer 312b use the same material, such as silicon nitride, and the bottom first patterned mask layer 302a and the bottom third mask layer 312a use the same material, For example, it is a silicon oxide layer, and there is an etching selectivity between the two, so the etching process will use the bottom first patterned mask layer 302a and the bottom third mask layer 312a as the etching stop layer. In one embodiment, the etching process may use a gas comprising CF 4 /O 2 or C 4 F 8 /O 2 .

如图17所示,以第二图案化掩模层309为掩模进行一蚀刻制作工艺,以移除底第一图案化掩模层302a以及部分的底第三掩模层312a。由于底第一图案化掩模层302a以及底第三掩模层312a采用相同材质,故此蚀刻制作工艺会停在顶第三掩模层312b以及基底300上。在一实施例中,此蚀刻制作工艺可使用包含CH3F/O2或CH2F2/O2的气体。As shown in FIG. 17 , an etching process is performed using the second patterned mask layer 309 as a mask to remove the bottom first patterned mask layer 302 a and part of the bottom third mask layer 312 a . Since the bottom first patterned mask layer 302 a and the bottom third mask layer 312 a are made of the same material, the etching process will stop on the top third mask layer 312 b and the substrate 300 . In one embodiment, the etching process may use a gas including CH 3 F/O 2 or CH 2 F 2 /O 2 .

最后,以顶第三掩模层312b、第二图案化掩模层309为掩模来蚀刻基底300,同样可以形成如图7的沟槽结构。在本发明的一实施例中,若基底300为硅基底,此蚀刻制作工艺可使用包含Cl2/He、HBr/He或Cl2/HBr/He的气体。本实0施例中,由于使用了多层的掩模层结构,故蚀刻时可以利用不同材质间的蚀刻选择比,并以底第一图案化掩模层302a与底第三掩模层312a为蚀刻停止层,可以增加蚀刻制作工艺的准确性。同样地,第四实施例可搭配前述第二实施例至第三实施例的实施态样,在此不加以赘述。Finally, the substrate 300 is etched using the top third mask layer 312b and the second patterned mask layer 309 as masks, and the trench structure as shown in FIG. 7 can also be formed. In an embodiment of the present invention, if the substrate 300 is a silicon substrate, the etching process may use a gas comprising Cl 2 /He, HBr/He or Cl 2 /HBr/He. In this embodiment, due to the use of a multi-layer mask layer structure, the etching selectivity between different materials can be utilized during etching, and the bottom first patterned mask layer 302a and the bottom third mask layer 312a As an etching stop layer, the accuracy of the etching process can be increased. Likewise, the fourth embodiment can be combined with the implementation aspects of the aforementioned second embodiment to the third embodiment, which will not be repeated here.

请参考图18至图20,所绘示为本发明一种在基板中形成沟槽的方法的第五实施例的示意图。第五实施例的前面步骤和第一实施例中图1和图2相同,在此不加以赘述。在形成了如图2的物质层306后,接着如图18所示,进行一干蚀刻制作工艺以去除第一图案化掩模层302上以及第一沟槽304的底面304a的物质层306,而仅保留第一沟槽304的侧壁304b的物质层306。Please refer to FIG. 18 to FIG. 20 , which are schematic diagrams of a fifth embodiment of a method for forming a trench in a substrate according to the present invention. The preceding steps of the fifth embodiment are the same as those shown in Fig. 1 and Fig. 2 in the first embodiment, and will not be repeated here. After forming the substance layer 306 as shown in FIG. 2 , as shown in FIG. 18 , a dry etching process is performed to remove the substance layer 306 on the first patterned mask layer 302 and the bottom surface 304 a of the first trench 304 , and Only the substance layer 306 of the sidewall 304b of the first trench 304 remains.

接着如图19所示,形成一第二图案化掩模层309以至少填满第一沟槽304。形成第二图案化掩模层309的方法例如先在基板300上全面形成一第二掩模层(图未示),然后再进行一回蚀刻制作工艺或平坦化制作工艺,以在第一沟槽304中形成第二图案化掩模层309,其中第二图案化掩模层309可以等高或略低于第一图案化掩模层302,以能暴露出物质层306顶面为原则。Next, as shown in FIG. 19 , a second patterned mask layer 309 is formed to at least fill up the first trench 304 . The method for forming the second patterned mask layer 309 is, for example, to firstly form a second mask layer (not shown) on the substrate 300, and then perform an etch-back process or a planarization process, so that the first trench A second patterned mask layer 309 is formed in the groove 304 , wherein the second patterned mask layer 309 may be equal to or slightly lower than the first patterned mask layer 302 , so as to expose the top surface of the substance layer 306 as a principle.

最后如图20所示,去除基板300上全部的物质层306,使得第一图案化掩模层302与第二图案化掩模层309之间形成了第二沟槽310,且第二沟槽310的宽度大体上等于物质层306的厚度T。后续,可依照如第一实施例的步骤,以第一图案化掩模层302与第二图案化掩模层309为掩模进行一干蚀刻制作工艺,以在基板300中形成极窄的第三沟槽316,如图7所示。本实施例也可如第二实施例的步骤,在第二沟槽310中形成间隙壁,以在基板300中形成更窄沟槽的结构。或者,如第三实施例的步骤,在第一图案化掩模层302以及基板300之间先形成一第三掩模层312,然后将第二沟槽310的图案转印至第三掩模层312后,再以第三图案化掩模层313为掩模进行蚀刻制作工艺,而将第三图案化掩模层313的图案转印至基板300中。接下来,又可以如图11与图12的制作工艺,以间隙壁为掩模以在基底300中形成极窄线形图案的结构。Finally, as shown in FIG. 20 , all the substance layer 306 on the substrate 300 is removed, so that a second groove 310 is formed between the first patterned mask layer 302 and the second patterned mask layer 309 , and the second groove The width of 310 is substantially equal to the thickness T of the layer of substance 306 . Subsequently, according to the steps of the first embodiment, a dry etching process can be performed using the first patterned mask layer 302 and the second patterned mask layer 309 as masks to form an extremely narrow third Groove 316, as shown in FIG. 7 . This embodiment can also form a spacer in the second trench 310 as in the second embodiment, so as to form a narrower trench structure in the substrate 300 . Alternatively, as in the steps of the third embodiment, a third mask layer 312 is first formed between the first patterned mask layer 302 and the substrate 300, and then the pattern of the second groove 310 is transferred to the third mask layer 312 , an etching process is performed using the third patterned mask layer 313 as a mask, and the pattern of the third patterned mask layer 313 is transferred to the substrate 300 . Next, the fabrication process shown in FIG. 11 and FIG. 12 can be used to form a very narrow linear pattern structure in the substrate 300 by using the spacer as a mask.

值得注意的是,在本实施例中,第一图案化掩模层302必须和物质层306之间有蚀刻选择比,而第一图案化掩模层302与第二图案化掩模层309的材质可以相同也可以不同。在一实施例中,第三图案化掩模层313例如是进阶图案化薄膜,第一图案化掩模层302例如是氮化硅层,第二图案化掩模层309例如是光致抗蚀剂层,而物质层306例如是硼磷硅玻璃层。It should be noted that in this embodiment, the first patterned mask layer 302 and the material layer 306 must have an etch selectivity ratio, while the first patterned mask layer 302 and the second patterned mask layer 309 The materials may be the same or different. In one embodiment, the third patterned mask layer 313 is, for example, an advanced patterned film, the first patterned mask layer 302 is, for example, a silicon nitride layer, and the second patterned mask layer 309 is, for example, a photoresist etchant layer, and the substance layer 306 is, for example, a borophosphosilicate glass layer.

综上所述,本发明提出的形成沟槽的方法,其特征是在第一沟槽中共形地形成物质层,然后以第二图案化掩模层填满第一沟槽,最后移除第一沟槽侧壁上的物质层,形成的第二沟槽的宽度大体上会等于物质层的厚度。利用本发明所提供的方法,可以在基板中得到一极窄宽度的沟槽。In summary, the method for forming trenches proposed by the present invention is characterized in that a material layer is conformally formed in the first trench, and then the first trench is filled with a second patterned mask layer, and finally the first trench is removed. The material layer on the sidewall of the first groove forms a second groove whose width is substantially equal to the thickness of the material layer. Utilizing the method provided by the invention, a trench with extremely narrow width can be obtained in the substrate.

以上所述仅为本发明的较佳实施例,凡依本发明权利要求所做的均等变化与修饰,皆应属本发明的涵盖范围。The above descriptions are only preferred embodiments of the present invention, and all equivalent changes and modifications made according to the claims of the present invention shall fall within the scope of the present invention.

Claims (26)

1. method that forms groove in substrate comprises:
One substrate is provided;
Form one first patterned mask layer at this substrate, this first patterned mask layer has one first groove;
Form a material layer on this substrate, this material layer conformally forms along a bottom surface and at least one sidewall of this first groove comprehensively;
Form one second patterned mask layer at this material layer, this second patterned mask layer is filled up this first groove;
Remove this material layer of part, and keep this material layer between this second patterned mask layer and this substrate, so that form at least one the second groove between this first patterned mask layer and this second patterned mask layer; And
After forming this second groove, carry out an etching process take this first patterned mask layer and this second patterned mask layer as mask.
2. the method that forms groove in substrate as claimed in claim 1, wherein this etching process is to remove this substrate that the second groove exposes, to form one the 3rd groove in this substrate.
3. the method that in substrate, forms groove as claimed in claim 1, form this second groove after, also comprise:
Sidewall at this second groove forms at least one the second clearance wall, to form one the 4th groove in the second groove; And
Remove this substrate that the 4th groove exposes.
4. the method that forms groove in substrate as claimed in claim 1 wherein has etching selectivity between this second patterned mask layer and this material layer.
5. the method that forms groove in substrate as claimed in claim 1 wherein before forming this first patterned mask layer, also comprises: form one the 3rd mask layer on this substrate comprehensively.
6. the method that in substrate, forms groove as claimed in claim 5, wherein this etching process can remove the 3rd mask layer that this second groove exposes, and forming one the 3rd patterned mask layer, and the 3rd patterned mask layer has one the 5th groove.
7. the method that in substrate, forms groove as claimed in claim 6, form the 3rd patterned mask layer after, also comprise: take the 3rd patterned mask layer as mask, this substrate that is exposed to remove the 5th groove.
8. the method that in substrate, forms groove as claimed in claim 6, form the 3rd patterned mask layer after, also comprise:
At least one sidewall at the 5th groove forms one the 5th clearance wall, to form one the 6th groove in the 5th groove.
9. the method that forms groove in substrate as claimed in claim 8 also comprises and removes this substrate that the 6th groove exposes.
10. the method that forms groove in substrate as claimed in claim 8 also comprises:
Remove the 3rd patterned mask layer; And
Come the etching substrate take the 5th clearance wall as mask.
11. the method that forms groove in substrate as claimed in claim 6 wherein has etching selectivity between the 3rd patterned mask layer and this first patterned mask layer and this second patterned mask layer.
12. the method that forms groove in substrate as claimed in claim 1, the step that wherein forms this second patterned mask layer comprises:
Form one second mask layer on this material layer, this second mask layer can fill up this first groove comprehensively; And
Remove this second mask layer that is positioned at beyond this first groove, to form this second patterned mask layer.
13. the method that forms groove in substrate as claimed in claim 1, wherein this first patterned mask layer is identical with the material of this second patterned mask layer.
14. a method that forms groove in substrate comprises:
One substrate is provided;
Form one first patterned mask layer at this substrate, this first patterned mask layer has one first groove, and this first groove has a bottom surface and at least one sidewall;
This sidewall at this first groove forms a material layer;
Form one second patterned mask layer, to fill up this first groove;
Remove this whole material layer on this substrate, so that form one second groove between this first patterned mask layer and this second patterned mask layer; And
After forming this second groove, carry out an etching process take this first patterned mask layer and this second patterned mask layer as mask.
15. the method that forms groove in substrate as claimed in claim 14, wherein this etching process is to remove this substrate that the second groove exposes, to form one the 3rd groove in this substrate.
16. the method that in substrate, forms groove as claimed in claim 14, form this second groove after, also comprise:
This sidewall at this second groove forms one second clearance wall, to form one the 4th groove in the second groove; And
Remove this substrate that the 4th groove exposes.
17. the method that forms groove in substrate as claimed in claim 14 wherein has etching selectivity between this first patterned mask layer and this material layer.
18. the method that forms groove in substrate as claimed in claim 14 wherein before forming this first patterned mask layer, also comprises: on this substrate, form one the 3rd mask layer comprehensively.
19. the method that forms groove in substrate as claimed in claim 18, wherein this etching process can remove the 3rd mask layer that this second groove exposes, and to form one the 3rd patterned mask layer, the 3rd patterned mask layer has one the 5th groove.
20. the method that in substrate, forms groove as claimed in claim 19, form the 3rd patterned mask layer after, also comprise: take the 3rd patterned mask layer as mask, this substrate that is exposed to remove the 5th groove.
21. the method that in substrate, forms groove as claimed in claim 19, form the 3rd patterned mask layer after, also comprise:
This sidewall at the 5th groove forms one the 5th clearance wall, to form one the 6th groove in the 5th groove.
22. the method that forms groove in substrate as claimed in claim 21 also comprises and removes this substrate that the 6th groove exposes.
23. the method that forms groove in substrate as claimed in claim 21 also comprises:
Remove the 3rd patterned mask layer; And
Come the etching substrate take the 5th clearance wall as mask.
24. the method that forms groove in substrate as claimed in claim 19 wherein has etching selectivity between the 3rd patterned mask layer and this first patterned mask layer and this second patterned mask layer.
25. the method that forms groove in substrate as claimed in claim 14 wherein comprises in the step that this sidewall of this first groove forms this material layer:
Form a material layer on this substrate, this material layer conformally forms along a bottom surface and at least one sidewall of this first groove comprehensively; And
Remove this material layer of part, and only keep this material layer on this sidewall that is positioned at this first groove.
26. the method that forms groove in substrate as claimed in claim 14, wherein this first patterned mask layer is identical with the material of this second patterned mask layer.
CN2012100930603A 2012-03-31 2012-03-31 Method for forming groove in substrate Pending CN103367224A (en)

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CN104952923A (en) * 2014-03-28 2015-09-30 世界先进积体电路股份有限公司 Semiconductor device and manufacturing method thereof
US9978861B2 (en) 2014-04-09 2018-05-22 Vanguard International Semiconductor Corporation Semiconductor device having gate in trenches
CN108257910A (en) * 2016-12-29 2018-07-06 联华电子股份有限公司 Method for manufacturing shallow trench isolation trench
CN108735585A (en) * 2017-04-17 2018-11-02 联华电子股份有限公司 Method for manufacturing mask pattern

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CN1188327A (en) * 1996-11-13 1998-07-22 世界先进积体电路股份有限公司 Method of Forming Contact Window
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CN104952923A (en) * 2014-03-28 2015-09-30 世界先进积体电路股份有限公司 Semiconductor device and manufacturing method thereof
US9978861B2 (en) 2014-04-09 2018-05-22 Vanguard International Semiconductor Corporation Semiconductor device having gate in trenches
CN108257910A (en) * 2016-12-29 2018-07-06 联华电子股份有限公司 Method for manufacturing shallow trench isolation trench
CN108257910B (en) * 2016-12-29 2019-08-06 联华电子股份有限公司 Method for fabricating shallow trench isolation trenches
CN108735585A (en) * 2017-04-17 2018-11-02 联华电子股份有限公司 Method for manufacturing mask pattern
CN108735585B (en) * 2017-04-17 2019-06-28 联华电子股份有限公司 Method for manufacturing mask pattern

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Application publication date: 20131023