CN103365330A - Reference voltage/current generator - Google Patents

Abstract

A reference voltage/current generating device, comprising: a temperature independent voltage source generating a first current having a positive temperature coefficient and a reference voltage having a zero temperature coefficient; a mirror unit coupled to the temperature-independent voltage source for obtaining a second current with a positive temperature coefficient according to the first current mirror, and generating a junction voltage with a negative temperature coefficient according to the second current; a voltage-to-current unit coupled to the mirror unit for converting the junction voltage to obtain a third current with the negative temperature coefficient; and a current synthesis unit coupled to the mirror unit for mirroring the second current to obtain a fourth current, coupled to the voltage-to-current unit for mirroring the third current to obtain a fifth current, and synthesizing the fourth current and the fifth current into a reference current with a zero temperature coefficient.

Description

Reference voltage/current generator

technical field

The invention relates to a reference voltage/current generating device, in particular to a reference voltage/current generating device capable of simultaneously generating temperature-independent reference voltage and reference current.

Background technique

In today's era of rapid technological development, temperature-independent power supply circuits have been developed to provide power for various load circuits with temperature-sensitive characteristics. Generally speaking, the existing temperature-independent power supply circuit uses a plurality of subunits with different temperature characteristics, for example, a subunit that can provide an electrical signal with a positive temperature coefficient and a subunit that can provide an electrical signal with a negative temperature coefficient; and The positive temperature coefficient electrical signal and the negative temperature coefficient electrical signal are summed to provide a reference electrical signal that is substantially independent of temperature changes. However, how to design a more convenient temperature-independent power supply circuit to provide a more ideal temperature-independent electrical signal for the relevant load circuit with temperature-sensitive characteristics is one of the directions that the industry is constantly working on.

Contents of the invention

This disclosure proposes a reference voltage/current generating device, which has the advantage of high noise immunity. The temperature-independent voltage source in this reference voltage/current generating device can use an N-channel MOS transistor operating in the saturation region as a current bias transistor, and its bias current is less likely to change due to supply voltage disturbances, so the reference voltage/current The generating device can generate a relatively stable reference voltage.

According to a first aspect of the present disclosure, a reference voltage/current generating device is provided, including a temperature-independent voltage source, a mirror unit, a voltage-to-current unit, and a current synthesis unit. The temperature independent voltage source generates a first current with a positive temperature coefficient and a reference voltage with a zero temperature coefficient according to the junction pressure difference with a negative temperature coefficient. The mirroring unit is coupled to a temperature-independent voltage source, mirrors the first current to obtain a second current with a positive temperature coefficient, and generates a junction voltage with a negative temperature coefficient according to the second current. The voltage-to-current unit is coupled to the mirror unit, and converts the junction voltage to obtain a third current with a negative temperature coefficient. The current combining unit is coupled to the mirroring unit to mirror the second current to obtain a fourth current, and is coupled to the voltage-to-current unit to mirror the third current to obtain a fifth current, and synthesizes the fourth current and the fifth current into Reference current with zero temperature coefficient.

In order to have a better understanding of the above-mentioned and other aspects of the present invention, the preferred embodiments are specifically cited below, together with the accompanying drawings, and are described in detail as follows:

Description of drawings

FIG. 1 is a circuit diagram of a reference voltage/current generating device according to an embodiment of the present invention.

FIG. 2 is another circuit diagram of a reference voltage/current generating device according to an embodiment of the present invention.

FIG. 3 is another circuit diagram of a reference voltage/current generating device according to an embodiment of the present invention.

[Description of main component symbols]

1, 2, 4: Reference voltage/current generating device

100, 120, 140: temperature independent voltage source

101, 121, 141: operational amplifiers

102, 122, 142: band gap reference circuit

M1: Bias Metal-Oxide-Semiconductor Transistor

A, B, No: nodes

R1-R3: Resistors

Q1, Q2: junction transistors

200, 220, 240: mirror unit

M2: mirror metal oxide semiconductor transistor

R4: Resistor

D: node

Q3: junction transistor

300, 320, 340: voltage to current unit

301, 321, 341: operational amplifiers

R5: Resistor R5

C: node

M7: Bias Metal-Oxide-Semiconductor Transistor

400, 420, 440: current synthesis unit

401, 402, 421, 422, 441, 442: Mirror unit

E: synthesis node

M3-M6: Transistors

Q1', Q2': Junction transistors

Q1", Q2": Junction transistors

Detailed ways

In the exemplary embodiment of the present invention, the reference voltage/current generating device has the advantage of high noise immunity. In some embodiments, the temperature-independent voltage source in the reference voltage/current generating device uses an N-channel MOS transistor operating in the saturation region as a current bias transistor, and its bias current is less likely to follow fluctuations due to supply voltage disturbances, so The reference voltage/current generating device can generate a relatively stable reference voltage. In order to understand the present invention more clearly, at least one exemplary embodiment will be described in detail below with reference to the accompanying drawings. In addition, the connection terms mentioned in the following embodiments, such as: coupling or connection, etc., are only used for illustration with reference to the attached drawings, and are not used to limit the fact that the connection relationship between two elements is direct coupling. or indirect coupling.

Please refer to FIG. 1 , which shows a circuit diagram of a reference voltage/current generating device according to an embodiment of the present invention. The reference voltage/current generating device 1 of this embodiment includes a temperature-independent voltage source 100, a mirroring unit 200, a voltage-to-current unit 300, and a current synthesis unit 400, wherein the temperature-independent voltage source 100 is coupled to the mirroring unit 200; The unit 200 is coupled to the voltage-to-current unit 300 and the current synthesis unit 400 ; the voltage-to-current unit 300 is further coupled to the current synthesis unit 400 .

The temperature independent voltage source 100 generates a current I1 with a positive temperature coefficient P and a reference voltage Vref with a zero temperature coefficient according to a junction voltage difference V _BE with a negative temperature coefficient N. For example, the temperature independent voltage source 100 includes an operational amplifier 101 , a bias metal oxide semiconductor transistor M1 and a bandgap reference circuit 102 . The bandgap reference circuit 102 includes nodes A, B, No, resistors R1-R3, and junction transistors Q1 and Q2, wherein resistors R2 and R3 are respectively coupled between nodes B and No and between nodes A and No; Transistors Q1 and Q2 are, for example, PNP bipolar junction transistors (Bipolar Junction Transistor, BJT), the emitters of which are respectively coupled to node A and respectively coupled to node B via resistor R1, and the base and collector receive ground voltage GND.

The operational amplifier 101 has a positive input terminal, a negative input terminal and an output terminal, wherein the positive and negative input terminals are coupled to nodes A and B respectively. The gate of the bias metal-oxide-semiconductor transistor 101 is coupled to the output terminal of the operational amplifier 101 to generate a current I1 in response to a voltage level Vb at the output terminal of the operational amplifier 101 .

Preferably, the bias metal-oxide-semiconductor transistor 101 is an N-channel metal-oxide-semiconductor transistor, its drain receives the power supply voltage VDD, and its source is coupled to the node No. Accordingly, even when the power supply voltage VDD is unstable due to noise or other unfavorable factors, the level fluctuation of the power supply voltage VDD will only cause the drain level of the bias metal-oxide-semiconductor transistor 101 to change correspondingly. fluctuate without affecting the gate and source levels of the bias metal-oxide-semiconductor transistor 101 . In addition, for a metal-oxide-semiconductor transistor operating in the saturation region, the magnitude of its drain current is mainly related to its gate-source voltage difference, but not substantially related to its drain voltage. Accordingly, using an N-channel MOS transistor to implement the bias voltage MOS transistor 101 in the temperature-independent voltage source 100 can make the temperature-independent voltage source 100 of this embodiment have a substantially higher power supply voltage VDD. Noise immunity, and the temperature independent voltage source 100 can effectively provide a stable current I1 even when the level of the power supply voltage VDD is unstable.

The bandgap reference circuit 102 is coupled to the positive input terminal, the negative output terminal of the operational amplifier 101 and the source of the bias metal-oxide-semiconductor transistor M1 via nodes A, B and No, respectively. The bandgap reference circuit 102 generates a junction voltage difference V _BE , and obtains a reference voltage Vref according to the current I1 and the junction voltage difference V _BE .

Further, the junction voltage difference V _BE is, for example, the difference between the base-source voltage V _BE1 of the junction transistor Q1 and the base-source voltage V _BE2 of the junction transistor Q2, which can be expressed by the following equation:

${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; BE</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; BE</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="V\; BE"\; filenames="HDA0000151355410000021.png"\; state="\{\{state\}\}">V</figure-callout></span><figure-callout\; id="2"\; label="V\; BE"\; filenames="HDA0000151355410000021.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; KT</span>}}{\mathrm{<span\; class="notranslate">\; q</span>}}\mathrm{<span\; class="notranslate">\; ln</span>}<span\; class="notranslate">\; (</span>\frac{{\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; Q</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}}{{\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; S</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span>\frac{\mathrm{<span\; class="notranslate">\; KT</span>}}{\mathrm{<span\; class="notranslate">\; q</span>}}\mathrm{<span\; class="notranslate">\; ln</span>}<span\; class="notranslate">\; (</span>\frac{{\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; Q</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}}{{\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; S</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}}<span\; class="notranslate">\; )</span>$

Among them, K, T and q are Boltzmann constant (Boltzmann Constant), absolute temperature value and unit charge constant; I _S1 and I _S2 are the saturation current values of junction transistors Q1 and Q2 respectively; I _Q1 and I _Q2 are respectively is the emitter current flowing through the junction transistors Q1 and Q2.

Assuming that the ratio of the saturation currents I _S2 and I _S1 of the junction transistors Q2 and Q1 is M:1, and the emitter currents I _Q1 and I _Q2 are substantially equal, the derivation can be carried out according to the above equations, and the emitter currents can be expressed by the following equations respectively: Pole current I _Q1 , I _Q2 and reference voltage Vref:

${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; BE</span>}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; KT</span>}}{\mathrm{<span\; class="notranslate">\; q</span>}}\mathrm{<span\; class="notranslate">\; ln</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; m</span>}<span\; class="notranslate">\; \&times;</span>\frac{{\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; Q</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}}{{\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; Q</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; KT</span>}}{\mathrm{<span\; class="notranslate">\; q</span>}}\mathrm{<span\; class="notranslate">\; ln</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; m</span>}<span\; class="notranslate">\; )</span>$

${\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="I\; Q"\; filenames="HDA0000151355410000021.png"\; state="\{\{state\}\}">I</figure-callout></span><figure-callout\; id="2"\; label="I\; Q"\; filenames="HDA0000151355410000021.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; BE</span>}}}{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="R"\; filenames="HDA0000151355410000021.png"\; state="\{\{state\}\}">R</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="KT\; R"\; filenames="HDA0000151355410000021.png"\; state="\{\{state\}\}">KT</figure-callout></span><figure-callout\; id="2"\; label="KT\; R"\; filenames="HDA0000151355410000021.png"\; state="\{\{state\}\}">\; </figure-callout>}}{\mathrm{<span\; class="notranslate">\; </span>}}\mathrm{<span\; class="notranslate">\; ln</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; m</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="I\; Q"\; filenames="HDA0000151355410000011.png"\; state="\{\{state\}\}">I</figure-callout></span><figure-callout\; id="1"\; label="I\; Q"\; filenames="HDA0000151355410000011.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}$

$\mathrm{<span\; class="notranslate">\; Vref</span>}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; BE</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; \&times;</span>{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="I\; Q"\; filenames="HDA0000151355410000011.png"\; state="\{\{state\}\}">I</figure-callout></span><figure-callout\; id="1"\; label="I\; Q"\; filenames="HDA0000151355410000011.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; BE</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; +</span>\frac{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}}{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="R"\; filenames="HDA0000151355410000021.png"\; state="\{\{state\}\}">R</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 2</span>}}\frac{\mathrm{<span\; class="notranslate">\; KT</span>}}{\mathrm{<span\; class="notranslate">\; q</span>}}\mathrm{<span\; class="notranslate">\; ln</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; m</span>}<span\; class="notranslate">\; )</span>$

where M is a positive real number. For the reference voltage Vref, the first term and the second term on the right side of the equation correspond to the negative temperature coefficient N and the positive temperature coefficient P, respectively. Accordingly, by adjusting the ratio of the first term and the second term in the reference voltage Vref equation, the corresponding negative temperature coefficient N and positive temperature coefficient P can cancel each other out, so that the reference voltage Vref has a temperature coefficient substantially equal to zero.

The mirror unit 200 mirrors the current I1 to obtain a current I2 with a positive temperature coefficient P, and generates a junction voltage V _BE3 with a negative temperature coefficient N according to the current I2. The mirroring unit 200 includes, for example, a mirroring metal oxide semiconductor transistor M2, a resistor R4, a node D and a junction transistor Q3, wherein the source of the mirroring metal oxide semiconductor transistor M2 is coupled to one end of the resistor R4, and the other end of the resistor R4 One terminal is coupled to the node D; the emitter of the junction transistor Q3 is coupled to the node D.

The gate of the mirrored MOS transistor M2 is coupled to the gate of the biased MOS transistor M1 such that both the gates of the mirrored MOS transistor M2 and the biased MOS transistor M1 receive the operational amplifier The voltage level Vb provided by the output terminal of 101 mirrors the current I1 to obtain the current I2. After the current I2 is determined, the magnitude of the junction voltage V _BE3 of the junction transistor Q3 is determined. In other words, the junction transistor Q3 generates the junction voltage V _BE3 according to the current I2. It should be noted that, in a preferred embodiment, the mirroring MOS transistor M2, the resistor R4 and the junction transistor Q3 in the mirroring unit 200 can be arranged with the bias voltage MOS in the temperature independent voltage source 100 The transistor M1, the resistor R3 and the junction transistor Q1 have corresponding structures, and each corresponding device has substantially the same device characteristics. In other words, the bias MOS transistor M1 and the mirror MOS transistor M2 , the resistors R4 and R3 , and the junction transistors Q3 and Q1 are substantially the same circuit elements. Accordingly, by applying substantially the same voltage level Vb to the bias MOS transistor M1 and the mirror MOS transistor M2, a current I2 ( substantially equal to the current I1) and the junction voltage V _BE3 with a negative temperature coefficient N (substantially equal to the junction voltage V _BE1 ). In other words, the mirror unit 200 not only mirrors the current I1, but also mirrors the junction voltage V _BE1 .

The voltage-to-current unit 300 converts the junction voltage V _BE3 to obtain a current I3 with a negative temperature coefficient N. For example, the voltage-to-current conversion unit 300 includes an operational amplifier 301, a resistor R5, a node C, and a bias metal-oxide-semiconductor transistor M7. The positive input terminal, the negative input terminal and the output terminal of the operational amplifier 301 are respectively coupled to the node D and the node C of the mirror circuit 200 and are coupled to the gate of the bias metal oxide semiconductor transistor M7; The source of the material semiconductor transistor M7 is coupled to the node C; the two ends of the resistor R5 are respectively coupled to the node C and receive the ground voltage GND.

The operational amplifier 301 virtually shorts the nodes C and D, so that the node C and the junction voltage V _BE3 have substantially the same level. Accordingly, the resistor R5 generates a current I3 with a negative temperature coefficient N in response to the junction voltage V _BE3 applied across it.

The current synthesizing unit 400 mirrors the current I2 to obtain the current I _PTAT , and mirrors the current I3 to obtain the current I _CTAT , and synthesizes the currents I _PTAT and I _CTAT into a reference current Iref with zero temperature coefficient. The current synthesis unit 400 includes current mirror units 401 and 402 and a synthesis node E. The current mirror unit 401 is coupled between the mirror unit 200 and the synthesizing node E, and obtains the current I _PTAT by mirroring the current I2 . For example, the current mirror unit 401 includes transistors M4 and M3, the sources of which receive the power supply voltage VDD, the gates are coupled to each other, and the drains are respectively coupled to the synthesis node E and the mirror metal oxide semiconductor transistor M2 the drain.

The current mirror unit 402 is coupled between the voltage-to-current unit 300 and the synthesis node E, and obtains the current I _CTAT by mirroring the current I3 . For example, the current mirror unit 402 includes transistors M6 and M5, the sources of which receive the power supply voltage VDD, the gates are coupled to each other, and the drains are respectively coupled to the synthesis node E and the bias metal-oxide-semiconductor transistor M7 the drain.

In summary, the reference voltage/current generating device 1 of the present embodiment can simultaneously provide the reference current Iref and the reference voltage Vref with substantially zero temperature coefficient.

In this embodiment, although the reference voltage/current generating device 1 has the circuit structure shown in FIG. 1 as an example for illustration, however, the reference voltage/electric therapy generating device 1 of this embodiment is not limited to this . In other examples, the positive input terminal of the operational amplifier 301 in the voltage-to-current unit 300 can also be coupled to the node A of the temperature-independent voltage source 100, so that the node C correspondingly has a junction voltage through the virtual short circuit effect V _BE1 .

In another example, the junction transistors Q1 ′ to Q3 ′ in the temperature-independent voltage source 120 and the mirror unit 220 can also be realized by NPN BJT, as shown in FIG. 2 . In another example, the coupling relationship between the temperature-independent voltage source 140 and the junction transistors Q1 ″ to Q3 ″ in the mirror unit 240 may also have the structure shown in FIG. 3 .

The reference voltage/current generating device of this embodiment uses a temperature-independent voltage source to provide the first current with a positive temperature coefficient, the junction voltage difference with a negative temperature coefficient, and the reference voltage with a zero temperature coefficient. The reference voltage/current generating device of this embodiment also uses a mirroring unit to mirror the first current and the junction voltage difference to obtain the second current with the positive temperature coefficient and the junction voltage with the negative temperature coefficient accordingly, and apply The voltage-to-current unit obtains the third current with the negative temperature coefficient according to the junction voltage. The reference voltage/current generating device of this embodiment also employs a current synthesis unit to obtain the fourth current with the positive temperature coefficient and the fifth current with the negative temperature coefficient according to the second current and the third current respectively by mirroring. , and synthesized accordingly to obtain a reference current with substantially zero temperature coefficient. Accordingly, compared with conventional reference voltage or reference current devices, the reference voltage/current generating device of this embodiment can simultaneously provide the advantages of a reference voltage and a reference current with substantially zero temperature coefficient.

In addition, in the temperature-independent voltage source of the reference voltage/current generating device of this embodiment, an N-channel MOS transistor is used as a current bias transistor, wherein the N-channel MOS transistor receives the supply voltage VDD through its drain. Accordingly, even if the level of the power supply voltage VDD is unstable due to noise or other unfavorable factors, its level fluctuation will only correspondingly cause the drain level of the bias metal-oxide-semiconductor transistor to fluctuate, and The gate and source levels of the bias metal-oxide-semiconductor transistor 101 and its bias current will not be affected. Accordingly, compared with conventional reference voltage or reference current generating devices, the reference voltage/current generating device in some embodiments of the present invention has the advantage of higher noise resistance.

In summary, although the present invention has been disclosed as above with preferred embodiments, it is not intended to limit the present invention. Those skilled in the art may make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be defined by the appended claims.

Claims (9)

1. reference voltage/current generation device comprises:

One temperature independent voltage source, according to the junction pressure reduction with a negative temperature coefficient, generation has one first electric current of a positive temperature coefficient (PTC) and the reference voltage with a zero-temperature coefficient;

One mirror unit is coupled to this temperature independent voltage source, one second electric current that this mirror unit obtains having this positive temperature coefficient (PTC) according to this first electric current mirror, and produce the junction voltage with this negative temperature coefficient according to this second electric current;

One voltage turns current unit, is coupled to this mirror unit, and this junction voltage transitions is obtained having one the 3rd electric current of this negative temperature coefficient; And

One electric current synthesis unit, be coupled to this mirror unit and obtain one the 4th electric current with this second electric current of mirror, and be coupled to this voltage and turn current unit and obtain one the 5th electric current with mirror the 3rd electric current, and the 4th electric current and the 5th electric current are synthesized the reference current with a zero-temperature coefficient.

2. reference voltage/current generation device as claimed in claim 1, wherein this temperature independent voltage source comprises:

One operational amplifier has first and second input end, and an output terminal;

One first bias voltage metal oxide semiconductor transistor, it has a grid and is coupled to this output terminal, produces this first electric current with the voltage level in response to this output terminal; And;

One bandgap reference circuit is coupled to a source/drain electrode of this first and second input end and this first bias voltage metal oxide semiconductor transistor, in order to producing this junction pressure reduction, and obtains this reference voltage according to this first electric current and this junction pressure reduction.

3. voltage/current source apparatus as claimed in claim 2, wherein this bandgap reference circuit comprises:

A plurality of junction transistors provide respectively a plurality of base-emitter voltages poor, use to produce this junction pressure reduction; And

A plurality of resistance are coupled to this first and second input end, this first bias voltage metal oxide semiconductor transistor and these junction transistors, to obtain this reference voltage according to this first electric current and this junction pressure reduction.

4. voltage/current source apparatus as claimed in claim 2 wherein is a N-type metal oxide semiconductor transistor.

5. voltage/current source apparatus as claimed in claim 2, wherein this mirror unit comprises:

One mirror metal oxide semiconductor transistor, it has this grid that a grid is coupled to this first bias voltage metal oxide semiconductor transistor, receiving the bias voltage of this grid, and this first electric current mirror is obtained this second electric current; And

One junction transistor is coupled to a source/drain electrode of this mirror metal oxide semiconductor transistor, to produce this junction voltage according to this second electric current.

6. voltage/current source apparatus as claimed in claim 5, wherein this first bias voltage metal oxide semiconductor transistor and this mirror metal oxide semiconductor transistor are all a N-type metal oxide semiconductor transistor.

7. voltage/current source apparatus as claimed in claim 1, wherein this mirror unit comprises:

One mirror metal semitransistor, it has a grid and is coupled to this temperature independent voltage source, to receive the bias voltage in this temperature independent voltage source, this first electric current mirror is obtained this second electric current; And

One junction transistor is coupled to this mirror metal oxide semiconductor transistor, to produce this junction voltage according to this second electric current.

8. voltage/current source apparatus as claimed in claim 1, wherein this electric current and voltage converting unit comprises:

One operational amplifier, it has this junction voltage that a first input end is coupled to this mirror circuit, and one second input end and an output terminal;

One resistance is coupled between this second input end and the voltage source current potential;

One second bias voltage metal oxide semiconductor transistor, it has this output terminal that a grid is coupled to this operational amplifier, and one first source/drain electrode is coupled to this this second input end, and one second source/drain electrode is coupled to the electric current synthesis unit.

9. voltage/current source apparatus as claimed in claim 1, wherein this electric current synthesis unit comprises:

One first current lens unit is coupled between this mirror unit and the synthetic node, obtains the 4th electric current with this second electric current of mirror; And

One second current lens unit is coupled to this voltage and turns between current unit and this synthetic node, obtains the 5th electric current with mirror the 3rd electric current,

Wherein the 4th electric current and the 5th electric current synthesize this reference current in this synthetic node.

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