CN103346223B - A kind of epitaxial wafer of light emitting diode - Google Patents

Abstract

The invention discloses an epitaxial wafer of a light emitting diode, which belongs to the technical field of semiconductors. The epitaxial wafer includes: a substrate, and a buffer layer, an n-type layer, a multi-quantum well layer, and a p-type layer sequentially stacked on the substrate, and the epitaxial wafer also includes a layer between the n-type layer and the p-type layer. The stress release layer between the multiple quantum well layers, the stress release layer is a multi-period structure, each period includes an In _x Ga _1-x N layer and GaN grown on the In _x Ga _1-x N layer layer, the thickness of the In _x Ga _1-x N layer in each periodic structure of the stress release layer increases from bottom to top. The present invention arranges a stress release layer between the n-type layer and the multi-quantum well layer, the stress release layer is a multi-period structure, and the thickness of the In _x Ga _1-x N layer in each periodic structure of the stress release layer is from bottom to top Incrementally, the stress accumulated between the substrate and the n-type layer can be gradually released, improving the luminous efficiency of the epitaxial wafer.

Description

Epitaxial wafer of a light emitting diode

technical field

The invention relates to the technical field of semiconductors, in particular to an epitaxial wafer of a light emitting diode.

Background technique

As a highly influential new product in the emerging industry of information optoelectronics, light-emitting diodes have the characteristics of small size, long service life, colorful colors, and low energy consumption. They are widely used in lighting, display screens, signal lights, backlights, toys and other fields. . Wherein, the light emitting diode generally includes an epitaxial wafer and electrodes disposed on the epitaxial wafer.

The epitaxial wafer generally includes a substrate, and a buffer layer, an n-type layer, a multi-quantum well layer and a p-type layer stacked on the substrate in sequence. Due to the lattice mismatch between the n-type layer and the multi-quantum well layer, the crystal quality of the epitaxial wafer is poor, and leakage current is easy to form. In order to overcome this defect, it is generally grown between the n-type layer and the multi-quantum well layer An InGaN layer is used to reduce the lattice mismatch between the n-type layer and the multi-quantum well layer.

In the process of realizing the present invention, the inventor finds that there are at least the following problems in the prior art:

In the existing epitaxial wafer, an InGaN layer is grown between the n-type layer and the multi-quantum well layer. The InGaN layer cannot effectively release the stress accumulated between the n-type layer and the substrate, which affects the quality and luminous efficiency of the epitaxial wafer.

Contents of the invention

In order to solve the problems in the prior art, an embodiment of the present invention provides an epitaxial wafer of a light emitting diode. Described technical scheme is as follows:

An embodiment of the present invention provides an epitaxial wafer of a light emitting diode, and the epitaxial wafer includes:

A substrate, and a buffer layer, an n-type layer, a multi-quantum well layer, and a p-type layer sequentially stacked on the substrate, and the epitaxial wafer also includes a The stress release layer between, the stress release layer is a multi-period structure, each period includes an In _x Ga _1-x N layer and a GaN layer grown on the In _x Ga _1-x N layer, the stress release The thickness of the In _x Ga _1-x N layer in each periodic structure of the layer increases from bottom to top;

The In _x Ga _1-x N layer of at least one periodic structure in the multi-periodic structure is a multi-layer structure;

The multi-layer structure includes a first sublayer and a second sublayer disposed on the first sublayer, and both the first sublayer and the second sublayer include several In _x Ga _1-x N layer, and the In content in each In _x Ga _1-x N layer of the first sublayer increases from bottom to top, and the In content in each In _x Ga ₁ -x N layer of the second sublayer decreases from bottom to top or, the multilayer structure includes a third sublayer, and a fourth sublayer and a fifth sublayer sequentially laminated on the third sublayer, the third sublayer, the fourth sublayer and the Each of the fifth sublayers includes several In _x Ga _1-x N layers, and the In content of each In _x Ga _1-x N layer in the third sublayer increases from bottom to top, and the fourth sublayer The In content of each In _x Ga _{1-x N} layer in the fifth sublayer remains constant from bottom to top, and the In content of each In _x Ga 1-x N layer in the fifth sublayer decreases from bottom to top; wherein, from bottom to top is, the direction from the In _x Ga _1-x N layer in contact with the n-type layer to the In _x Ga _1-x N layer closest to the multiple quantum well layer.

Preferably, the In content of the In _x Ga _1-x N layer in each periodic structure of the stress release layer increases from bottom to top.

Further, in the In _x Ga _1-x N layer, the value of x ranges from 0.03 to 0.1.

Preferably, the GaN layer in each periodic structure in the stress release layer is doped with Si.

Further, the Si doping concentration of the GaN layer in each periodic structure in the stress release layer decreases gradually from bottom to top.

Optionally, the multi-quantum well layer is a superlattice structure, and the superlattice structure is formed by overlapping In _a Ga _1-a N layers and GaN layers, and each periodic structure of the stress release layer The In content in the In _x Ga _1-x N layer is lower than the In content in the In _a Ga _1-a N layer.

Optionally, the p-type layer includes a p-type electron blocking layer and a p-type GaN contact layer sequentially stacked on the multiple quantum wells.

The beneficial effects brought by the technical solution provided by the embodiments of the present invention are:

By setting the stress release layer between the n-type layer and the multi-quantum well layer, the stress release layer has a multi-period structure, and the thickness of the InxGa1 _{-xN layer} in each periodic structure of the stress release layer increases from bottom to top, The stress accumulated between the substrate and the n-type layer can be gradually released, and the luminous efficiency of the epitaxial wafer is improved.

Description of drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings that need to be used in the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present invention. For those skilled in the art, other drawings can also be obtained based on these drawings without creative effort.

FIG. 1 is a schematic structural view of an epitaxial wafer provided by an embodiment of the present invention;

Fig. 2 is a schematic diagram of the conduction band of the stress release layer provided by the embodiment of the present invention;

Fig. 3 is a schematic diagram of the conduction band of the stress release layer provided by the embodiment of the present invention;

Fig. 4 is a schematic diagram of the conduction band of the InxGa1 _{- xN} layer provided by the embodiment of the present invention;

Fig. 5 is a schematic diagram of the conduction band of the InxGa1 _{- xN} layer provided by the embodiment of the present invention;

6 is a schematic diagram of the conduction band of the stress release layer provided by the embodiment of the present invention;

Fig. 7 is a schematic diagram of the conduction band of the stress release layer provided by the embodiment of the present invention;

Fig. 8 is a schematic diagram of the conduction band of the stress release layer provided by the embodiment of the present invention.

detailed description

In order to make the object, technical solution and advantages of the present invention clearer, the implementation manner of the present invention will be further described in detail below in conjunction with the accompanying drawings.

Example

An embodiment of the present invention provides an epitaxial wafer of a light emitting diode. As shown in FIG. , multi-quantum well layer 15 and p-type layer 16, the stress release layer 14 is a multi-period structure, and each period includes an In _x Ga _1-x N layer 141 and a GaN layer grown on the In _x Ga _1-x N layer 141 142 , the thickness of the In _x Ga _1-x N layer 141 in each periodic structure of the stress release layer 14 increases from bottom to top, see FIG. 2 for details.

It should be noted that "bottom" in "bottom to top" refers to the In _x Ga _1-x N layer in contact with the n-type layer 13, and "upper" refers to the In _x Ga ₁ layer closest to the multi-quantum well layer 15. _-x N layers.

Preferably, as shown in the conduction band schematic diagram of FIG. 3 , the In content of the In _x Ga _1-x N layer 141 in each periodic structure of the stress release layer 14 increases from bottom to top. By increasing the In content and the thickness of the In _x Ga _1-x N layer 141 in each periodic structure of the stress release layer 14 from bottom to top, the stress accumulated between the substrate and the n-type layer can be gradually released. The stress release layer is composed of In _x Ga _1-x N layer and GaN layer, and the lattice mismatch between it and the n-type layer is almost negligible, which improves the antistatic ability and quality of the epitaxial wafer. And because InGaN is a low-resistance material, as the thickness increases, the current can expand better under the action of high current, which is conducive to the deceleration of electrons, increases the recombination rate of electrons and holes, and further increases the luminous efficiency of epitaxial wafers. .

Further, in the In _x Ga _1-x N layer 141, the value of x ranges from 0.03 to 0.1. By setting the value range of x as 0.03-0.1, the stress can be released better and the effect of stress release can be improved. When the constituent materials of the stress release layer are the same, the In content of the In _x Ga _1-x N layer in each periodic structure increases from bottom to top, and when the value of x ranges from 0.03 to 0.1, the In _x Ga 1-x N layer in each periodic structure The thickness of the _1-x N layer 141 increases from bottom to top, and its luminous efficiency can be increased by 6% to 8% compared with the case of constant thickness.

Preferably, the GaN layer 142 in each periodic structure of the stress release layer 14 is doped with Si respectively. The Si-doped GaN layer can block electrons, reduce the speed of electrons, and allow more electrons to transition into the multi-quantum well layer, increasing the recombination rate of electrons and holes.

Further, in this embodiment, the Si doping concentration of the GaN layer 142 in each periodic structure of the stress release layer 14 decreases gradually from bottom to top. In other embodiments, the doping concentration of Si in the Si-doped GaN layer may also remain unchanged. As the doping concentration of Si decreases from bottom to top, electrons can be better blocked under the action of a large current, and more electrons can be confined in the multi-quantum well layer 15, further improving the recombination rate of electrons and holes .

Further, the In _x Ga _1-x N layer 141 of at least one periodic structure in the multi-periodic structure is a multi-layer structure. Obviously, in this embodiment, the In _x Ga _1-x N layer 141 of each periodic structure may also be a single-layer structure.

Optionally, all the In _x Ga _1-x N layers 141 in the multi-period structure are multi-layer structures.

Preferably, in this embodiment, the multilayer structure may include a first sublayer and a second sublayer disposed on the first sublayer, each of the first sublayer and the second sublayer includes several In _x Ga _{1 -x} N layer, and the In content in each In _x Ga _1-x N layer of the first sublayer increases from bottom to top, and the In content in each In _x Ga ₁ -x N layer of the second sublayer decreases from bottom to top. When the In _x Ga _1-x N layer 141 includes the first sublayer and the second sublayer, its conduction band structure is as shown in FIG. 4 . By including the In _x Ga _1-x N layer 141 including the first sublayer and the second sublayer, the In _x Ga _1-x N in the conduction band structure can reduce the polarization effect in the epitaxial wafer, and reduce the contact between the substrate 11 and the The lattice mismatch between the n-type layers 13 is beneficial to the growth of the multi-quantum well layer 15 and improves the quality of the epitaxial wafer.

Preferably, in this embodiment, the multilayer structure may also include a third sublayer, a fourth sublayer and a fifth sublayer sequentially stacked on the third sublayer, the third sublayer, the fourth sublayer and the fifth sublayer include several In _x Ga _1-x N layers, and the In content of each In _x Ga _1-x N layer in the third sublayer increases from bottom to top, and each In _x Ga 1-x N layer in the fourth sublayer The In content of the _1-x N layer remains constant from bottom to top, and the In content of each In _x Ga _1-x N layer in the fifth sublayer decreases from bottom to top. When the In _x Ga _1-x N layer 141 includes a third sublayer, a fourth sublayer and a fifth sublayer, its conduction band structure is shown in FIG. 5 . By making the InxGa1 _{- xN} layer 141 include the third sublayer, the fourth sublayer and the fifth sublayer, the InxGa1 _{-xN of} the conduction band structure can reduce the polarization effect in the epitaxial wafer, Reducing the lattice mismatch between the substrate 11 and the n-type layer 13 is beneficial to the growth of the multi-quantum well layer 15 and improves the quality of the epitaxial wafer.

For example, in this embodiment, the stress release layer 14 includes 4 periods of In _x Ga _1-x N/GaN, and the In content in each period of the In _x Ga _1-x N141 layer gradually increases from bottom to top, and the first period , the In _x Ga _1-x N141 layers in the second period and the fourth period are all multilayer structures including the third sublayer, the fourth sublayer and the fifth sublayer, and the In _x Ga _1-x of the third period The N141 layer is a multilayer structure including a first sublayer and a second sublayer, see FIG. 6 for details;

Alternatively, the stress release layer 14 includes 4 periods of In _x Ga _1-x N/GaN, and the In content in the In _x Ga _1-x N141 layer of each period increases gradually from bottom to top, the first period, the second period, the The In _x Ga _1-x N141 layers in the third period and the fourth period are all multilayer structures including the first sublayer and the second sublayer, see FIG. 7 for details.

Alternatively, the stress release layer 14 includes 4 periods of In _x Ga _1-x N/GaN, and the In content in each period of the In _x Ga _1-x N141 layer gradually increases from bottom to top, the first period, the second period, the The In _x Ga _1-x N141 layers in the third period and the fourth period are multilayer structures including the third sublayer, the fourth sublayer and the fifth sublayer, see FIG. 8 for details.

Optionally, in this embodiment, the n-type layer 13 may include an undoped GaN layer 131 and an n-type contact layer 132 sequentially stacked on the buffer layer 12 .

Optionally, the multi-quantum well layer 15 is a superlattice structure, and the superlattice structure is formed by overlapping In _a Ga _1-a N layers and GaN layers, and the In _x Ga in each periodic structure of the stress release layer 14 The In content of the _1-x N layer 141 is lower than that of the In _a Ga _1-a N layer.

Optionally, in this embodiment, the p-type layer 16 may include a p-type electron blocking layer 161 and a p-type GaN contact layer 162 sequentially stacked on the multi-quantum well layer 15 . By including the p-type electron blocking layer 161 in the p-type layer 16, electrons can be effectively blocked, electron overflow can be reduced, and the recombination rate of electrons and holes can be improved.

The epitaxial wafers provided by the embodiments of the present invention, under optimal conditions, can increase their antistatic ability by 11%-14% and luminous efficiency by 10%-13% compared with the epitaxial wafers in the background art.

The beneficial effect brought by the technical solution provided by the embodiment of the present invention is: by setting the stress release layer between the n-type layer and the multi-quantum well layer, the stress release layer has a multi-period structure, and the stress release layer in each periodic structure The thickness of the In _x Ga _1-x N layer increases from bottom to top, which can gradually release the stress accumulated between the substrate and the n-type layer, and improve the luminous efficiency of the epitaxial wafer;

In addition, the stress release layer is composed of In _x Ga _1-x N layer and GaN layer, and the lattice mismatch between it and the n-type layer is almost negligible, which improves the antistatic ability and quality of the epitaxial wafer;

In addition, since InGaN is a low-resistance material, as the thickness increases, the current can expand better under the action of high current, which is conducive to the deceleration of electrons, increases the recombination rate of electrons and holes, and further increases the luminescence of epitaxial wafers. efficiency.

The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included in the protection of the present invention. within range.

Claims (7)

1. an epitaxial wafer for light emitting diode, described epitaxial wafer includes substrate and is sequentially laminated on described Cushion, n-layer, multiple quantum well layer and p-type layer on substrate, it is characterised in that described epitaxial wafer also wraps Including the stress release layer being located between described n-layer and described multiple quantum well layer, described stress release layer is many Periodic structure, each cycle includes In_xGa_1-xN shell and be grown in described In_xGa_1-xGaN layer on N shell, In in each periodic structure of described stress release layer_xGa_1-xThe thickness of N shell is incremented by from bottom to up；

The In of at least one periodic structure in described multicycle structure_xGa_1-xN shell is multiple structure；

Described multiple structure includes the first sublayer and the second sublayer being located in described first sublayer, described first Sublayer and described second sublayer all include several In_xGa_1-xN shell, and the described first each In of sublayer_xGa_1-xN shell In In content be incremented by from bottom to up, the described second each In of sublayer_xGa_1-xIn content in N shell is from bottom to up Successively decrease；Or, described multiple structure includes the 3rd sublayer and is sequentially laminated in described 3rd sublayer 4th sublayer and the 5th sublayer, if described 3rd sublayer, described 4th sublayer and described 5th sublayer all include Dry In_xGa_1-xEach In in N shell, and described 3rd sublayer_xGa_1-xThe In content of N shell is incremented by from bottom to up, Each In in described 4th sublayer_xGa_1-xThe In content of N shell keeps constant from bottom to up, in described 5th sublayer Each In_xGa_1-xThe In content of N shell successively decreases from bottom to up；

Wherein, it is from bottom to up, from the In contacted with described n-layer_xGa_1-xN shell is to closest to described volume The In of sub-well layer_xGa_1-xThe direction of N shell.

Epitaxial wafer the most according to claim 1, it is characterised in that described stress release layer each cycle ties In in structure_xGa_1-xThe In content of N shell is incremented by from bottom to up.

Epitaxial wafer the most according to claim 2, it is characterised in that described In_xGa_1-xIn N shell, x's Span is 0.03～0.1.

Epitaxial wafer the most according to claim 3, it is characterised in that described stress release layer each cycle GaN layer in structure is respectively doped with Si.

Epitaxial wafer the most according to claim 4, it is characterised in that described stress release layer each cycle ties The doping content of the Si of the GaN layer in structure is successively decreased from bottom to up.

6. according to the epitaxial wafer described in any one of claim 1 to 5, it is characterised in that described MQW Layer is superlattice structure, and described superlattice structure is by In_aGa_1-aN shell and GaN layer are mutually overlapping to be formed, and institute State the In in each periodic structure of stress release layer_xGa_1-xThe In content of N shell is below described In_aGa_1-aN shell In content.

Epitaxial wafer the most according to claim 1, it is characterised in that described p-type layer includes stacking gradually P-type electronic barrier layer on described MQW and p-type GaN contact layer.