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CN103281057A - Filtering method for input signal - Google Patents

Filtering method for input signal Download PDF

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Publication number
CN103281057A
CN103281057A CN2013101525036A CN201310152503A CN103281057A CN 103281057 A CN103281057 A CN 103281057A CN 2013101525036 A CN2013101525036 A CN 2013101525036A CN 201310152503 A CN201310152503 A CN 201310152503A CN 103281057 A CN103281057 A CN 103281057A
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CN
China
Prior art keywords
input
input signal
filtering
integer variable
pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
CN2013101525036A
Other languages
Chinese (zh)
Inventor
陈羽波
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canny Elevator Co Ltd
Original Assignee
Canny Elevator Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canny Elevator Co Ltd filed Critical Canny Elevator Co Ltd
Priority to CN2013101525036A priority Critical patent/CN103281057A/en
Publication of CN103281057A publication Critical patent/CN103281057A/en
Withdrawn legal-status Critical Current

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Abstract

The invention discloses a filtering method for an input signal. Based on a shifting register, the method specifically comprises the following steps of receiving the input signal by the shifting register, and sampling the input signal; recording the current state and the historical input state of a digital input port by an integer variable by the shifting register, putting the current input to the lowest position of the integer variable, and leftwards moving the former input state for one site; confirming the state change of the integer variable, and filtering where the lowest N sites of the integer variable is 0 or 1, wherein N is a natural number which is greater than 1; and presetting a pulse period, determining the rising edge or the falling edge of the input signal according to the integer variable, confirming the input pulse period of the current input port, and filtering out the pulse which is less than a preset pulse period value. The method disclosed by the invention is used for filtering the input twice, is safe and reliable, and is capable of setting the filtering range of the two filtering processes per se, thereby being applicable to most PCBs (printed circuit board) on elevators and escalators.

Description

A kind of filtering method of input signal
Technical field
The present invention relates to a kind of filtering method of input signal.
Background technology
Interference from signal source body or transducer all to be arranged in the various systems of industrial automation, in order accurately controlling, must to eliminate the interference in the input signal.In the environment, a series of interference can cause data distortion, fluctuation at the scene, adopt this software filtering reliability height, good stability.
Summary of the invention
Technical problem to be solved by this invention is to overcome the deficiencies in the prior art, and a kind of filtering method is provided, and in the staircase by mainboard control, can effectively reduce input and disturb the influence that elevator safety operation is caused.
The present invention specifically solves the problems of the technologies described above by the following technical solutions:
A kind of filtering method of input signal, described method specifically may further comprise the steps based on shift register:
Step (1) adopts shift register to receive input signal, and input signal is sampled;
The described shift register of step (2) is imported data with an integer variable record digital input port current data and history, and present input data is put to the lowest order of integer scalar, and the input data of back are to moving to left one;
Step (3) is determined the state variation of described integer variable, carries out the filtering processing when the minimum N position of integer variable is 0 or 1, and wherein N is the natural number more than 1;
Step (4) preestablishes the cycle of pulse, when input signal is in rising edge or trailing edge, determines the input pulse cycle of current input port, filters out less than the pulse that preestablishes the pulse period value.
As a kind of optimal technical scheme of the present invention: rising edge or the trailing edge of input signal are judged by integer variable in the described step (4).
The present invention adopts technique scheme can produce following technique effect:
Input filtering method of the present invention carries out the pulse less than set point after the cycle of filtering after the filtering with shift register, and input signal is transferred to and can provide for the voltage that CPU gathers from incoming level by last figure circuit, then by carrying out filtering.This method is only imported with integer variable record several times current and before, and current input is kept at lowest order.Determine just during value after the input of continuous several times is variation that input state changes, otherwise be considered as disturbing, finish a filtering.Whenever input be in lifting along the time, check the cycle when prepulse, the elimination cycle is finished secondary filtering less than the pulse of set point.
This method can be carried out twice filtering to input, and is safe and reliable, and can set up the filter area of twice filtering on their own, applicable to the most of pcb board on elevator, the staircase.
Description of drawings
Fig. 1 is the flow chart of the filtering method of input signal of the present invention.
Embodiment
As shown in Figure 1, the present invention relates to a kind of filtering method of input signal, described method specifically may further comprise the steps based on shift register:
Step (1) adopts shift register to receive input signal, and input signal is sampled;
The described shift register of step (2) is imported data with an integer variable record digital input port current data and history, and present input data is put to the lowest order of integer scalar, and the input data of back are to moving to left one;
Step (3) is determined the state variation of described integer variable, carries out the filtering processing when the minimum N position of integer variable is 0 or 1, and wherein N is the natural number more than 1;
Step (4) preestablishes the cycle of pulse, when input signal is in rising edge or trailing edge, determines the input pulse cycle of current input port, filters out less than the pulse that preestablishes the pulse period value.Wherein, the rising edge of input signal or trailing edge are judged by integer variable.
The concrete course of work of the present invention is as follows:
Input is sampled, result with this sampling of shift register record, Input is the sampled value (1 bit) of current input, Input_char is an integer variable, it can be the 16bit data, also may be defined as 32 bit data, current input is put into the lowest order of this integer variable, input state before is to moving to left 1.Program is as follows:
if(Input == 1)
Input_char = (Input_char << 1) + 1;
else
Input_char <<= 1;
Observe this integer variable Input_char, adopt a variable to record a digital quantity current data and continually varying historical data thereof, the data length that can record depends on the length scale of integer variable, and data structure is simplified very much.The user can utilize this variable further to carry out filtering and handle, and is 0(or 1 as the continuous several times state of this variable), namely its minimum some positions are 0(or 1), then confirm this state variation.When being 4 times as filter times, check minimum 4 of this variable, when minimum 4=0000, then this input validation is 0; Minimum 4=1111, then this input validation is 1; When minimum 4 be that data beyond 0000 or 1111 then keep former result, utilize simple statement to finish complete digital filtering like this, program is as follows:
if( (Input_char & 0x0f) == 0)
Input_result = 0;
else if( (Input_char & 0x0f) == 0x0f)
Input_result = 1;
Wherein variable Input_result is final input sample result.
By above-mentioned integer variable Input_char also can judgement place rising edge or the trailing edge of input, namely the some positions of lowest order are 1, inferior low some positions are 0, then can be judged as rising edge; Otherwise the some positions of lowest order are 0, and inferior low some positions are 1, then can be judged as trailing edge.For example the rising edge determining program is as follows:
if( (Input_char & 0x0f) == 0x03)
Input_Rising = Ture;
else
Input_Rising = Fault;
Said procedure is for 2 times that example is judged rising edge with filtering, and wherein whether variable Input_Rising is for being the judgement symbol of rising edge, and the present invention similarly just can judge rising edge or the trailing edge of digital signal with very succinct statement.
This method is only imported with integer variable record several times current and before, and current input is kept at lowest order.Determine just during value after the input of continuous several times is variation that input state changes, otherwise be considered as disturbing, finish a filtering.Whenever input be in lifting along the time, check the cycle when prepulse, the elimination cycle is finished secondary filtering less than the pulse of set point.
The present invention can be according to actual conditions, select filtered pulse whether, the border of the impulse magnitude that filters out is set.Therefore, any similar structures all belongs to the protection range of this patent.In addition, the non-creativeness that those skilled in the art carries out the technical program improves, and also belongs to the protection range of this patent.

Claims (2)

1. the filtering method of an input signal, it is characterized in that: described method specifically may further comprise the steps based on shift register:
Step (1) adopts shift register to receive input signal, and input signal is sampled;
The described shift register of step (2) is imported data with an integer variable record digital input port current data and history, and present input data is put to the lowest order of integer scalar, and the input data of back are to moving to left one;
Step (3) is determined the state variation of described integer variable, carries out the filtering processing when the minimum N position of integer variable is 0 or 1, and wherein N is the natural number more than 1;
Step (4) preestablishes the cycle of pulse, when input signal is in rising edge or trailing edge, determines the input pulse cycle of current input port, filters out less than the pulse that preestablishes the pulse period value.
2. the filtering method of a kind of input signal according to claim 1 is characterized in that: rising edge or the trailing edge of input signal are judged by integer variable in the described step (4).
CN2013101525036A 2013-04-28 2013-04-28 Filtering method for input signal Withdrawn CN103281057A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2013101525036A CN103281057A (en) 2013-04-28 2013-04-28 Filtering method for input signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2013101525036A CN103281057A (en) 2013-04-28 2013-04-28 Filtering method for input signal

Publications (1)

Publication Number Publication Date
CN103281057A true CN103281057A (en) 2013-09-04

Family

ID=49063526

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2013101525036A Withdrawn CN103281057A (en) 2013-04-28 2013-04-28 Filtering method for input signal

Country Status (1)

Country Link
CN (1) CN103281057A (en)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4087754A (en) * 1974-06-24 1978-05-02 North Electric Company Digital-to-analog converter for a communication system
US4241311A (en) * 1979-02-01 1980-12-23 Telex Computer Products, Inc. Digital majority noise filter for bi-level data reception
CN1795652A (en) * 2004-04-28 2006-06-28 三菱电机株式会社 Timing reproduction circuit and reception device
JP4362407B2 (en) * 2004-04-06 2009-11-11 パナソニック株式会社 Digital noise filter
CN102412812A (en) * 2010-09-21 2012-04-11 哈曼贝克自动系统股份有限公司 Pulse width modulator
CN102801412A (en) * 2012-09-05 2012-11-28 哈尔滨工业大学 Orthogonal signal quadruplicated frequency counting method with filter function

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4087754A (en) * 1974-06-24 1978-05-02 North Electric Company Digital-to-analog converter for a communication system
US4241311A (en) * 1979-02-01 1980-12-23 Telex Computer Products, Inc. Digital majority noise filter for bi-level data reception
JP4362407B2 (en) * 2004-04-06 2009-11-11 パナソニック株式会社 Digital noise filter
CN1795652A (en) * 2004-04-28 2006-06-28 三菱电机株式会社 Timing reproduction circuit and reception device
CN102412812A (en) * 2010-09-21 2012-04-11 哈曼贝克自动系统股份有限公司 Pulse width modulator
CN102801412A (en) * 2012-09-05 2012-11-28 哈尔滨工业大学 Orthogonal signal quadruplicated frequency counting method with filter function

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Application publication date: 20130904