CN103219733A - Scattered power generation reactive compensation device and method with harmonic suppression function - Google Patents
Scattered power generation reactive compensation device and method with harmonic suppression function Download PDFInfo
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Abstract
本发明属于电力系统自动控制技术领域,特别涉及一种有谐波抑制功能的分散式风电无功补偿装置及方法。本发明包括A-T混合无功补偿单元,集中控制单元和电源模块。A-T混合无功补偿单元包括晶闸管控制电抗器组(TCR)、有源电力滤波器(APF)和无源滤波器组。晶闸管控制电抗器组接入无源滤波器组和电网主干线之间的补偿接入点,有源电力滤波器和无源滤波器组串联构成混合有源滤波器,集中控制单元输出脉宽调制信号和触发脉冲信号分别触发APF晶体管和晶闸管控制电抗器组中的晶闸管。本发明有效抑制无源滤波器与电网发生谐振,使谐波补偿精度更高,系统响应更快,提高了无功补偿的安全性,经济实用。
The invention belongs to the technical field of electric power system automatic control, and in particular relates to a distributed wind power reactive power compensation device and method with a harmonic suppression function. The invention includes an AT hybrid reactive power compensation unit, a centralized control unit and a power supply module. The AT hybrid reactive power compensation unit includes a thyristor-controlled reactor (TCR), an active power filter (APF) and a passive filter. The thyristor-controlled reactor group is connected to the compensation access point between the passive filter group and the grid main line, the active power filter and the passive filter group are connected in series to form a hybrid active filter, and the centralized control unit outputs pulse width modulation The signal and the trigger pulse signal respectively trigger the APF transistor and the thyristors in the thyristor-controlled reactor bank. The invention effectively suppresses the resonance between the passive filter and the power grid, makes the harmonic compensation precision higher, the system responds faster, improves the safety of reactive power compensation, and is economical and practical.
Description
技术领域technical field
本发明属于电力系统自动控制技术领域,特别涉及一种有谐波抑制功能的分散式风电无功补偿装置及方法。The invention belongs to the technical field of electric power system automatic control, and in particular relates to a distributed wind power reactive power compensation device and method with a harmonic suppression function.
背景技术Background technique
目前,我国的发电方式对环境有很大的破坏,而采用分散式发电,充分利用各地丰富的“清洁能源”,对我国可持续发展将是一个极大的促进。At present, my country's power generation methods have caused great damage to the environment, and the use of decentralized power generation to make full use of the abundant "clean energy" in various places will greatly promote my country's sustainable development.
分散式发电本身可以产生大量的有功和无功,如果能够合理的应用这些能量来改善电能质量,将节省大量设备投资。但是分散式发电,特别是比较成熟的风力发电与太阳能发电,其能量来源具有随机性和瞬时性,不能产生稳定的有功和无功功率,这相当于系统中接入了一个大型随机负载,大型分散式发电单元的启动与停修也将产生较大的有功和无功波动;这些都会对电力系统的稳定产生深远影响。Distributed power generation itself can generate a large amount of active and reactive power. If these energies can be used reasonably to improve power quality, it will save a lot of equipment investment. However, distributed power generation, especially the relatively mature wind power and solar power generation, has random and instantaneous energy sources, and cannot generate stable active and reactive power. This is equivalent to connecting a large random load to the system. The start-up and shutdown of distributed power generation units will also produce large fluctuations in active and reactive power; these will have a profound impact on the stability of the power system.
解决以上问题最行之有效的措施,就是在分散式发电单元和电网接入点处进行无功补偿,保证接入点的无功稳定在一定的范围内,以减少对电网造成的无功冲击,从而充分发挥分散式电源自身的优势,提高电力系统的电能质量。The most effective measure to solve the above problems is to perform reactive power compensation at the distributed power generation unit and the grid access point to ensure that the reactive power of the access point is stable within a certain range, so as to reduce the reactive power impact on the grid , so as to give full play to the advantages of the distributed power supply itself and improve the power quality of the power system.
目前,分散式风电场无功补偿方式主要采用静止无功补偿器(SVC)和固定电容器联合的方式,但SVC中的无源滤波器存在滤波特性受电网电抗影响和容易与电网电抗发生并联谐振的固有缺陷,这会使电网电压产生波形畸变,电压波动和闪变等,会对分散式发电系统产生重大的负面影响。At present, the reactive power compensation method of distributed wind farms mainly adopts the combination of static var compensator (SVC) and fixed capacitor, but the passive filter in SVC has filtering characteristics affected by grid reactance and is prone to parallel resonance with grid reactance The inherent defects of the grid voltage will cause waveform distortion, voltage fluctuation and flicker, etc., which will have a significant negative impact on the distributed power generation system.
发明内容Contents of the invention
针对分散式发电系统无功补偿中存在无源滤波器与电网发生谐振,产生谐波的问题,本发明提供一种有谐波抑制功能的分散式发电无功补偿装置及控制方法,通过分散式发电无功补偿装置所发出的无功功率来对系统产生的谐波进行抑制。Aiming at the problem that the passive filter resonates with the grid and generates harmonics in the reactive power compensation of the distributed power generation system, the present invention provides a distributed power generation reactive power compensation device and control method with harmonic suppression function. The reactive power generated by the generator reactive power compensation device is used to suppress the harmonics generated by the system.
本发明是通过以下技术方案实现的:The present invention is achieved through the following technical solutions:
一种有谐波抑制功能的分散式发电无功补偿装置,包括:A-T混合无功补偿单元,集中控制单元和电源模块。A-T混合无功补偿单元包括晶闸管控制电抗器组(TCR)、有源电力滤波器(APF)和无源滤波器组。晶闸管控制电抗器组接入无源滤波器组和电网主干线之间的补偿接入点,有源电力滤波器和无源滤波器组串联构成混合有源滤波器,集中控制单元输出脉宽调制信号和触发脉冲信号分别触发APF晶体管和晶闸管控制电抗器组中的晶闸管。A distributed generation reactive power compensation device with harmonic suppression function, comprising: an A-T hybrid reactive power compensation unit, a centralized control unit and a power supply module. The A-T hybrid reactive power compensation unit includes a thyristor-controlled reactor (TCR), an active power filter (APF) and a passive filter. The thyristor-controlled reactor group is connected to the compensation access point between the passive filter group and the grid main line, the active power filter and the passive filter group are connected in series to form a hybrid active filter, and the centralized control unit outputs pulse width modulation The signal and the trigger pulse signal respectively trigger the APF transistor and the thyristors in the thyristor-controlled reactor bank.
所述的晶闸管控制电抗器组由三组晶闸管控制电抗器并联构成,每组晶闸管控制电抗器由两个晶闸管并联之后和一个电抗器串联组成;所述的无源滤波器组包括三组LC并联支路,每个支路由三个单独的LC串联支路并联组成;所述的A-T混合无功补偿单元的具体连接是:晶闸管控制电抗器组接入无源滤波器组和电网主干线之间的补偿接入点,有源滤波器的输出端经过滤波电抗接入无源滤波器组的输入端,无源滤波器组的输出端连接电网,从而对电网进行谐波抑制。The thyristor-controlled reactor group is composed of three groups of thyristor-controlled reactors connected in parallel, and each group of thyristor-controlled reactors is composed of two thyristors connected in parallel and one reactor connected in series; the passive filter group includes three groups of LCs connected in parallel Each branch is composed of three separate LC series branches connected in parallel; the specific connection of the A-T hybrid reactive power compensation unit is: the thyristor control reactor group is connected between the passive filter group and the main line of the power grid The compensation access point, the output end of the active filter is connected to the input end of the passive filter bank through the filter reactance, and the output end of the passive filter bank is connected to the power grid, thereby suppressing the harmonics of the power grid.
所述的集中控制单元包括采样模块,DSP控制模块,锁相环电路模块,脉冲发生模块,信息反馈及显示模块;集中控制单元的具体连接是:从电网采集的电压和电流信号接入采样模块的输入端,采样模块的输出端连接DSP控制模块的输入端,DSP控制模块的输出端连接锁相环电路模块的输入端,锁相环电路模块的输出端连接脉冲发生模块的输入端,脉冲发生模块的输出端连接晶闸管控制电抗器组和有源电力滤波器的输入端,晶闸管控制电抗器组和有源电力滤波器的输出端连接反馈模块的输入端,反馈模块的输出端连接显示模块的输入端,显示模块的输出端再通过双口RAM通信模块连接到DSP控制模块输入端。The centralized control unit includes a sampling module, a DSP control module, a phase-locked loop circuit module, a pulse generation module, an information feedback and a display module; the specific connection of the centralized control unit is: the voltage and current signals collected from the power grid are connected to the sampling module The input terminal of the sampling module is connected to the input terminal of the DSP control module, the output terminal of the DSP control module is connected to the input terminal of the phase-locked loop circuit module, and the output terminal of the phase-locked loop circuit module is connected to the input terminal of the pulse generation module. The output terminal of the generating module is connected to the input terminal of the thyristor-controlled reactor group and the active power filter, the output terminal of the thyristor-controlled reactor group and the active power filter is connected to the input terminal of the feedback module, and the output terminal of the feedback module is connected to the display module The input terminal of the display module is connected to the input terminal of the DSP control module through the dual-port RAM communication module.
所述采样模块包括精密系列电压互感器TR1102-1C、电流互感器TR0102-2C和DSP采样模块,DSP采样模块包括信号调理电路和过零检测电路。电压互感器和电流互感器的高压端连接电网,低压端连接DSP采样模块的输入端,信号调理电路的输出端连接过零检测电路的输入端,过零检测电路的输出端作为采样模块的输出端接入DSP控制模块;DSP控制模块主要由TMS320F2812系列DSP组成,DSP控制模块的输出端连接到脉冲发生模块的输入端。所述采样模块的具体连接是:一次电压电流互感器的高压侧连接电网,低压侧连接二次电压电流互感器的输入端,二次电压电流互感器的输出端接入A/D转换芯片的输入端,A/D转换芯片的输出端接入DSP采样板的输入端,DSP采样板的输出端连接到锁存器,同时DSP采样板通过双口RAM和单片机80C196交换数据。The sampling module includes a precision series voltage transformer TR1102-1C, a current transformer TR0102-2C and a DSP sampling module, and the DSP sampling module includes a signal conditioning circuit and a zero-crossing detection circuit. The high-voltage end of the voltage transformer and current transformer is connected to the power grid, the low-voltage end is connected to the input end of the DSP sampling module, the output end of the signal conditioning circuit is connected to the input end of the zero-crossing detection circuit, and the output end of the zero-crossing detection circuit is used as the output of the sampling module The terminal is connected to the DSP control module; the DSP control module is mainly composed of TMS320F2812 series DSP, and the output terminal of the DSP control module is connected to the input terminal of the pulse generation module. The specific connection of the sampling module is: the high-voltage side of the primary voltage-current transformer is connected to the power grid, the low-voltage side is connected to the input end of the secondary voltage-current transformer, and the output end of the secondary voltage-current transformer is connected to the A/D conversion chip. The input terminal and the output terminal of the A/D conversion chip are connected to the input terminal of the DSP sampling board, and the output terminal of the DSP sampling board is connected to the latch. At the same time, the DSP sampling board exchanges data with the single-chip 80C196 through the dual-port RAM.
所述锁相环电路模块包括过零检测电路、锁相环电路、倍频电路、低通滤波器和压控振荡器;过零检测电路的输出端连接锁相环电路的输入端,锁相环电路的输出端连接倍频电路的输入端,倍频电路产生采样窄脉冲触发采样保持电路,实现锁相同步采样。锁相环电路模块的具体连接是:电压电流信号接入过零检测电路的输入端,过零检测电路的输出端连接相位比较器的输入端,相位比较器的输出端连接低通滤波器的输入端,低通滤波器的输出端连接压控振荡器的输入端,压控振荡器的输出端连接整形电路,对输入信号进行整形处理。The phase-locked loop circuit module includes a zero-crossing detection circuit, a phase-locked loop circuit, a frequency multiplication circuit, a low-pass filter and a voltage-controlled oscillator; the output end of the zero-crossing detection circuit is connected to the input end of the phase-locked loop circuit, and the phase-locked The output end of the loop circuit is connected to the input end of the frequency multiplication circuit, and the frequency multiplication circuit generates sampling narrow pulses to trigger the sampling and holding circuit, so as to realize phase-locked and synchronous sampling. The specific connection of the phase-locked loop circuit module is: the voltage and current signals are connected to the input terminal of the zero-crossing detection circuit, the output terminal of the zero-crossing detection circuit is connected to the input terminal of the phase comparator, and the output terminal of the phase comparator is connected to the low-pass filter. The input terminal and the output terminal of the low-pass filter are connected to the input terminal of the voltage-controlled oscillator, and the output terminal of the voltage-controlled oscillator is connected to a shaping circuit for shaping the input signal.
所述脉冲发生模块包括同步电压信号限幅电路,同步整形电路,脉冲生成电路;所述脉冲生成电路包括脉冲开通封锁电路,脉冲展宽电路,光电转换电路。同步电压信号限幅电路前端连接DSP控制模块,输出端连接同步整形电路的输入端,同步整形电路的输出端连接脉冲生成电路的输入端,输出的脉冲控制晶闸管控制电抗器组和有源电力滤波器的信号触发。脉冲发生模块的具体连接是:同步电压信号限幅电路的输出端连接同步整形电路的输入端,同步整形电路的输出端连接12位同步计数器的输入端,12位同步计数器的输出端连接12位比较器的输入端,12位比较器的输出端连接脉冲开通封锁电路输入端,脉冲开通封锁电路输出端连接脉冲展宽电路输入端,脉冲展宽电路输出端连接光电转换电路输入端,光电转换电路输出端控制晶闸管。The pulse generating module includes a synchronous voltage signal limiting circuit, a synchronous shaping circuit, and a pulse generating circuit; the pulse generating circuit includes a pulse opening and blocking circuit, a pulse stretching circuit, and a photoelectric conversion circuit. The front end of the synchronous voltage signal limiting circuit is connected to the DSP control module, the output end is connected to the input end of the synchronous shaping circuit, the output end of the synchronous shaping circuit is connected to the input end of the pulse generating circuit, and the output pulse controls the thyristor to control the reactor group and the active power filter The signal trigger of the device. The specific connection of the pulse generation module is: the output end of the synchronous voltage signal limiting circuit is connected to the input end of the synchronous shaping circuit, the output end of the synchronous shaping circuit is connected to the input end of the 12-bit synchronous counter, and the output end of the 12-bit synchronous counter is connected to the 12-bit synchronous counter. The input end of the comparator, the output end of the 12-bit comparator are connected to the input end of the pulse opening and blocking circuit, the output end of the pulse opening and blocking circuit is connected to the input end of the pulse stretching circuit, the output end of the pulse stretching circuit is connected to the input end of the photoelectric conversion circuit, and the output of the photoelectric conversion circuit terminal control thyristor.
所述信息反馈及显示模块包括高电位板,回报板和信息显示模块,信息显示模块主要包括80C196单片机,液晶显示模块,外接主控人机接口模块即外接键盘输入和上位机。信息反馈及显示模块的具体连接是:晶闸管控制电抗器组和有源电力滤波器的输出端连接高电位板的输入端,高电位板的输出端连接回报板的输入端,回报板的输出端连接80C196单片机,单片机的输出端分别接液晶显示部分和上位机监视模块,键盘接入部分信息显示模块通过双口RAM和DSP采样模块之间进行相互通信。The information feedback and display module includes a high-potential board, a return board and an information display module. The information display module mainly includes an 80C196 single-chip microcomputer, a liquid crystal display module, an external main control human-machine interface module, that is, an external keyboard input and a host computer. The specific connection of the information feedback and display module is: the output end of the thyristor control reactor group and the active power filter is connected to the input end of the high potential board, the output end of the high potential board is connected to the input end of the return board, and the output end of the return board Connect the 80C196 single-chip microcomputer, the output end of the single-chip microcomputer is respectively connected to the liquid crystal display part and the upper computer monitoring module, and the information display module of the keyboard access part communicates with each other through the dual-port RAM and the DSP sampling module.
一种有谐波抑制功能的分散式发电无功补偿装置进行谐波抑制的控制方法,具体按如下步骤进行:A control method for harmonic suppression of a distributed power generation reactive power compensation device with a harmonic suppression function, specifically as follows:
步骤一:采样模块采集分散式发电系统的三相电压瞬时值ua,ub,uc,三相电流瞬时值ia,ib,ic;Step 1: The sampling module collects the instantaneous three-phase voltage u a , u b , u c and the instantaneous three-phase current i a , i b , i c of the distributed power generation system;
步骤二:晶闸管控制角的计算:首先采用锁相技术进行三相交流电信号的检测,包括电压、电流和频率;然后根据三相补偿电纳和电压电流采样值的数学模型进行晶闸管控制角的运算,再输出晶闸管控制角,在之后回馈部分中,光电转换电路实现晶闸管触发信号的输出和状态回报信号的接收;Step 2: Calculation of the control angle of the thyristor: firstly, phase-locking technology is used to detect the three-phase AC signal, including voltage, current and frequency; Operation, and then output the thyristor control angle, in the subsequent feedback part, the photoelectric conversion circuit realizes the output of the thyristor trigger signal and the reception of the status return signal;
步骤三:生成触发脉冲:首先系统电压进行过零检测,累加器设置为上升沿复位,这样过零检测的电压上升沿脉冲则可以是累加器复位,累加到下一次上升的时候形成一个锯齿波,将DSP所计算出来的晶闸管触发角度与此锯齿波进行比较,当晶闸管的触发角度大于累加器的累加值时触发一个上升沿脉冲直到累加器复位,这样就得到一个宽幅脉冲;由于得到的脉冲过宽,所以采用同样的方式对所得到宽频脉冲与二次累加器进行比较,则可以得到一个足以触发晶闸管的窄脉冲信号;Step 3: Generate a trigger pulse: First, the system voltage is detected for zero crossing, and the accumulator is set to reset on the rising edge, so that the rising edge pulse of the zero-crossing detection voltage can reset the accumulator, and accumulate to form a sawtooth wave when it rises next time , compare the triggering angle of the thyristor calculated by the DSP with this sawtooth wave, when the triggering angle of the thyristor is greater than the accumulated value of the accumulator, a rising edge pulse is triggered until the accumulator is reset, thus obtaining a wide pulse; The pulse is too wide, so compare the obtained wide-frequency pulse with the secondary accumulator in the same way, and you can get a narrow pulse signal enough to trigger the thyristor;
步骤四:控制无功补偿器晶闸管和有源电力滤波器晶体管的通断,对分散式发电系统进行无功补偿和谐波抑制。Step 4: Control the on-off of the thyristor of the reactive power compensator and the transistor of the active power filter, and perform reactive power compensation and harmonic suppression on the distributed power generation system.
所述的无源滤波器组由三组LC并联支路组成,每个支路由三组串联的LC支路并联组成,每组支路再串联一个滤波电容,安装在有源滤波器的输出接点处,这样可以降低节点的谐波电压,能抑制谐波电流注入电力系统中,更能起到为整个系统提供足够过容补偿的作用。The passive filter bank is composed of three groups of LC parallel branches, each branch is composed of three groups of LC branches in series, and each group of branches is connected in series with a filter capacitor, which is installed at the output contact of the active filter In this way, the harmonic voltage of the node can be reduced, the injection of harmonic current into the power system can be suppressed, and it can also provide sufficient overcapacity compensation for the entire system.
所述的三相交流电的检测,具体按如下步骤进行:The detection of the three-phase alternating current is specifically carried out as follows:
步骤一:首先令电网电压为:Step 1: First let the grid voltage be:
式中ua,ub,uc为三相电压瞬时值,E1n代表正序电压有效值,E2n代表负序电压有效值,ω为角频率,θ2n为负序初相角;In the formula, u a , u b , u c are instantaneous values of three-phase voltage, E 1n represents positive sequence voltage effective value, E 2n represents negative sequence voltage effective value, ω is angular frequency, θ 2n is negative sequence initial phase angle;
步骤二:对上式中三相电压进行abc三相到α-β两相坐标的变换可得如下:Step 2: Transform the abc three-phase to α-β two-phase coordinates of the three-phase voltage in the above formula as follows:
uα和uβ为α-β坐标下对应的两相电压值,c32为从abc三相到α-β两相的转换矩阵;u α and u β are the corresponding two-phase voltage values under the α-β coordinates, and c 32 is the conversion matrix from abc three-phase to α-β two-phase;
步骤三:由上式和矩阵csc得到以下矩阵:Step 3: Obtain the following matrix from the above formula and matrix c sc :
上式中:In the above formula:
sin(ωt+θ)和cos(ωt+θ)是由标准正弦工频信号发生器产生的信号,θ为任意初相角;sin(ωt+θ) and cos(ωt+θ) are signals generated by a standard sinusoidal power frequency signal generator, and θ is any initial phase angle;
步骤四:从上式中提取直流分量,可以得到以下:Step 4: Extracting the DC component from the above formula, the following can be obtained:
则变换后的电压为:Then the transformed voltage is:
Es,Ec为提取的直流分量,csc -1为转换矩阵的逆矩阵,usf,ucf为转换后的两相电压值;E s , E c are the extracted DC components, c sc -1 is the inverse matrix of the conversion matrix, u sf , u cf are the converted two-phase voltage values;
步骤五:由变换后相电压usf,ucf和电流iα,iβ计算p,q分量,计算公式如下:Step 5: Calculate the p and q components from the transformed phase voltage u sf , u cf and current i α , i β , the calculation formula is as follows:
步骤六:计算检测电流:p分量经过神经网络滤波算法后得到相应的交流分量,q分量经过反相算法处理后得到相应的负直流分量,再经过转换得到α-β两相检测电流,具体公式如下:Step 6: Calculate the detection current: the p component gets the corresponding AC component after the neural network filtering algorithm, the q component gets the corresponding negative DC component after the inversion algorithm, and then converts to get the α-β two-phase detection current, the specific formula as follows:
为p分量对应的交流分量,由iα和iβ经过转换矩阵即可得到瞬时无功检测电流ia,ib,ic,具体公式如下: is the AC component corresponding to the p component, the instantaneous reactive power detection current i a , i b , i c can be obtained from i α and i β through the transformation matrix, and the specific formula is as follows:
步骤七:根据所检测电流计算晶闸管的触发角α;Step 7: Calculate the firing angle α of the thyristor according to the detected current;
晶闸管正常运行时,系统中基波电流为:When the thyristor is in normal operation, the fundamental current in the system is:
基波电流I的下标1表示一次谐波,即为基波;XL是电抗,XL=ωL;Um是电压峰值;由此即可算得触发角度。The
所述的无源滤波器组的整体优化算法流程如下:The overall optimization algorithm process of the passive filter bank is as follows:
步骤一:系统参数设定,主要包括系统无功补偿量,无源滤波器组的电压值和谐波限值等;系统无功补偿量为QSVC=Q1+Q2+...+Qh,系统谐波的电压和电流限制为Ih<IH,Uh<UH,IH和UH为系统谐波的电流和电压最大限制值;Q1、Q2、Qh为各支路输出的无功功率;Ih为系统谐波电流,Uh为系统谐波电压;Step 1: System parameter setting, mainly including system reactive power compensation amount, voltage value of passive filter bank and harmonic limit value, etc.; system reactive power compensation amount is Q SVC =Q 1 +Q 2 +...+ Q h , the voltage and current limits of system harmonics are I h <I H , U h <U H , I H and U H are the maximum limit values of system harmonic current and voltage; Q 1 , Q 2 , and Q h are Reactive power output by each branch; I h is the system harmonic current, U h is the system harmonic voltage;
步骤二:确定实际无源滤波器组所能提供的无功补偿量的总值Q,按各次谐波电流占总谐波电流的比值,分配无源滤波器组各支路的无功补偿量Qi;Step 2: Determine the total value Q of reactive power compensation that the actual passive filter bank can provide, and allocate the reactive power compensation of each branch of the passive filter bank according to the ratio of each harmonic current to the total harmonic current Quantity Q i ;
步骤三:按电压电流谐波畸变率与无源滤波器组并联谐振频率条件,修正无功量的分配;Step 3: Correct the distribution of reactive power according to the voltage and current harmonic distortion rate and the parallel resonance frequency of the passive filter bank;
电力系统总谐波畸变率为,滤波器组内、外谐振频率约束为fii [50h(1+δemn),50h(1+δemp)],fio [50h(1+δemn),50h(1+δemp)];式中U1为基波电压有效值;h为谐波次数,H为滤波器组数,δemn为负最大等效频率偏差,δemp为正最大等效频率偏差;The total harmonic distortion rate of the power system is , the inner and outer resonant frequencies of the filter bank are restricted to f ii [50h(1+δ emn ),50h(1+δ emp )], f io [50h(1+δ emn ),50h(1+δ emp )]; where U 1 is the effective value of the fundamental voltage; h is the harmonic order, H is the number of filter groups, and δ emn is the negative maximum equivalent frequency Deviation, δ emp is the positive maximum equivalent frequency deviation;
步骤四:循环计算各支路滤波器的参数值,判断滤波器是否满足电压电流谐波畸变率与无源滤波器组内外并联谐振频率条件,如果满足条件,则再判断无源滤波器组的无功输出是否满足实际分散式发电无功补偿装置的无功补偿量,如果不满足条件就再重新修正谐波系数,返回修正无功量分配步骤,再无源滤波器组的无功输出满足实际分散式发电无功补偿装置的无功补偿量之后,就可以运行无源滤波器组进行无功输出和谐波抑制了。Step 4: Circularly calculate the parameter values of each branch filter, and judge whether the filter satisfies the conditions of the voltage and current harmonic distortion rate and the internal and external parallel resonance frequency of the passive filter bank. If the conditions are met, then judge the passive filter bank Whether the reactive power output meets the reactive power compensation amount of the actual distributed power generation reactive power compensation device, if the condition is not satisfied, re-correct the harmonic coefficient, return to the reactive power allocation step, and then the reactive power output of the passive filter bank satisfies After the reactive power compensation amount of the actual distributed power generation reactive power compensation device is obtained, the passive filter bank can be operated for reactive power output and harmonic suppression.
本发明的优点及有益效果是:Advantage of the present invention and beneficial effect are:
本发明在晶闸管控制电抗器组(TCR型)基础上,增加了有源滤波器和无源滤波器组,提出了一种可以进行无功补偿和抑制谐波的混合补偿装置,本发明采用的新型拓扑结构取代了传统的无源滤波器部分,并与TCR动态无功调节能力相结合,能有效抑制无源滤波器与电网发生谐振,使谐波补偿精度更高,系统响应更快,提高了无功补偿的安全性。On the basis of the thyristor-controlled reactor group (TCR type), the present invention adds active filters and passive filter groups, and proposes a hybrid compensation device that can perform reactive power compensation and suppress harmonics. The invention uses The new topology replaces the traditional passive filter part, and combined with the TCR dynamic reactive power adjustment capability, it can effectively suppress the resonance between the passive filter and the power grid, making the harmonic compensation more accurate, the system responding faster, and improving The security of reactive power compensation is improved.
1、本发明的晶闸管控制电抗器组和有源滤波器采用集中补偿,共同抑制谐波,分散工作方式,即晶闸管控制电抗器组和有源滤波器都是通过控制单元,经由无源滤波器组和控制电抗器接入电网,共同进行无功补偿和谐波抑制,同时又构成两套工作系统,即无功补偿器和有源滤波器又可以分开工作,这样避免了两个补偿装置同时出现问题不能工作的情况,保证了工作的可靠性。1. The thyristor-controlled reactor group and the active filter of the present invention adopt centralized compensation, jointly suppress harmonics, and work in a decentralized manner, that is, both the thyristor-controlled reactor group and the active filter pass through the control unit and pass through the passive filter The group and the control reactor are connected to the power grid to jointly perform reactive power compensation and harmonic suppression, and at the same time constitute two sets of working systems, that is, the reactive power compensator and the active filter can work separately, thus avoiding the simultaneous operation of the two compensation devices If there is a problem and cannot work, the reliability of the work is guaranteed.
2、本发明的控制单元采用一套控制单元,一套控制单元通过两条控制路径分别控制晶闸管控制电抗器组晶闸管和有源滤波器晶体管,这样既减少了不必要的控制装置接入电网,又使得控制部分简单、经济和实用。2. The control unit of the present invention adopts a set of control units, and a set of control units respectively controls the thyristor control reactor group thyristor and the active filter transistor through two control paths, which reduces unnecessary control devices connected to the power grid, It also makes the control part simple, economical and practical.
3、本发明中A-T混合无功补偿单元中的有源电力滤波器被控制为谐波电压源,能有效改善无源滤波器的滤波特性,并抑制无源滤波器与系统电感发生的并联谐振,使无功调节能力更强,克服了轻载时无功功率容易倒送的缺点。3. The active power filter in the A-T hybrid reactive power compensation unit of the present invention is controlled as a harmonic voltage source, which can effectively improve the filtering characteristics of the passive filter and suppress the parallel resonance between the passive filter and the system inductance , so that the reactive power adjustment ability is stronger, and the disadvantage that the reactive power is easy to be reversed at light load is overcome.
4、本发明三相交流电的检测方法采用改进的p-q检测算法,在计算交流分量和直流分量时采用了神经网络算法,这样就使得工频信号发生器初相角θ的值不影响最后对电网正序电压相位检测的准确性,而且消除了在电网电压下不对称时出现的误差。4. The detection method of the three-phase alternating current of the present invention adopts an improved p-q detection algorithm, and a neural network algorithm is adopted when calculating the AC component and the DC component, so that the value of the initial phase angle θ of the power frequency signal generator does not affect the final power grid The accuracy of positive sequence voltage phase detection, and eliminates the error that occurs when the grid voltage is asymmetrical.
5、本发明无源滤波器组参数的设计,考虑了整体滤波器组的无功补偿量的优化分配,对于一些高维复杂的约束条件尽量简化,避免各个滤波器支路进行参数优化时涉及一些非线性算法。5. The design of the parameters of the passive filter bank of the present invention considers the optimal distribution of the reactive power compensation of the overall filter bank, and simplifies some high-dimensional and complex constraint conditions as far as possible, so as to avoid the involvement of each filter branch in parameter optimization. Some nonlinear algorithms.
6、本发明中无源滤波器组在分散式发电系统中安装在非线性负荷的节点上,这样可以降低节点的谐波电压,能抑制谐波电流注入电力系统中,更能起到给整个系统提供足够过容补偿的作用。6. In the present invention, the passive filter bank is installed on the node of the nonlinear load in the distributed power generation system, so that the harmonic voltage of the node can be reduced, the injection of harmonic current into the power system can be suppressed, and it can better serve the whole The system provides sufficient overcapacity compensation.
附图说明Description of drawings
图1是本发明装置总体结构框图;Fig. 1 is a general structural block diagram of the device of the present invention;
图2是本发明中A-T混合无功补偿单元结构图;Fig. 2 is A-T hybrid reactive power compensation unit structural diagram among the present invention;
图3是本发明中集中控制单元结构图;Fig. 3 is a structural diagram of a centralized control unit in the present invention;
图4是本发明信号调理电路原理图;Fig. 4 is a schematic diagram of the signal conditioning circuit of the present invention;
图5是本发明中DSP主控板结构框图;Fig. 5 is a structural block diagram of DSP main control board among the present invention;
图6是本发明中锁相电路结构图;Fig. 6 is a structural diagram of a phase-locked circuit in the present invention;
图7是本发明中锁相倍频电路接线图;Fig. 7 is the wiring diagram of the phase-locked frequency multiplication circuit in the present invention;
图8是本发明中触发脉冲形成结构图;Fig. 8 is a structural diagram of trigger pulse formation in the present invention;
图9是本发明中同步信号形成电路图;Fig. 9 is a synchronous signal forming circuit diagram among the present invention;
图10是本发明中触发脉冲生成电路图;Fig. 10 is a trigger pulse generating circuit diagram in the present invention;
图11是本发明中脉冲展宽电路图;Fig. 11 is a pulse stretching circuit diagram in the present invention;
图12是本发明中电源模块原理图;Fig. 12 is a schematic diagram of the power module in the present invention;
图13是本发明中CY7C133连接图;Figure 13 is a connection diagram of CY7C133 in the present invention;
图14是本发明中显示单片机与上位机连接原理图;Fig. 14 is a schematic diagram showing the connection between the single-chip microcomputer and the host computer in the present invention;
图15是本发明中矩阵键盘原理图;Fig. 15 is a schematic diagram of a matrix keyboard in the present invention;
图16是本发明中液晶显示模块图;Fig. 16 is a diagram of a liquid crystal display module in the present invention;
图17是本发明中滤波器组整体优化算法流程图。Fig. 17 is a flow chart of the filter bank overall optimization algorithm in the present invention.
下面结合附图和具体实施方式对本发明做进一步详细的说明,但不受实施例所限。The present invention will be described in further detail below in conjunction with the accompanying drawings and specific embodiments, but is not limited by the embodiments.
具体实施方式Detailed ways
本发明是一种有谐波抑制功能的分散式发电无功补偿装置及方法,本发明装置的详细结构及工作原理结合实施例加以说明,实施例以实验室110V静态无功补偿实验平台为例,实验平台静态无功补偿装置SVC为TCR+FC型,除对静态无功功率和三相不平衡进行补偿之外,还能对分散式风电系统产生的谐波进行抑制。The present invention is a distributed power generation reactive power compensation device and method with harmonic suppression function. The detailed structure and working principle of the device of the present invention will be explained in conjunction with the embodiment. The embodiment takes the 110V static reactive power compensation experimental platform in the laboratory as an example. , the experimental platform static reactive power compensation device SVC is TCR+FC type, in addition to compensating static reactive power and three-phase imbalance, it can also suppress the harmonics generated by the distributed wind power system.
本发明的具有谐波抑制功能的分散式发电无功补偿装置主要包括:A-T混合无功补偿单元和集中控制单元两大部分,A-T混合无功补偿单元包括晶闸管控制电抗器组(TCR)、有源电力滤波器(APF)和无源滤波器组。晶闸管控制电抗器组接入无源滤波器组和电网主干线之间的补偿接入点,有源电力滤波器和无源滤波器组串联构成混合有源滤波器,集中控制单元输出脉宽调制信号和触发脉冲信号分别触发APF晶体管和晶闸管控制电抗器组中的晶闸管。所述的A-T混合无功补偿单元的具体连接是:晶闸管控制电抗器组接入无源滤波器组和电网主干线之间的补偿接入点,有源电力滤波器的输出端经过滤波电抗接入无源滤波器组的输入端,无源滤波器组的输出端连接电网,从而对电网进行谐波抑制;所述的晶闸管控制电抗器组由三组晶闸管控制电抗器并联构成,每组晶闸管控制电抗器由两个晶闸管并联之后和一个电抗器串联组成;所述的无源滤波器组包括三组LC并联支路,每个支路由三个单独的LC串联支路并联组成。分散式发电无功补偿装置总体结构如图1所示,A-T混合无功补偿单元结构如图2所示。The distributed power generation reactive power compensation device with harmonic suppression function of the present invention mainly includes: A-T hybrid reactive power compensation unit and centralized control unit. The A-T hybrid reactive power compensation unit includes thyristor controlled reactor group (TCR), active Source power filters (APF) and passive filter banks. The thyristor-controlled reactor group is connected to the compensation access point between the passive filter group and the grid main line, the active power filter and the passive filter group are connected in series to form a hybrid active filter, and the centralized control unit outputs pulse width modulation The signal and the trigger pulse signal respectively trigger the APF transistor and the thyristors in the thyristor-controlled reactor bank. The specific connection of the A-T hybrid reactive power compensation unit is: the thyristor control reactor group is connected to the compensation access point between the passive filter group and the main line of the power grid, and the output terminal of the active power filter is connected to the into the input terminal of the passive filter bank, and the output terminal of the passive filter bank is connected to the grid, thereby suppressing the harmonics of the grid; the thyristor-controlled reactor bank is composed of three sets of thyristor-controlled reactors connected in parallel, and each set of thyristor-controlled reactors The control reactor is composed of two thyristors connected in parallel and a reactor in series; the passive filter bank includes three sets of LC parallel branches, each branch is composed of three separate LC series branches connected in parallel. The overall structure of the reactive power compensation device for distributed power generation is shown in Figure 1, and the structure of the A-T hybrid reactive power compensation unit is shown in Figure 2.
如图3所示,图3是本发明中集中控制单元的总体结构图。集中控制单元包括采样模块,DSP控制模块,锁相环电路模块,脉冲发生模块,信息反馈及显示模块。集中控制单元的具体连接是:从电网采集的电压和电流信号接入采样模块的输入端,采样模块的输出端连接DSP控制模块的输入端,DSP控制模块的输出端连接锁相环电路模块的输入端,锁相环电路模块的输出端连接脉冲发生模块的输入端,脉冲发生模块的输出端连接晶闸管控制电抗器组和有源电力滤波器的输入端,晶闸管控制电抗器组和有源电力滤波器的输出端连接反馈模块的输入端,反馈模块的输出端连接显示模块的输入端,显示模块的输出端再通过双口RAM通信模块连接到DSP控制模块输入端。As shown in Fig. 3, Fig. 3 is an overall structural diagram of the centralized control unit in the present invention. The centralized control unit includes sampling module, DSP control module, phase-locked loop circuit module, pulse generation module, information feedback and display module. The specific connection of the centralized control unit is: the voltage and current signals collected from the grid are connected to the input of the sampling module, the output of the sampling module is connected to the input of the DSP control module, and the output of the DSP control module is connected to the phase-locked loop circuit module. The input terminal, the output terminal of the phase-locked loop circuit module is connected to the input terminal of the pulse generation module, the output terminal of the pulse generation module is connected to the input terminal of the thyristor-controlled reactor group and the active power filter, the thyristor-controlled reactor group and the active power filter The output end of the filter is connected to the input end of the feedback module, the output end of the feedback module is connected to the input end of the display module, and the output end of the display module is connected to the input end of the DSP control module through the dual-port RAM communication module.
本实施例中互感器采用精密电压变换器TR1102-1C,精密电流变换器TR1102-2C。在满足采样精度和实时性的前提下,为充分利用芯片资源,本系统采用集成在DSP内部的16路A/D转换器,它可以转换的电压范围是03V,而经互感器输出的电压信号是-5V+5V。交流信号调理电路由三级高性能运算放大器TL048构成,该电路可以将双极性的-5V+5V的正弦电压信号转变为03V内的单极性交流电压信号,信号调理电路如图4所示。电压互感器和电流互感器连接采样模块的输入接口芯片,采样模块的电压和电流输出端ACVA、ACVB、ACVC、ACCA、ACCB、ACCC连接DSP芯片的ADC输入引脚2、3、4、174、173和172。In this embodiment, the transformer adopts precision voltage transformer TR1102-1C and precision current transformer TR1102-2C. On the premise of satisfying sampling accuracy and real-time performance, in order to make full use of chip resources, this system adopts 16-way A/D converter integrated in DSP, the voltage range it can convert is 0.3V, and the voltage signal output by the transformer It is -5V+5V. The AC signal conditioning circuit is composed of a three-stage high-performance operational amplifier TL048. This circuit can convert the bipolar -5V+5V sinusoidal voltage signal into a unipolar AC voltage signal within 0.3V. The signal conditioning circuit is shown in Figure 4 . The voltage transformer and current transformer are connected to the input interface chip of the sampling module, and the voltage and current output terminals ACVA, ACVB, ACVC, ACCA, ACCB, ACCC of the sampling module are connected to the ADC input pins 2, 3, 4, 174, 173 and 172.
本发明中所述的采样模块包括精密系列电压互感器、电流互感器和DSP采样模块,DSP采样模块包括信号调理电路和过零检测电路;电压互感器和电流互感器的高压侧接入电网,低压侧连接DSP采样模块的输入端,信号调理电路的输出端连接过零检测电路的输入端,过零检测电路的输出端作为采样模块的输出端连入DSP控制模块;DSP控制模块主要由TMS320F2812系列DSP组成,DSP控制模块的输出端连接到脉冲发生模块的输入端。所述采样模块的具体连接是:一次电压电流互感器的高压侧连接电网,低压侧连接二次电压电流互感器的输入端,二次电压电流互感器的输出端接入A/D转换芯片的输入端,A/D转换芯片的输出端接入DSP采样板的输入端,DSP采样板的输出端连接到锁存器,同时DSP采样板通过双口RAM和单片机80C196交换数据。The sampling module described in the present invention includes a precision series voltage transformer, a current transformer and a DSP sampling module, and the DSP sampling module includes a signal conditioning circuit and a zero-crossing detection circuit; the high voltage side of the voltage transformer and the current transformer is connected to the power grid, The low-voltage side is connected to the input end of the DSP sampling module, the output end of the signal conditioning circuit is connected to the input end of the zero-crossing detection circuit, and the output end of the zero-crossing detection circuit is connected to the DSP control module as the output end of the sampling module; the DSP control module is mainly composed of TMS320F2812 It consists of a series of DSPs, and the output end of the DSP control module is connected to the input end of the pulse generation module. The specific connection of the sampling module is: the high-voltage side of the primary voltage-current transformer is connected to the grid, the low-voltage side is connected to the input end of the secondary voltage-current transformer, and the output end of the secondary voltage-current transformer is connected to the A/D conversion chip. The input end, the output end of the A/D conversion chip is connected to the input end of the DSP sampling board, the output end of the DSP sampling board is connected to the latch, and the DSP sampling board exchanges data with the single-chip 80C196 through the dual-port RAM.
采样模块的功能是:实时采集电网的三相电压和电流,对所采集的数据进行模数转换,计算晶闸管的触发角度,对结果进行实时所存。The function of the sampling module is to collect the three-phase voltage and current of the power grid in real time, perform analog-to-digital conversion on the collected data, calculate the trigger angle of the thyristor, and store the results in real time.
DSP控制模块采用TMS320F2812系列DSP控制器,该系列处理器集中了多种外设,采用高性能的静态CMOS技术,运算速度快,工作时钟频率达到150MH,而且是高性能32位CPU,采用哈佛结构,具有快速的中端响应处理能力。本发明以DSPTMS320F2812作为主控芯片,它与外围单元共同构成了运算主控板,其结构框图如图5所示。The DSP control module adopts TMS320F2812 series DSP controller. This series of processors integrates a variety of peripherals, adopts high-performance static CMOS technology, has fast operation speed, and the working clock frequency reaches 150MH. It is a high-performance 32-bit CPU and adopts Harvard structure. , with fast mid-end response processing capability. The present invention uses DSPTMS320F2812 as the main control chip, which together with the peripheral units constitutes the operation main control board, and its structural block diagram is shown in Fig. 5 .
本发明中所述的锁相环电路模块包括过零检测电路、锁相环电路和倍频电路、低通滤波器和压控振荡器。过零检测电路主要是对正弦电压信号进行转换,使其成为可应用的方波信号,另外就是给锁相倍频电路提供信号。其连接关系是:过零检测电路的输出端连接锁相环电路的输入端,锁相环电路的输出端连接倍频电路的输入端,倍频电路产生采样窄脉冲触发采样保持电路,实现锁相同步采样。The phase-locked loop circuit module described in the present invention includes a zero-crossing detection circuit, a phase-locked loop circuit, a frequency multiplication circuit, a low-pass filter and a voltage-controlled oscillator. The zero-crossing detection circuit is mainly to convert the sinusoidal voltage signal to make it an applicable square wave signal, and to provide signals to the phase-locked frequency multiplication circuit. The connection relationship is: the output end of the zero-crossing detection circuit is connected to the input end of the phase-locked loop circuit, the output end of the phase-locked loop circuit is connected to the input end of the frequency multiplication circuit, and the frequency multiplication circuit generates sampling narrow pulses to trigger the sample-and-hold circuit to realize the locking Synchronized sampling.
所述锁相环电路模块的具体连接是:电压电流信号接入过零检测电路的输入端,过零检测电路的输出端连接相位比较器的输入端,相位比较器的输出端连接低通滤波器的输入端,低通滤波器的输出端连接压控振荡器的输入端,压控振荡器的输出端连接整形电路,对输入信号进行整形处理。The specific connection of the phase-locked loop circuit module is: the voltage and current signal is connected to the input end of the zero-crossing detection circuit, the output end of the zero-crossing detection circuit is connected to the input end of the phase comparator, and the output end of the phase comparator is connected to the low-pass filter The input end of the low-pass filter is connected to the input end of the voltage-controlled oscillator, and the output end of the voltage-controlled oscillator is connected to a shaping circuit for shaping the input signal.
锁相环电路模块的功能是:产生一个和采样信号严格同步的信号来直接控制信号的采样和转换,保证采样频率和信号基波频率的比值为固定值,实现取样频率和信号基波频率的准确跟踪。The function of the phase-locked loop circuit module is: to generate a signal that is strictly synchronized with the sampling signal to directly control the sampling and conversion of the signal, to ensure that the ratio of the sampling frequency to the fundamental frequency of the signal is a fixed value, and to realize the balance between the sampling frequency and the fundamental frequency of the signal. Accurate tracking.
完整的锁相电路结构如图6所示,输入信号经过过零检测电路变成周期性的方波信号,再经过相位比较,低通滤波等重要环节之后,产生采样窄脉冲,实现锁相同步采样,输出的是64倍频的与输入严格同步的脉冲信号,此信号作为触发A/D转换的外部触发信号。,锁相倍频电路结构采用CMOS集成锁相环芯片CD4046和分频器CD4040配合来实现128倍精确倍频的目的,其连接电路如图7所示,输入方波信号PLLA经倍频处理后变成方波信号PLLB,用于触发AD采样。74VHC4046MTC芯片的VCO输入端9引脚连接自身的13号引脚,该芯片的VCO输出端4号引脚连接CD4040BCSJ芯片的10号引脚,CD4040BCSJ芯片的2号引脚连接74VHC4046MTC芯片的3号引脚。The complete phase-locking circuit structure is shown in Figure 6. The input signal becomes a periodic square wave signal through the zero-crossing detection circuit, and then after phase comparison, low-pass filtering and other important links, a sampling narrow pulse is generated to achieve phase-locking synchronization Sampling, the output is a 64-fold frequency pulse signal that is strictly synchronized with the input, and this signal is used as an external trigger signal that triggers A/D conversion. , the phase-locked frequency multiplication circuit structure adopts the CMOS integrated phase-locked loop chip CD4046 and the frequency divider CD4040 to achieve the purpose of 128 times accurate frequency multiplication. The connection circuit is shown in Figure 7. The input square wave signal PLLA is processed by frequency multiplication Become a square wave signal PLLB, which is used to trigger AD sampling. 74VHC4046MTC chip's
触发脉冲的形成过程主要是根据DSP送来的检测到的相关电压和电流信号,输出脉宽调制(PWM)信号和触发脉冲信号,分别用于驱动有源电力滤波器中的绝缘栅极双极性晶体管(IGBT)和TCR中的晶闸管(SCR)。其原理框图如图8所示,由采样模块送来的100V交流电压信号经输入限幅,同相整形后变成50Hz占空比为50%同步方波信号CLR+,经过同步控制12位同步计数器计数,将计数器输出值与DSP发送来的触发控制角12位二进制数值进行比较。当两个值相等时输出一个脉冲TP+,TP+经过脉冲开通封锁控制电路、脉冲展宽电路后,形成晶闸管触发脉冲J+,再转换成脉冲的电信号触发晶闸管和晶体管。交流电压信号反相整形后触发原理同上。The formation process of the trigger pulse is mainly based on the detected relevant voltage and current signals sent by the DSP, outputting the pulse width modulation (PWM) signal and the trigger pulse signal, which are used to drive the insulated gate bipolar in the active power filter respectively. Thyristors (SCRs) in Inactive Transistors (IGBTs) and TCRs. Its functional block diagram is shown in Figure 8. The 100V AC voltage signal sent by the sampling module is limited by the input, and after being in-phase shaped, it becomes a 50Hz duty cycle of 50% synchronous square wave signal CLR+, which is counted by a 12-bit synchronous counter through synchronous control , compare the counter output value with the 12-bit binary value of the trigger control angle sent by the DSP. When the two values are equal, a pulse TP+ is output. After TP+ passes through the pulse opening and blocking control circuit and the pulse stretching circuit, a thyristor trigger pulse J+ is formed, and then converted into a pulsed electrical signal to trigger the thyristor and transistor. The trigger principle is the same as above after the AC voltage signal is reversed and shaped.
本发明中所述的脉冲发生模块包括同步电压信号限幅电路,同步整形电路,脉冲生成电路;所述脉冲生成电路包括脉冲开通封锁电路,脉冲展宽电路及光电转换电路;同步电压信号限幅电路前端连接DSP控制模块,输出端连接同步整形电路的输入端,同步整形电路的输出端连接脉冲生成电路的输入端,输出的脉冲控制晶闸管控制电抗器组和有源电力滤波器的信号触发。The pulse generating module described in the present invention includes a synchronous voltage signal limiting circuit, a synchronous shaping circuit, and a pulse generating circuit; the pulse generating circuit includes a pulse opening and blocking circuit, a pulse stretching circuit and a photoelectric conversion circuit; a synchronous voltage signal limiting circuit The front end is connected to the DSP control module, the output end is connected to the input end of the synchronous shaping circuit, the output end of the synchronous shaping circuit is connected to the input end of the pulse generation circuit, and the output pulse controls the thyristor to control the reactor group and the signal trigger of the active power filter.
脉冲发生模块的具体连接是:同步电压信号限幅电路的输出端连接同步整形电路的输入端,同步整形电路的输出端连接12位同步计数器的输入端,12位同步计数器的输出端连接12位比较器的输入端,12位比较器的输出端连接脉冲开通封锁电路输入端,脉冲开通封锁电路输出端连接脉冲展宽电路输入端,脉冲展宽电路输出端连接光电转换电路输入端,光电转换电路输出端控制晶闸管。The specific connection of the pulse generation module is: the output end of the synchronous voltage signal limiting circuit is connected to the input end of the synchronous shaping circuit, the output end of the synchronous shaping circuit is connected to the input end of the 12-bit synchronous counter, and the output end of the 12-bit synchronous counter is connected to the 12-bit synchronous counter. The input end of the comparator, the output end of the 12-bit comparator are connected to the input end of the pulse opening and blocking circuit, the output end of the pulse opening and blocking circuit is connected to the input end of the pulse stretching circuit, the output end of the pulse stretching circuit is connected to the input end of the photoelectric conversion circuit, and the output of the photoelectric conversion circuit terminal control thyristor.
脉冲发生模块的功能是:提供给晶闸管门级一个具有足够大的幅值和一定前沿陡度的触发脉冲信号,保证晶闸管阀组能够安全、可靠的工作。The function of the pulse generation module is to provide a trigger pulse signal with a sufficiently large amplitude and a certain leading edge steepness to the gate level of the thyristor, so as to ensure the safe and reliable operation of the thyristor valve group.
在本实施例中,脉冲发生模块主要包括同步信号形成电路,触发脉冲生成电路和触发脉冲展宽电路。同步信号形成电路的作用是保证晶闸管和晶体管能够得到准确的触发,在控制中计算得到的晶闸管的控制角是以线电压过零且电压变化率为正的时刻为计算零点,以线电压过零且电压变化率为负的时刻为180°点。根据此方法,晶闸管触发脉冲形成电路中的同步信号形成电路,电路原理如图9所示,电压信号经过转换处理之后,经LM311P电压比较器形成与线电压同步的方波信号square+,经两级非门整形后作为12位同步计数器的清零信号CLR+。工作顺序是:当CLR+为低电平时清零计数器,当CLR+为高电平时计数器开始计数,从而使计数器与线电压同步计数。同步计数器的时钟为1000000Hz。这样,计数器在每半个周期(10ms)内计数最大值为10000。很明显,计数器的输出数值与时间同步增长。In this embodiment, the pulse generating module mainly includes a synchronization signal forming circuit, a trigger pulse generating circuit and a trigger pulse stretching circuit. The function of the synchronous signal forming circuit is to ensure that the thyristor and transistor can be triggered accurately. The control angle of the thyristor calculated in the control is based on the moment when the line voltage crosses zero and the voltage change rate is positive. And the time when the voltage change rate is negative is the 180° point. According to this method, the thyristor triggers the synchronous signal forming circuit in the pulse forming circuit. The circuit principle is shown in Figure 9. After the voltage signal is converted and processed, a square wave signal square+ synchronous with the line voltage is formed by the LM311P voltage comparator. After the shaping of the non-gate, it is used as the clearing signal CLR+ of the 12-bit synchronous counter. The working sequence is: when CLR+ is low level, the counter is cleared, and when CLR+ is high level, the counter starts counting, so that the counter counts synchronously with the line voltage. The synchronous counter is clocked at 1000000Hz. In this way, the counter counts up to 10000 in every half cycle (10ms). Obviously, the output value of the counter increases synchronously with time.
在触发脉冲生成电路中,当12位同步计数器的输出值与DSP输出的晶闸管控制角的二进制数值相等时,由12位数字比较电路输出一窄脉冲TP+。TP+经脉冲开通封锁电路送往脉冲展宽电路。触发脉冲生成电路如图10所示,在图中D0-D11为12位计数器传送来的二进制数值,Phase0-Phase11为DSP输出的晶闸管控制角二进制数值,Phase0-Phase3连接SN74LS85N芯片的模拟输入引脚10、12、13和15,Phase4-Phase11连接芯片SN74LS688的2、4、6、8、11、13、15和17引脚。U11、U12构成12位数值比较器,TP+为触发脉冲。In the trigger pulse generation circuit, when the output value of the 12-bit synchronous counter is equal to the binary value of the thyristor control angle output by the DSP, a narrow pulse TP+ is output by the 12-bit digital comparison circuit. TP+ is sent to the pulse stretching circuit through the pulse opening and blocking circuit. The trigger pulse generation circuit is shown in Figure 10. In the figure, D0-D11 are the binary values transmitted by the 12-bit counter, Phase0-Phase11 are the binary values of the thyristor control angle output by the DSP, and Phase0-Phase3 are connected to the analog input pins of the
触发脉冲生成电路输出为一窄脉冲,不足以触发晶闸管和晶体管,所以需要脉冲展宽电路进行展宽。本发明利用NE555P单稳电路将TP+脉冲进行展宽,展宽电路如图11所示,窄脉冲经过555单稳电路被展宽成1ms宽的脉冲,然后用于对晶闸管的触发。The output of the trigger pulse generating circuit is a narrow pulse, which is not enough to trigger the thyristor and transistor, so a pulse stretching circuit is needed for stretching. The present invention uses the NE555P monostable circuit to widen the TP+ pulse. The widening circuit is shown in Figure 11. The narrow pulse is widened into a 1ms wide pulse through the 555 monostable circuit, and then used to trigger the thyristor.
高电位耦合取能电路主要作为晶闸管触发时的工作电源,考虑到如果从控制系统供电,电源很容易受到干扰,所以本发明采用从高电位直接取能的方式。The high-potential coupling energy harvesting circuit is mainly used as the working power supply when the thyristor is triggered. Considering that if the power is supplied from the control system, the power supply is easily disturbed, so the present invention adopts the method of directly harvesting energy from the high potential.
电源模块的主要功能是给整个系统提供所需的各种类型的电压。本发明中主要包括+3.3V、+1.8V、+5V、±12V器件,电源模块的原理图如图12所示。电源模块的输入是交流电220V,通过AC/DC模块后得到+24V直流电源,然后通过DC/DC模块,转换成+5V,±15V的直流电源。+5V电源经过TI公司的电源转换芯片TPS767D318转换成+3.3V和+1.8V的电源分别给DSP芯片内核与I/O口提供工作电压。The main function of the power module is to provide various types of voltages required by the entire system. The present invention mainly includes +3.3V, +1.8V, +5V, ±12V devices, and the schematic diagram of the power module is shown in FIG. 12 . The input of the power module is AC 220V, and +24V DC power is obtained after passing through the AC/DC module, and then converted into +5V, ±15V DC power through the DC/DC module. The +5V power supply is converted into +3.3V and +1.8V power supplies by TI's power conversion chip TPS767D318 to provide working voltages for the DSP chip core and I/O ports respectively.
所述的信息反馈及显示模块主要包括80C196单片机,液晶显示模块,外接主控人机接口模块即外接键盘输入和上位机控制部分。信息反馈及显示模块的具体连接是:晶闸管控制电抗器组和有源电力滤波器的输出端连接高电位板的输入端,高电位板的输出端连接回报板的输入端,回报板的输出端连接信息显示模块;信息显示模块通过双口RAM和DSP采样模块之间进行相互通信。The information feedback and display module mainly includes an 80C196 single-chip microcomputer, a liquid crystal display module, an external main control human-machine interface module, that is, an external keyboard input and upper computer control part. The specific connection of the information feedback and display module is: the output end of the thyristor control reactor group and the active power filter is connected to the input end of the high potential board, the output end of the high potential board is connected to the input end of the return board, and the output end of the return board Connect the information display module; the information display module communicates with the DSP sampling module through the dual-port RAM.
本实施例中,控制报警信号在光电转换和编码模块中进行转换和编码之后送到80C196进行处理。80C196通过继电器控制FC的投切,控制键盘和液晶模块进行手动控制,控制上位机通信进行上位机监控。80C196单片机和DSP通过双口RAM进行数据通信。In this embodiment, the control alarm signal is converted and encoded in the photoelectric conversion and encoding module, and then sent to 80C196 for processing. 80C196 controls the switching of FC through the relay, controls the keyboard and LCD module for manual control, and controls the communication of the upper computer for monitoring of the upper computer. 80C196 single-chip microcomputer and DSP carry on data communication through dual-port RAM.
信息反馈及显示模块的功能是:单片机协助DSP完成接口处理,通过键盘输入控制参数并将控制参数存储到双口RAM,DSP读取的电压、电流和功率因数在液晶上显示,和上位机进行通信。The functions of the information feedback and display module are: the single-chip microcomputer assists the DSP to complete the interface processing, input the control parameters through the keyboard and store the control parameters in the dual-port RAM, the voltage, current and power factor read by the DSP are displayed on the LCD, and communicate with the host computer. communication.
根据本发明的整体设计,单片机部分主要完成的是电路系统中电压电流信号的采集、键盘和液晶的显示、各种数字量的输入及单片机与DSP和上位机的通信。本发明中单片机系统主要是采集系统中的三相电压和电流信号及TCR中的三相电流信号供上位机进行显示,接受来自DSP的回报信号进行报警和跳闸等处理。主控系统的DSP与显示单片机采用双口RAM通信方式,选用CY7C133芯片,该芯片是高速2Kb×16的CMOS双端口SRAM,具有两套相互独立、完全对称的地址总线、数据总线和控制总线,采用68脚PLCC封装形式,最大访问时间为25/35/55ns。CY7C133与80C196KC的连接如图13所示,图中U10所示是CY7C133和单片机连接的右边端口,CY7C133的芯片放在DSP数据处理板上,通过一条34针扁平电缆将单片机主板与DSP数据处理板连接起来。DPRAMCE是CPLD译码后的给双口RAM的选通信号,低电平有效。利用单片机的读信号RD完成了对双口RAM的读写仲裁逻辑忙信号DPRBUSY与80C196KC的P1.2口连接。在向双口RAM写数据之前,通过检测忙信号DPRBUSY电平的高低,即可避免同时写或在DSP读的时候写同一地址单元,从而避免发生错误。CY7C133的2、4、6、8、10、12、14、16号引脚与U1号SN74LS245N芯片的17、15、13、11和U5号SN74LS245N芯片的17、15、13、11号引脚相连,CY7C133的1、3、5、7、9、11、13、15号引脚与U1号SN74LS245N芯片的18、16、14、12号引脚和U5号SN74LS245N芯片的18、16、14、12号引脚相连,CY7C133芯片的18、20号引脚与单片机的40、61号引脚相连,单片机的60、59、58、57、56、55、54、53号引脚与U1号SN74LS245N芯片的2、3、4、5号引脚和U5号SN74LS245N芯片的6、7、8、9号引脚相连,单片机的61号引脚还与CY7C133芯片的32号引脚相连,实现DSP与单片机的通信。According to the overall design of the present invention, what the single-chip microcomputer mainly completes is the collection of voltage and current signals in the circuit system, the display of the keyboard and liquid crystal, the input of various digital quantities, and the communication between the single-chip microcomputer and the DSP and the upper computer. The single-chip microcomputer system in the present invention mainly collects the three-phase voltage and current signals in the system and the three-phase current signals in the TCR for display by the host computer, and receives the return signal from the DSP for alarming and tripping. The DSP of the main control system and the display single-chip computer adopt the dual-port RAM communication mode, and the CY7C133 chip is selected. This chip is a high-speed 2Kb×16 CMOS dual-port SRAM, and has two independent and completely symmetrical address buses, data buses and control buses. It adopts 68-pin PLCC package, and the maximum access time is 25/35/55ns. The connection between CY7C133 and 80C196KC is shown in Figure 13. U10 in the figure is the right port where CY7C133 is connected to the single-chip microcomputer. The chip of CY7C133 is placed on the DSP data processing board, and the single-chip main board and the DSP data processing board are connected through a 34-pin flat cable. connect them. DPRAMCE is the strobe signal for dual-port RAM after decoding by CPLD, and it is active at low level. Utilize the read signal RD of the one-chip computer to complete the connection between the read and write arbitration logic busy signal DPRBUSY of the dual-port RAM and the P1.2 port of 80C196KC. Before writing data to the dual-port RAM, by detecting the level of the busy signal DPRBUSY, you can avoid writing at the same time or writing the same address unit when the DSP reads, thereby avoiding errors.
显示单片机与上位机采用串口通信,连接原理图如图14所示,80C196KC内置一个串行I/O口,可以很方便的用来与上位机进行通信。由于一般PC的串口是RS-232电平,而80C196KC是TTL电平,所以需要进行通信电平转换。本发明中采用MAX232,MAX232是最常用的RS-232电平到TTL电平的转换芯片,其内部有电压倍增和转换电路,只要单一的+5V电源就可以实现TTL电平与RS-232电平转换,使用十分方便。It shows that the single-chip microcomputer and the upper computer adopt serial port communication, and the connection schematic diagram is shown in Figure 14. 80C196KC has a built-in serial I/O port, which can be conveniently used to communicate with the upper computer. Since the serial port of a general PC is at the RS-232 level, but the 80C196KC is at the TTL level, communication level conversion is required. In the present invention, MAX232 is used. MAX232 is the most commonly used conversion chip from RS-232 level to TTL level. It has voltage multiplication and conversion circuits inside. As long as a single +5V power supply can realize TTL level and RS-232 level Flat conversion, very convenient to use.
主控人机接口模块采用4×5的矩阵键盘来做系统输入设备,采用CM320240-10型号液晶来做系统输出设备。为了实际安装方便,矩阵键盘采用薄膜键盘的形式,而液晶用螺钉跟键盘固定在一个金属面板上,4×5的矩阵键盘连接原理图如图15所示。82C79接口芯片的数字量输入端12、13、14、15、16、17、18和19引脚连接SN74LS245N芯片的18、17、16、15、14、13、12和11号引脚,82C79接口芯片的32、33、34号引脚连接SN74LS138N芯片1、2、3号引脚,进行模拟量的输出;MC74HC74AN触发器的输出端5号引脚连接82C79接口芯片的3号引脚。SN74LS245N芯片的KCS是由CPLD根据82C79分配的地址给出的片选信号,当MCU进行键盘底层扫描时74LS245被选通。74LS245的数据传递方向控制引脚DIR在芯片片选信号有效时,根据引脚电平的高低来决定数据传递方向。The main control man-machine interface module uses a 4×5 matrix keyboard as the system input device, and uses CM320240-10 type LCD as the system output device. For the convenience of actual installation, the matrix keyboard adopts the form of a membrane keyboard, and the LCD is fixed on a metal panel with screws and the keyboard. The schematic diagram of the 4×5 matrix keyboard connection is shown in Figure 15. The
本发明液晶显示模块采用CM320240-10,是一个中英文文字与绘图模式的点阵液晶显示模块,内建12Kb的ROM字型码,可以显示中文字型、数字符号、英日欧文等字母,并且内建双层图层的显示内存。在文字模式中,可接收标准中文文字内码直接显示中文,而不需要进入绘图模式以绘图方式描绘中文,可以节省许多MCU时间,从而提高液晶显示中文的处理效率。液晶与80C196KC的接线如图16所示,CM320240-10的lcdrs、lcdwr、lcdrd以及lcdcs1这4根控制线通过总线锁存器74LS245与MCU的4个高速输出口(HSO0-HSO3)连接,由高速输出口HSO来对它进行控制。The liquid crystal display module of the present invention adopts CM320240-10, which is a dot-matrix liquid crystal display module of Chinese and English characters and drawing mode, and has a built-in 12Kb ROM font code, which can display letters such as Chinese fonts, numeral symbols, English, Japanese and European, and Built-in dual layer display memory. In the text mode, it can receive the standard Chinese text internal code and display Chinese directly, without entering the drawing mode to draw Chinese, which can save a lot of MCU time, thereby improving the processing efficiency of the liquid crystal display Chinese. The connection between LCD and 80C196KC is shown in Figure 16. The four control lines lcdrs, lcdwr, lcdrd and lcdcs1 of CM320240-10 are connected to four high-speed output ports (HSO0-HSO3) of MCU through bus latch 74LS245. Output port HSO to control it.
一种有谐波抑制功能的分散式发电无功补偿装置进行谐波抑制的控制方法,具体按如下步骤进行:A control method for harmonic suppression of a distributed power generation reactive power compensation device with a harmonic suppression function, specifically as follows:
1、步骤一:采样模块采集分散式发电系统的三相电压瞬时值ua,ub,uc,三相电流瞬时值ia,ib,ic;1. Step 1: The sampling module collects the instantaneous three-phase voltage u a , u b , u c and the instantaneous three-phase current i a , i b , ic of the distributed power generation system;
2、步骤二:晶闸管控制角的计算:首先采用锁相技术进行三相交流电的测量(包括电压、电流和频率),然后根据三相补偿电纳和电压电流采样值的数学模型进行晶闸管控制角的运算,再输出晶闸管控制角,在之后的回馈部分中,光电转换电路实现晶闸管触发信号的输出和状态回报信号的接收。2. Step 2: Calculation of the control angle of the thyristor: First, the phase-locked technology is used to measure the three-phase alternating current (including voltage, current and frequency), and then the control angle of the thyristor is calculated according to the mathematical model of the three-phase compensation susceptance and the sampling value of voltage and current. Then output the thyristor control angle. In the subsequent feedback part, the photoelectric conversion circuit realizes the output of the thyristor trigger signal and the reception of the status return signal.
3、步骤三:生成触发脉冲:首先系统电压进行过零检测,累加器设置为上升沿复位,这样过零检测的电压上升沿脉冲则可以是累加器复位,累加到下一次上升的时候形成一个锯齿波,将DSP所计算出来的晶闸管触发角度与此锯齿波进行比较,当晶闸管的触发角度大于累加器的累加值时触发一个上升沿脉冲直到累加器复位,这样就得到一个宽幅脉冲;由于得到的脉冲过宽,所以采用同样的方式对所得到宽频脉冲与二次累加器进行比较,则可以得到一个足以触发晶闸管的窄脉冲信号;3. Step 3: Generating a trigger pulse: First, the system voltage performs zero-crossing detection, and the accumulator is set to reset on the rising edge, so that the rising edge pulse of the zero-crossing detection voltage can reset the accumulator, and when accumulated to the next rise, a Sawtooth wave, compare the trigger angle of the thyristor calculated by DSP with this sawtooth wave, when the trigger angle of the thyristor is greater than the accumulated value of the accumulator, a rising edge pulse is triggered until the accumulator is reset, so that a wide pulse is obtained; because The obtained pulse is too wide, so by comparing the obtained wide-frequency pulse with the secondary accumulator in the same way, a narrow pulse signal sufficient to trigger the thyristor can be obtained;
4、步骤四:控制无功补偿器晶闸管和有源电力滤波器晶体管的通断,对分散式发电系统进行无功补偿和谐波抑制。4. Step 4: Control the on-off of the thyristor of the reactive power compensator and the transistor of the active power filter, and perform reactive power compensation and harmonic suppression on the distributed power generation system.
所述的无源滤波器组由三组LC并联支路组成,每个支路由三组串联的LC支路并联组成,每组支路再串联一个滤波电容,安装在有源滤波器的输出接点处,这样可以降低节点的谐波电压,能抑制谐波电流注入电力系统中,更能起到为整个系统提供足够过容补偿的作用。The passive filter bank is composed of three groups of LC parallel branches, each branch is composed of three groups of LC branches in series, and each group of branches is connected in series with a filter capacitor, which is installed at the output contact of the active filter In this way, the harmonic voltage of the node can be reduced, the injection of harmonic current into the power system can be suppressed, and it can also provide sufficient overcapacity compensation for the entire system.
其中,步骤二中所述的三相交流电的测量步骤如下:Wherein, the measurement steps of the three-phase alternating current described in step two are as follows:
步骤1:首先令电网电压为Step 1: First let the grid voltage be
式中ua,ub,uc为三相电压瞬时值,E1n代表正序电压有效值,E2n代表负序电压有效值,ω为角频率,θ2n为负序初相角;In the formula, u a , u b , u c are instantaneous values of three-phase voltage, E 1n represents positive sequence voltage effective value, E 2n represents negative sequence voltage effective value, ω is angular frequency, θ 2n is negative sequence initial phase angle;
步骤2:对上式中三相电压进行abc三相到α-β两相坐标的变换可得如下,Step 2: Transform the abc three-phase to α-β two-phase coordinates of the three-phase voltage in the above formula to obtain the following,
uα和uβ为α-β坐标下对应的两相电压值,c32为从abc三相到α-β两相的转换矩阵;u α and u β are the corresponding two-phase voltage values under the α-β coordinates, and c 32 is the conversion matrix from abc three-phase to α-β two-phase;
步骤3:由上式和矩阵csc得到以下矩阵,Step 3: Obtain the following matrix from the above formula and matrix c sc ,
上式中In the above formula
sin(ωt+θ)和cos(ωt+θ)是由标准正弦工频信号发生器产生的信号,θ为任意初相角。sin(ωt+θ) and cos(ωt+θ) are signals generated by a standard sinusoidal power frequency signal generator, and θ is any initial phase angle.
步骤4:从上式中提取直流分量,可以得到以下Step 4: Extracting the DC component from the above formula, the following can be obtained
则变换后的电压为Then the transformed voltage is
usf,ucf为转换后的两相电压值,Es,Ec为提取的直流分量,csc -1为转换矩阵的逆矩阵;u sf , u cf are the converted two-phase voltage values, E s , E c are the extracted DC components, and c sc -1 is the inverse matrix of the conversion matrix;
步骤5:由变换后相电压usf,ucf和电流iα,iβ计算p,q分量,计算公式如下Step 5: Calculate the p and q components from the transformed phase voltage u sf , u cf and current i α , i β , the calculation formula is as follows
步骤6:计算检测电流:p分量经过RBF神经网络算法得到相应的交流分量,q分量经过反相算法处理后得到相应的负直流分量,再经过转换得到α-β两相检测电流,具体公式如下Step 6: Calculate the detection current: the p component is subjected to the RBF neural network algorithm to obtain the corresponding AC component, and the q component is processed by the inversion algorithm to obtain the corresponding negative DC component, and then converted to obtain the α-β two-phase detection current. The specific formula is as follows
为p分量对应的交流分量,由iα和iβ经过转换矩阵即可得到瞬时无功检测电流ia,ib,ic,具体公式如下 is the AC component corresponding to the p component, the instantaneous reactive power detection current i a , i b , i c can be obtained from i α and i β through the conversion matrix, and the specific formula is as follows
步骤7:根据所检测电流计算晶闸管的触发角α;Step 7: Calculate the firing angle α of the thyristor according to the detected current;
晶闸管正常运行时,系统中基波电流为:When the thyristor is in normal operation, the fundamental current in the system is:
基波电流I的下标1表示一次谐波,即为基波;XL是电抗,XL=ωL;Um是电压峰值;由此即可算得触发角度。The
步骤二中晶闸管控制角的计算步骤如下:The calculation steps of the thyristor control angle in
步骤1:计算补偿导纳,具体如下:Step 1: Calculate the compensated admittance as follows:
任意三相负载都可以变换成三角形连接,各相负载导纳由实部(电导)和虚部(电纳)组成。设三相不平衡负载为Any three-phase load can be transformed into a delta connection, and the load admittance of each phase is composed of a real part (conductance) and an imaginary part (susceptance). Let the three-phase unbalanced load be
Yl,ab、Yl,bc、Yl,ca为三相负荷导纳,Yl,ab表示a、b相之间的负载导纳,Yl,bc表示b、c相之间的负载导纳,Yl,ca表示c、a相之间的负载导纳;Gl,ab、Gl,bc、Gl,ca,为三相负荷电导,Gl,ab为a、b相之间的电导,Gl,bc为b、c相之间的电导,Gl,ca为c、a相之间的电导;Bl,ab为a、b相之间的电纳,Bl,bc为b、c相之间的电纳,Bl,ca为c、a相之间的电纳;Y l,ab , Y l,bc , Y l,ca are the three-phase load admittance, Y l,ab represent the load admittance between phase a and b, Y l,bc represent the load between phase b and c Admittance, Y l,ca represents the load admittance between phase c and a; G l,ab , G l,bc , G l,ca are the three-phase load conductance, G l,ab is the load admittance between phase a and b G l, bc is the conductance between phase b and c, G l, ca is the conductance between phase c and a; B l, ab is the susceptance between phase a and b, B l, bc is the susceptance between phase b and c, B l,ca is the susceptance between phase c and a;
根据斯坦门茨(C.P.Steinmetz)提出的平衡化原理,通过阻抗调节来实现三相不平衡负载的平衡化,具体由两步完成:According to the balancing principle proposed by C.P. Steinmetz, the balancing of the three-phase unbalanced load is realized through impedance adjustment, which is completed in two steps:
第一步是进行功率因数校正,在每一相负载上并联一个等于负载电纳负值的补偿电纳,使得负载变为纯阻性的,即令补偿电纳为The first step is to perform power factor correction. A compensation susceptance equal to the negative value of the load susceptance is connected in parallel to each phase load, so that the load becomes purely resistive, that is, the compensation susceptance is
这样,三相功率因数为1,但由于Gl,ab≠Gl,bc≠Gl,ca,所以补偿后的负载仍然是三相不平衡负载。In this way, the three-phase power factor is 1, but since G l,ab ≠G l,bc ≠G l,ca , the load after compensation is still a three-phase unbalanced load.
第二步是平衡三相纯电导,为了平衡Gl,ab,在b、c相间接入电容性电纳Br,bc=Gl,ab/,同时在c、a相间接入电感性电纳Br,ca=-Gl,ab/。同理,Gl,bc和Gl,ca可以用相同的办法加以平衡。The second step is to balance the three-phase pure conductance. In order to balance G l,ab , connect the capacitive susceptance B r,bc =G l,ab / , and connect the inductive susceptance B r,ca =-G l,ab / . Similarly, G l,bc and G l,ca can be balanced in the same way.
经过上述两步平衡化处理后,三相理想补偿网络总的补偿导纳为After the above two-step balancing process, the total compensation admittance of the three-phase ideal compensation network is
其中:Br,ab,Br,bc,Br,ca是SVC应该补偿的导纳。Where: B r,ab , B r,bc , B r,ca are the admittances that the SVC should compensate for.
在设计补偿器时,用上式作为控制基础是不方便的,因为负荷导纳实际是很难直接测量到的,所以需要推导出具有电压和电流的实用公式。下面用对称分量法分析负荷补偿,设正序三相平衡电压为:When designing a compensator, it is inconvenient to use the above formula as the control basis, because the load admittance is actually difficult to measure directly, so it is necessary to derive a practical formula with voltage and current. The following uses the symmetrical component method to analyze the load compensation, and assumes that the positive sequence three-phase balanced voltage is:
其中
线电压:Line voltage:
可求各相线电流为:The current of each phase line can be obtained as:
根据对称分量法,线电流的对称分量如下:According to the symmetrical component method, the symmetrical components of the line current are as follows:
式中分别是零序,正序,负序系统的参考相量,由以上两式得到不对称三相负载的线电流对称分量:In the formula They are the reference phasors of the zero-sequence, positive-sequence and negative-sequence systems respectively, and the line current symmetrical component of the asymmetrical three-phase load is obtained from the above two formulas:
补偿之后的负荷,如果其线电流的负序分量为零,将是平衡的,这就要求The load after compensation will be balanced if the negative sequence component of its line current is zero, which requires
如果使补偿后的负载功率因数为1,则需要正序线电流的虚部为零,则If the load power factor after compensation is 1, the imaginary part of the positive sequence line current needs to be zero, then
由以上各式可以解出用电压、电流表示的SVC的补偿导纳:The compensation admittance of SVC represented by voltage and current can be solved from the above formulas:
对上式进行适当变换,就可以得到用负荷电流和电压瞬时值来表示的补偿电纳:By properly transforming the above formula, the compensation susceptance expressed by the instantaneous value of load current and voltage can be obtained:
现在利用以下关系:Now utilize the following relationship:
这一表达式为无功功率在一个完整周期内的平均值。This expression is the average value of reactive power over a complete cycle.
根据
上式可以作为补偿器控制系统的基础,因为右边的所有数学运算都可以用电子电路来完成,尽管积分周期或平均周期都如上式取为一周,积分时间常数却无须严格等于T,对于某些使用场合(如电弧炉),它也许短得多。如果采用数字化的控制器,则后面的积分用求和表达式代替即可,其中N为一个积分周期内的采用点数,n为当前采样时刻,i为第i采样时刻,这样就得到了实用化的补偿电纳计算公式,The above formula can be used as the basis of the compensator control system, because all the mathematical operations on the right can be completed by electronic circuits. Although the integral period or average period is taken as one week as in the above formula, the integral time constant does not need to be strictly equal to T. For some For use (such as electric arc furnaces), it may be much shorter. If a digital controller is used, the subsequent integral can be replaced by a summation expression, where N is the number of points used in an integration period, n is the current sampling time, and i is the i-th sampling time, so that it can be practical Compensation susceptance calculation formula,
步骤2:计算晶闸管控制角,具体如下:Step 2: Calculate the thyristor control angle as follows:
步骤1中计算得到的补偿电纳和晶闸管导通角有如下关系,The compensation susceptance calculated in
BL(a)为晶闸管控制的电抗器电纳;XL为相控电抗器的电抗;a为晶闸管的触发延迟角;δ为晶闸管的导通角。通过计算公式可知,当触发延迟角a=90°时,晶闸管完全导通,就这样通过控制与相控电抗器连接的反并联的晶闸管对的移相触发脉冲来改变等效电纳的大小,从而达到输出可变的、连续的无功功率的目的。B L (a) is the susceptance of the reactor controlled by the thyristor; X L is the reactance of the phase-controlled reactor; a is the trigger delay angle of the thyristor; δ is the conduction angle of the thyristor. It can be seen from the calculation formula that when the trigger delay angle a=90°, the thyristor is fully turned on, and the equivalent susceptance is changed by controlling the phase-shift trigger pulse of the anti-parallel thyristor pair connected to the phase-controlled reactor. So as to achieve the purpose of outputting variable and continuous reactive power.
本发明中所述的A-T混合无功补偿单元中的无源滤波器组的整体优化算法流程如下:The overall optimization algorithm process of the passive filter bank in the A-T hybrid reactive power compensation unit described in the present invention is as follows:
步骤一:系统参数设定,主要包括系统无功补偿量,无源滤波器组的电压值和谐波限值等;系统无功补偿量为QSVC=Q1+Q2+...+Qh,系统谐波的电压和电流限制为Ih<IH,Uh<UH。Q1、Q2、Qh为各支路输出的无功功率;Ih为系统谐波电流,IH为系统谐波电流最大值;Uh为系统谐波电压,UH为系统谐波电压最大值。Step 1: System parameter setting, mainly including system reactive power compensation amount, voltage value of passive filter bank and harmonic limit value, etc.; system reactive power compensation amount is Q SVC =Q 1 +Q 2 +...+ Q h , the voltage and current limit of system harmonics are I h <I H , U h <U H . Q 1 , Q 2 , Q h are the reactive power output by each branch; I h is the system harmonic current, I H is the maximum value of the system harmonic current; U h is the system harmonic voltage, U H is the system harmonic voltage max.
步骤二:确定实际无源滤波器组所能提供的无功补偿量的总值Q,按各次谐波电流占总谐波电流的比值,分配无源滤波器组各支路的无功补偿量Qi;Step 2: Determine the total value Q of reactive power compensation that the actual passive filter bank can provide, and allocate the reactive power compensation of each branch of the passive filter bank according to the ratio of each harmonic current to the total harmonic current Quantity Q i ;
步骤三:按电压电流谐波畸变率与无源滤波器组并联谐振频率条件,修正无功量的分配;Step 3: Correct the distribution of reactive power according to the voltage and current harmonic distortion rate and the parallel resonance frequency of the passive filter bank;
电力系统总谐波畸变率为,滤波器组内、外谐振频率约束为fii [50h(1+δemn),50h(1+δemp)],fio [50h(1+δemn),50h(1+δemp)],式中U1为基波电压有效值;h为谐波次数,H为滤波器组数,δemn为负最大等效频率偏差,δemp为正最大等效频率偏差。The total harmonic distortion rate of the power system is , the inner and outer resonant frequencies of the filter bank are restricted to f ii [50h(1+δ emn ),50h(1+δ emp )], f io [50h(1+δ emn ),50h(1+δ emp )], where U 1 is the effective value of the fundamental voltage; h is the harmonic order, H is the number of filter groups, and δ emn is the negative maximum equivalent frequency Deviation, δ emp is the positive maximum equivalent frequency deviation.
本发明所采用的是工程应用中常见的方式,按照调谐谐波电流占总谐波∑Ih的比值分配各个支路滤波器输出的无功补偿量。The present invention adopts a common method in engineering application, and allocates the reactive power compensation output of each branch filter according to the ratio of the tuning harmonic current to the total harmonic ΣI h .
系统在理想情况下,通过傅立叶分析可以得到电流各次谐波分量的幅值与α的关系,如下式Under ideal conditions, the relationship between the amplitude of each harmonic component of the current and α can be obtained through Fourier analysis, as shown in the following formula
式中α为TCR晶闸管的触发角度,XL为电抗器的等效阻抗。Where α is the firing angle of the TCR thyristor, and X L is the equivalent impedance of the reactor.
步骤四:循环计算各支路滤波器的参数值,判断滤波器是否满足电压电流谐波畸变率与无源滤波器组内外并联谐振频率条件,如果满足条件,则再判断无源滤波器组的无功输出是否满足实际分散式发电无功补偿装置的无功补偿量,如果不满足条件就再重新修正谐波系数,返回修正无功量分配步骤,在无源滤波器组的无功输出满足实际分散式发电无功补偿装置的无功补偿量之后,就可以运行无源滤波器组进行无功输出和谐波抑制了。该步骤的整体优化算法流程如图17所示。Step 4: Circularly calculate the parameter values of each branch filter, and judge whether the filter satisfies the conditions of the voltage and current harmonic distortion rate and the internal and external parallel resonance frequency of the passive filter bank. If the conditions are met, then judge the passive filter bank Whether the reactive power output satisfies the reactive power compensation amount of the actual distributed power generation reactive power compensation device, if the condition is not satisfied, then re-correct the harmonic coefficient, return to the corrected reactive power distribution step, and the reactive power output of the passive filter bank satisfies After the reactive power compensation amount of the actual distributed power generation reactive power compensation device is obtained, the passive filter bank can be operated for reactive power output and harmonic suppression. The overall optimization algorithm flow of this step is shown in Figure 17.
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