CN103218476B - Method and circuit for transmitting data among modules in chip of integrated circuit by single-wire bus - Google Patents
Method and circuit for transmitting data among modules in chip of integrated circuit by single-wire bus Download PDFInfo
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- CN103218476B CN103218476B CN201310086093.XA CN201310086093A CN103218476B CN 103218476 B CN103218476 B CN 103218476B CN 201310086093 A CN201310086093 A CN 201310086093A CN 103218476 B CN103218476 B CN 103218476B
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Abstract
The invention relates to a method and a circuit for transmitting data among modules in a chip of an integrated circuit by a single-wire bus, and aims to solve the problems that the wiring resources are increased, the design flexibility is poor, and the manpower and material cost are increased because of transmitting the data among the modules in the chip of the conventional integrated circuit through a multi-wire bus. The method comprises the following steps of (1) performing Huffman coding on the data to be transmitted in the modules on the chip, and storing the coded data to a transmitting register; (2) transmitting the data in the transmitting register to an acquisition register through the single-wire bus; and (3) performing Huffman decoding on the data in the acquisition register, and extracting effective data for the module to receive data to use. The circuit mainly comprises a Huffman coder, the transmitting register, the acquisition register and a Huffman decoder. By the method and the circuit, least wiring resources are occupied; the transmission mode is flexible; the data can be transmitted and received at any time; a transmission protocol is simple; complex frame structure and packaging design are not required; and the circuit is simple in structure and easy to realize and has no special requirement on hardware.
Description
Technical field
The present invention relates to IC chip field and in particular between IC chip inner module single wire bus data pass
Transmission method and circuit.
Background technology
In the rear end layout design of integrated circuit, interconnection resource is of crucial importance and limited, and few cabling means to design
Motility and low manpower and materials cost.In the chip of existing integrated circuit, the data transfer between modules is by multi-thread total
Line transmission is realized, and multi-thread transmission will necessarily cause interconnection resource to increase, the very flexible of design, increased manpower and materials
This.
Content of the invention
It is an object of the invention to: provide a kind of minimum interconnection resource to realize IC chip internal circuit blocks
Between the method for data transfer and circuit, solve to carry out by multiwire bus between modules in the chip of existing integrated circuit
Data transfer causes interconnection resource to increase, the very flexible of design, increases the problem of manpower and materials cost.
The technical solution of the present invention is:
Single wire bus data transmission method between IC chip inner module, it is characterized in that, comprises the following steps:
(1) data to be sent in modules on chip is carried out huffman coding, deposit to transmitter register；
(2) data in transmitter register is transmitted to collection depositor by single bus；
(3) Hofmann decoding is carried out to the data in collection depositor, extracted valid data gives the module of data to be received
Use.
The inside modules having data to be sent on chip set up huffman encoder, the input of described huffman encoder
End is connected with the data buffer storage unit in this module, and the outfan of huffman encoder is connected with the input of transmitter register.
Above-mentioned transmitter register is arranged at the inside modules of data to be sent.
On chip, the inside modules of data to be received set up huffman decoder, the outfan of described huffman decoder
It is connected with the data buffer storage unit in this module, the input of huffman decoder is connected with the outfan of collection depositor.
Above-mentioned collection depositor is arranged at the inside modules of data to be received.
Single wire bus data transmission circuit between IC chip inner module, including transmitting terminal data buffer storage unit and reception
End data buffer unit, it is characterized in that, this circuit also includes huffman encoder and transmitter register, collection depositor
And huffman decoder；
The input of described huffman encoder is connected with transmitting terminal data buffer storage unit, the outfan of huffman encoder
It is connected with the input of transmitter register；The outfan of described huffman decoder is connected with receiving terminal data buffer storage unit, suddenly
The input of the graceful decoder of husband is connected with the outfan of collection depositor, passes through between described transmitter register and collection depositor
Single bus are attached.
The outfan of above-mentioned single bus connects one or is parallel with multiple collection depositors.
Above-mentioned huffman encoder and/or transmitter register are arranged in the module at transmitting terminal data buffer storage unit place.
Above-mentioned collection depositor and/or huffman decoder are arranged in the module at receiving terminal data buffer storage unit place.
It is an advantage of the current invention that:
1st, single bus take minimum interconnection resource；
2nd, transmission means flexibly, can send and receive data at any time；For example, the outgoing data of transmitting terminal can be taken and follow
Ring rolls or the mode such as be repeated several times is transmitted, and receiving terminal can obtain the information on single bus at any time；
3rd, host-host protocol is simple, and frame structure that need not be complicated and packing design, and circuit structure is simply easily realized, and hardware is no special
Different requirement.
Brief description
Fig. 1 is circuit structure diagram of the present invention.
Specific embodiment
Single wire bus data transmission method between IC chip inner module, comprises the following steps:
(1) data to be sent in modules on chip (is typically stored at the data buffer storage unit data in this module
In fifo) carry out huffman coding, huffman coding is realized by huffman encoder (huffman encoder), will encode
Data storage at transmitter register (tdff)；
(2) data storing in transmitter register (tdff) is by way of single bus are with bit stream (bit-stream)
Send in the collection depositor (rdff) to the module of data to be received, in bit stream, have the feature of huffman coding, Hough
Graceful decoder (huffman decoder) carries out Hofmann decoding to the data receiving, according to the feature of huffman coding, by
Huffman decoder judges the data content of the initial of data or end position and bit stream, is stored in after extracted valid data
Data buffer storage unit data fifo in the module of this data to be received.
The data that same transmitter register sends can be transferred into one or more and be connected on same single bus
Collection depositor it is ensured that transmitter register clock frequency be equal to each collection depositor clock frequency.
Single wire bus data transmission circuit between IC chip inner module, including transmitting terminal data buffer storage unit and reception
End data buffer unit, also includes the huffman encoder that is arranged in the module of transmitting terminal data buffer storage unit place and transmission is posted
Storage, and it is arranged on the collection depositor in the module of receiving terminal data buffer storage unit place and huffman decoder；
The input of huffman encoder is connected with transmitting terminal data buffer storage unit, the input of transmitter register and Hough
The outfan of graceful encoder connects；The outfan of described huffman decoder is connected with receiving terminal data buffer storage unit, and collection is posted
The outfan of storage is connected with the input of huffman decoder, passes through single line between described transmitter register and collection depositor
Bus is attached.
The outfan of single bus can connect one or multiple collection depositor in parallel it is ensured that each of single bus is defeated
The clock frequency going out end is equal to the clock frequency of input.
The method of the present invention and structure may apply on various IC chips data transfer between circuit module.
Claims (4)
1. between IC chip inner module single wire bus data transmission method it is characterised in that: comprise the following steps:
(1) inside modules of data to be sent are had to set up huffman encoder and transmitter register on chip, by mould on chip
Data to be sent in block carries out huffman coding, deposits to transmitter register；
The input of described huffman encoder is connected with the data buffer storage unit in this module, the outfan of huffman encoder
It is connected with the input of transmitter register；The inside modules setting collection depositor and suddenly being located in receiving terminal data buffer storage unit
The graceful decoder of husband；
(2) data in transmitter register is transmitted to collection depositor by single bus；
(3) Hofmann decoding is carried out to the data in collection depositor, extracted valid data uses to the module of data to be received.
2. between IC chip inner module single wire bus data transmission method it is characterised in that: comprise the following steps:
(1) inside modules of data to be sent are had to set up huffman encoder and transmitter register on chip, by mould on chip
Data to be sent in block carries out huffman coding, deposits to transmitter register；The mould being located in receiving terminal data buffer storage unit
Setting collection depositor and huffman decoder inside block, the outfan of described huffman decoder is delayed with the data in this module
Memory cell connects, and the input of huffman decoder is connected with the outfan of collection depositor；
(2) data in transmitter register is transmitted to collection depositor by single bus；
(3) Hofmann decoding is carried out to the data in collection depositor, extracted valid data uses to the module of data to be received.
3. single wire bus data transmission circuit between IC chip inner module, including transmitting terminal data buffer storage unit and receiving terminal
Data buffer storage unit it is characterised in that: have the inside modules of data to be sent to set up huffman encoder and transmission on chip
Depositor, the inside modules setting being located in receiving terminal data buffer storage unit gathers depositor and huffman decoder；
The input of described huffman encoder is connected with transmitting terminal data buffer storage unit, the outfan of huffman encoder with send out
The input sending depositor connects；The outfan of described huffman decoder is connected with receiving terminal data buffer storage unit, Huffman
The input of decoder is connected with the outfan of collection depositor, passes through single line between described transmitter register and collection depositor
Bus is attached.
4. between IC chip inner module according to claim 3 single wire bus data transmission circuit it is characterised in that:
The outfan of described single bus connects one or is parallel with multiple collection depositors.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310086093.XA CN103218476B (en) | 2013-03-18 | 2013-03-18 | Method and circuit for transmitting data among modules in chip of integrated circuit by single-wire bus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310086093.XA CN103218476B (en) | 2013-03-18 | 2013-03-18 | Method and circuit for transmitting data among modules in chip of integrated circuit by single-wire bus |
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| Publication Number | Publication Date |
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| CN103218476A CN103218476A (en) | 2013-07-24 |
| CN103218476B true CN103218476B (en) | 2017-02-01 |
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| CN201310086093.XA Active CN103218476B (en) | 2013-03-18 | 2013-03-18 | Method and circuit for transmitting data among modules in chip of integrated circuit by single-wire bus |
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| FR3026073B1 (en) | 2014-09-18 | 2016-11-25 | Continental Automotive France | ACTUATOR / SENSOR DEVICE |
Citations (5)
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|---|---|---|---|---|
| CN85108581A (en) * | 1984-11-02 | 1986-04-10 | 株式会社理光 | Facsimile equipment |
| US6604159B1 (en) * | 1999-08-12 | 2003-08-05 | Mips Technologies, Inc. | Data release to reduce latency in on-chip system bus |
| CN1614580A (en) * | 2004-11-26 | 2005-05-11 | 上海广电（集团）有限公司中央研究院 | Low-speed bus structure and its data transmission |
| CN101958936A (en) * | 2010-09-21 | 2011-01-26 | 四川长虹电器股份有限公司 | Digital interface-based data transmission system and method |
| CN203149574U (en) * | 2013-03-18 | 2013-08-21 | 西安华芯半导体有限公司 | One-wire bus data transmission circuit among modules in integrated circuit chip |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101834704B (en) * | 2010-03-09 | 2013-01-23 | 西安电子科技大学 | High performance anti-crosstalk space-time bus coding and decoding method and coding and decoding device thereof |
| EP2461485B1 (en) * | 2010-12-01 | 2013-07-31 | Dialog Semiconductor GmbH | A device and method for the transmission and reception of high-fidelity audio using a single wire |
-
2013
- 2013-03-18 CN CN201310086093.XA patent/CN103218476B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN85108581A (en) * | 1984-11-02 | 1986-04-10 | 株式会社理光 | Facsimile equipment |
| US6604159B1 (en) * | 1999-08-12 | 2003-08-05 | Mips Technologies, Inc. | Data release to reduce latency in on-chip system bus |
| CN1614580A (en) * | 2004-11-26 | 2005-05-11 | 上海广电（集团）有限公司中央研究院 | Low-speed bus structure and its data transmission |
| CN101958936A (en) * | 2010-09-21 | 2011-01-26 | 四川长虹电器股份有限公司 | Digital interface-based data transmission system and method |
| CN203149574U (en) * | 2013-03-18 | 2013-08-21 | 西安华芯半导体有限公司 | One-wire bus data transmission circuit among modules in integrated circuit chip |
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| CN103218476A (en) | 2013-07-24 |
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Address after: 710055 Shaanxi City, Xi'an province high tech Road No. 38, innovation center, A, block, floor 4 Applicant after: XI'AN UNIIC SEMICONDUCTORS Co.,Ltd. Address before: 710055 Shaanxi City, Xi'an province high tech Road No. 38, innovation center, A, block, floor 4 Applicant before: Xi'an Sinochip Semiconductors Co., Ltd. |
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