CN103200331B - Terminal device - Google Patents
Terminal device Download PDFInfo
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- CN103200331B CN103200331B CN201310132508.2A CN201310132508A CN103200331B CN 103200331 B CN103200331 B CN 103200331B CN 201310132508 A CN201310132508 A CN 201310132508A CN 103200331 B CN103200331 B CN 103200331B
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- interface
- application processor
- internal memory
- module
- base band
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- 230000003993 interaction Effects 0.000 claims abstract description 14
- 230000002708 enhancing effect Effects 0.000 claims description 22
- 230000005540 biological transmission Effects 0.000 claims description 4
- 238000013500 data storage Methods 0.000 abstract description 3
- 238000000034 method Methods 0.000 description 4
- 238000005728 strengthening Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- 230000008901 benefit Effects 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
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Abstract
The invention provides a terminal device which comprises an application processor, a base band and an internal storage, wherein the base band is connected with the application processor, the internal storage is connected with the application processor, and the internal storage is used for storing data in the application processor, the internal storage. The application processor comprises an enhance interface module and an access interface, wherein the access interface is used for enabling the base band to access the internal storage. According to the terminal device, the enhance interface module is arranged on the application processor, the base band can access an exclusive internal storage of the application processor through the enhance interface module to conduct data storage, and another exclusive internal storage does not need to be configured for the base band additionally. In addition, the base band can further achieve data interaction through the enhance interface module by means of the internal storage and the application processor, therefore the internal storage can further replace a double-interface Sram storage in the prior art, and cost of the terminal equipment can be reduced further.
Description
Technical field
The present invention relates to integrated circuit fields, a kind of terminal equipment is provided especially.
Background technology
3G mobile scheme generally includes two parts, base band and application processor, and base band is responsible for communication function, and application processor is responsible for other every application module, as audio frequency and video process, and the peripheral interfaces such as serial ports, data storage etc.
As shown in Figure 1, comprise respective external memorizer respectively in the base band of the mobile phone in existing technology and application processor to store for data, and base band is also connected with the static random access memory SRAM of double nip for carrying out data interaction between processor, expensive due to memory, therefore reduces costs, simplifies the trend that hardware configuration is development at present.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of terminal equipment, can save the exclusive internal memory of base band, and save for base band with application process the double nip Sram memory realizing data interaction.
For solving the problems of the technologies described above, embodiments of the invention provide a kind of terminal equipment to comprise: application processor, the base band be connected with described application processor, the internal memory be connected with described application processor; Wherein, described internal memory is for preserving the data in described application processor; Described application processor comprises:
Strengthen interface module, for the access interface providing described base band to access described internal memory.
Wherein, described base band carries out reading and writing data especially by described enhancing interface module and described internal memory, and by described enhancing interface module, internal memory, carries out data interaction with described application processor.
Wherein, the terminal equipment of the present embodiment also comprises:
The total module of interface;
Wherein, described enhancing interface module is by the total module of described interface and described Memory linkage.
Wherein, described application processor specifically comprises a CPU, and it is by the total module of described interface and described Memory linkage, thus enables described CPU by the total module of described interface, utilizes described internal memory to carry out reading and writing data.
Wherein, the total module of described interface comprises: the first main interface and from interface; Described enhancing interface module comprises: read-write main interface;
Wherein, described first main interface is respectively with described read-write main interface and to be describedly connected from interface, and described from interface and described Memory linkage, thus make described base band by described read-write main interface, the first main interface and from interface, utilize described internal memory to carry out reading and writing data.
Wherein, the total module of described interface also comprises: the second main interface, respectively with described CPU and be connected from interface, thus enables described CPU by described second main interface and described from interface, utilizes described internal memory to carry out reading and writing data.
Wherein, the total module of described interface also comprises: the 3rd main interface; Described enhancing interface module also comprises: mutual main interface; Wherein, described 3rd main interface is respectively with described mutual main interface and be connected from interface, thus enable described application processor and described base band by described mutual main interface, the 3rd main interface and describedly utilize described internal memory from interface, realize the data interaction with described application processor.
Wherein, described first main interface, the second main interface, the 3rd main interface all each other parallel transmission mode be connected from interface with described.
Wherein, the total module of described interface is particular by AXI protocol bus and described enhancing interface module, CPU, Memory linkage.
Wherein, there is in described internal memory the dedicated memory for described base band access.
Such scheme of the present invention has following beneficial effect:
The application processor of terminal equipment of the present invention is provided with an enhancing interface module, base band can be made to pass through to strengthen the exclusive internal memory of interface module access application processor, carry out data storage/reading, thus need not be the exclusive internal memory of base band additional configuration one again; In addition base band can also utilize internal memory and application processor to realize data interaction by strengthening interface module, makes described internal memory can also replace double nip SRAM memory of the prior art, thus reduces the cost of terminal equipment further.
Accompanying drawing explanation
Fig. 1 is the structural representation of terminal equipment of the prior art;
Fig. 2 is the structural representation of a kind of terminal equipment of the present invention;
Fig. 3 is the structural representation of the terminal equipment containing the total module of interface in the present invention;
Fig. 4 is the concrete structure schematic diagram of the terminal equipment containing the total module of interface in the present invention.
Embodiment
For making the technical problem to be solved in the present invention, technical scheme and advantage clearly, be described in detail below in conjunction with the accompanying drawings and the specific embodiments.
As shown in Figure 2, a kind of terminal equipment, comprising: application processor 1, the base band 2 be connected with described application processor 1, the internal memory 3 be connected with described application processor 1, wherein, described internal memory 3 is for preserving the data in described application processor 1, and described application processor 1 comprises:
Strengthen interface module 110, for the access interface providing described base band 2 to access described internal memory 3.
Above-mentioned terminal equipment be provided with an enhancing interface module 110 due to application processor 1, base band 2 can being made by strengthening the internal memory 3 of interface module 110 access application processor 1, carrying out reading and writing data, thus need not be the exclusive internal memory of base band 2 additional configuration one again; In addition base band 2 can also utilize internal memory 3 and application processor 1 to realize data interaction by strengthening interface module 110, makes described internal memory 3 can also replace double nip Sram memory of the prior art, thus reduces the cost of terminal equipment further.
Particularly, in the above embodiment of the present invention, described base band 2 carries out reading and writing data especially by described enhancing interface module 110 with described internal memory 3, and by described enhancing interface mould 110, internal memory 3, carries out data interaction with described application processor 1.
Particularly, as shown in Figure 3, in the above embodiment of the present invention, described enhancing interface module 110 comprises:
The total module 100 of interface;
Wherein, described enhancing interface module 110 is connected with described internal memory 3 by the total module of described interface 100.
Particularly, as shown in Figure 3, in above-mentioned example of the present invention, described application processor 1 specifically comprises a CPU12, it is connected with described internal memory 3 by the total module of described interface 100, thus enables described CPU12 by the total module 100 of described interface, utilizes described internal memory 3 to carry out reading and writing data.
Particularly, as shown in Figure 4, in above-mentioned example of the present invention, the total module 100 of described interface comprises: the first main interface 13(and Master Interface, port for being connected with originating end) and from interface 16(and Slave interface, for being connected with accessed end); Described enhancing interface module 110 comprises: read-write main interface 17(and Master Interface);
Wherein, described first main interface 13 is respectively with described read-write main interface 17 and to be describedly connected from interface 16, and to be describedly connected from interface 16 with described internal memory 3, thus make described base band 2 by described read-write main interface 17, first main interface 13 and from interface 16, utilize described internal memory 3 to carry out reading and writing data.
Particularly, as shown in Figure 4, in above-mentioned example of the present invention, the total module 100 of described interface also comprises: the second main interface 14(and Master Interface), be connected with described CPU12 and from interface 16 respectively, thus enable described CPU12 by described second main interface 14 and described from interface 16, utilize described internal memory 3 to carry out reading and writing data.
Particularly, as shown in Figure 4, in above-mentioned example of the present invention, the total module of described interface 100 also comprises: the 3rd main interface 15(and Master Interface) described enhancing interface module 110 also comprises: mutual main interface 18(and Master Interface); Wherein, described 3rd main interface 15 respectively with described mutual main interface 18 and be connected from interface 16, thus makes described base band 2 by described 3rd main interface 15 and describedly can realize the data interaction with described internal memory 3 from interface 16.
Particularly, as shown in Figure 4, in above-mentioned example of the present invention, described first main interface 13, second main interface 14, the 3rd main interface 15 all each other parallel transmission mode are connected from interface 16 with described.
Wherein, the total module of described interface 100 is particular by AXI(Advanced eXtensible Interface) protocol bus is connected with described enhancing interface module 110, CPU12, internal memory 3; Wherein, AXI protocol bus is the bus of a kind of high-performance, high bandwidth, low delay, is the preferred version of the present embodiment.
In addition, there is in described internal memory 3 dedicated memory accessed for described base band 2.
Below above-mentioned terminal equipment is described in detail:
As shown in Figure 4, this terminal equipment application processor 1 and base band 2 share an internal memory 3.Its concrete methods of realizing is:
Application processor 1 arranges an enhancing interface module 110, and base band 2 realizes 2 functions as the originating end of access by strengthening interface module 110: access memory 3 carries out reading and writing data, and utilizes internal memory 3 and application processor 1 to realize data interaction; The CPU12 of application processor 1 utilizes internal memory 3 to carry out reading and writing data as access originating end simultaneously.Therefore, total interface module 100 of a 3M1S can be set, wherein 3M1S represents containing 3 Master Interface (2 are connected with enhancing interface module 110, and 1 is connected with CPU12) for being connected with access end, an and Slave interface for being connected with accessed end (i.e. internal memory 3).As shown in Figure 4, the first main interface 13, second main interface 14, the 3rd main interface 15 all each other parallel transmission mode are connected from interface 16 with described the connected mode of its 3M1S, thus do not interfere with each other in transmitting procedure.Wherein, base band 2 is by reading and writing primary module 17, first main interface 13, carrying out reading and writing data from interface 16 access memory 3; By mutual primary module 18, the 3rd main interface 15, internal memory 3 and application processor is utilized to carry out data interaction from interface 16.The CPU12 of application processor 1 utilizes the second main interface 14, carries out reading and writing data from interface 16 access memory 3.
In sum, the present embodiment has the following advantages:
1. eliminate one specially for base band 2 provides the internal memory of use, significantly decrease the hardware cost of terminal equipment.
2. eliminate one specially for application processor 1 and base band 2 provide the double nip SRAM memory of data interaction, reduce the hardware cost of terminal equipment further.
The above is the preferred embodiment of the present invention; it should be pointed out that for those skilled in the art, under the prerequisite not departing from principle of the present invention; can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.
Claims (9)
1. a terminal equipment, comprising: application processor, the base band be connected with described application processor, the internal memory be connected with described application processor; Wherein, described internal memory, for preserving the data in described application processor, is characterized in that, described application processor comprises:
Strengthen interface module, for the access interface providing described base band to access described internal memory;
Described application processor and base band share described internal memory; Base band is accessed described internal memory by enhancing interface module and is carried out reading and writing data, and utilizes described internal memory and application processor to carry out data interaction;
Wherein, there is in described internal memory the dedicated memory for described base band access.
2. terminal equipment according to claim 1, is characterized in that, described application processor utilizes internal memory to carry out reading and writing data as access originating end.
3. terminal equipment according to claim 2, is characterized in that, also comprises:
The total module of interface;
Wherein, described enhancing interface module is by the total module of described interface and described Memory linkage.
4. terminal equipment according to claim 3, it is characterized in that, described application processor specifically comprises a CPU, and it is by the total module of described interface and described Memory linkage, thus enable described CPU by the total module of described interface, utilize described internal memory to carry out reading and writing data.
5. terminal equipment according to claim 4, is characterized in that, the total module of described interface comprises: the first main interface and from interface; Described enhancing interface module comprises: read-write main interface;
Wherein, described first main interface is respectively with described read-write main interface and to be describedly connected from interface, and described from interface and described Memory linkage, thus make described base band by described read-write main interface, the first main interface and from interface, utilize described internal memory to carry out reading and writing data.
6. terminal equipment according to claim 5, it is characterized in that, the total module of described interface also comprises: the second main interface, respectively with described CPU and be connected from interface, thus enable described CPU by described second main interface and described from interface, utilize described internal memory to carry out reading and writing data.
7. terminal equipment according to claim 6, is characterized in that, the total module of described interface also comprises: the 3rd main interface; Described enhancing interface module also comprises: mutual main interface; Wherein, described 3rd main interface is respectively with described mutual main interface and be connected from interface, thus enable described application processor and described base band by described mutual main interface, the 3rd main interface and describedly utilize described internal memory from interface, realize the data interaction with described application processor.
8. terminal equipment according to claim 7, is characterized in that,
Described first main interface, the second main interface, the 3rd main interface all each other parallel transmission mode are connected from interface with described.
9. terminal equipment according to claim 3, is characterized in that, the total module of described interface is particular by AXI protocol bus and described enhancing interface module, CPU, Memory linkage.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310132508.2A CN103200331B (en) | 2013-04-16 | 2013-04-16 | Terminal device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310132508.2A CN103200331B (en) | 2013-04-16 | 2013-04-16 | Terminal device |
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| CN103200331A CN103200331A (en) | 2013-07-10 |
| CN103200331B true CN103200331B (en) | 2015-04-15 |
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| CN201310132508.2A Expired - Fee Related CN103200331B (en) | 2013-04-16 | 2013-04-16 | Terminal device |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1949163A (en) * | 2006-11-30 | 2007-04-18 | 北京中星微电子有限公司 | Virtual FIFO internal storage realizing method and controlling device thereof |
| CN101312570A (en) * | 2007-05-21 | 2008-11-26 | 大唐移动通信设备有限公司 | Method and apparatus implementing terminal wake-up |
| CN101521960A (en) * | 2009-02-11 | 2009-09-02 | 北京中星微电子有限公司 | Communication method, device and system between baseband and coprocessor |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101026646A (en) * | 2006-02-24 | 2007-08-29 | 上海夏新电子开发有限公司 | Method and device for realizing voice mailbox function for hand holding device |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1949163A (en) * | 2006-11-30 | 2007-04-18 | 北京中星微电子有限公司 | Virtual FIFO internal storage realizing method and controlling device thereof |
| CN101312570A (en) * | 2007-05-21 | 2008-11-26 | 大唐移动通信设备有限公司 | Method and apparatus implementing terminal wake-up |
| CN101521960A (en) * | 2009-02-11 | 2009-09-02 | 北京中星微电子有限公司 | Communication method, device and system between baseband and coprocessor |
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