CN103186470B - Memory storage device, its memory controller, and data writing method - Google Patents

Abstract

The invention discloses a memory storage device, a memory controller and a data writing method thereof, wherein the memory storage device comprises a connector, a rewritable nonvolatile memory module, a second temporary storage memory and a memory controller with a first temporary storage memory. The memory controller is used for receiving the write-in command and the write-in data and temporarily storing the write-in data into the first temporary storage memory. The memory controller also copies the write-in data into the second temporary storage memory and writes the write-in data into the rewritable nonvolatile memory module according to the write-in command. In addition, the memory controller is further configured to determine whether a program error occurs during execution of the write command, and if the program error occurs, read write data from the second temporary memory and re-execute the write command. Therefore, the writing speed of the memory storage device can be effectively improved.

Description

Memory storage device, its memory controller, and data writing method

technical field

The invention relates to a memory storage device, in particular to a memory storage device, a memory controller and a data writing method capable of effectively increasing the writing speed.

Background technique

Digital cameras, mobile phones, and MP3 players have grown rapidly in recent years, making consumers' demand for storage media also increase rapidly. Because rewritable non-volatile memory (rewritable non-volatile memory) has the characteristics of data non-volatility, power saving, small size, no mechanical structure, and fast read and write speed, it is most suitable for portable electronic products, such as notebooks. computer. A solid state drive is a memory storage device that uses flash memory as a storage medium. Therefore, the flash memory industry has become a very popular part of the electronics industry in recent years.

If the memory storage device uses a rewritable volatile memory as the storage medium, when data is written into the rewritable volatile memory, a program error may occur in the rewritable volatile memory, making the data not successfully written enter. Therefore, at least one temporary storage device is usually configured in a memory storage device. The temporary storage can be used to temporarily store data to be written into the memory storage device. That is to say, each piece of data to be written into the memory storage device needs to be temporarily stored in the temporary storage first, and then the data to be written is written from the temporary storage to the rewritable volatile memory middle. Because for one piece of writing data, two operations of temporary storage and reading are required to the temporary storage memory. Therefore, when the transmission bandwidth of the scratchpad memory is not large enough, the bandwidth allocated to the write operation will be relatively small.

In addition, after the data is temporarily stored in the temporary memory, the control circuit of the memory storage device will send a message of completed command to the host to receive the next command and data. When writing data into the rewritable volatile memory, a program error (program fail) may occur, so that the data is not written successfully. Therefore, the control circuit of the memory storage device needs to rewrite (also referred to as rewriting) the successfully written data from the temporary storage to the rewritable volatile memory. Therefore, the temporary memory configured in the memory storage device must be large enough to temporarily store data, so as not to be overwritten.

Based on the above, in order to increase the writing speed, it is necessary to use a temporary memory with a larger bandwidth. However, in order to consider the above-mentioned rewriting requirements, a large-capacity scratch memory must be used. For scratch memory with a large bandwidth, the cost per storage unit is relatively high. Therefore, how to reduce the manufacturing cost while having a temporary storage memory with an appropriate capacity and an appropriate memory bandwidth is an issue that those skilled in the art are concerned about.

Contents of the invention

Embodiments of the present invention provide a memory storage device, its memory controller, and a data writing method, which can effectively increase the writing speed of the memory storage device.

An embodiment of the present invention provides a memory storage device, including a connector, a rewritable non-volatile memory module, a memory controller, and a second temporary storage memory. The connector is used to electrically connect to the host system. The memory controller is electrically connected to the connector and the rewritable non-volatile memory module, and has a first temporary storage memory, wherein the first temporary storage memory has a write-in data temporary storage area. The second temporary storage is electrically connected to the first temporary storage, wherein the transmission bandwidth of the second temporary storage is lower than the transmission bandwidth of the first temporary storage. The memory controller is used for receiving write data corresponding to a write command from the host system, and temporarily storing the write data in the write data temporary storage area. The memory controller is also used to copy the write data from the write data temporary storage area to the second temporary storage memory, and write the write data from the write data temporary storage area to the rewritable in the non-volatile memory module. In addition, the memory controller determines whether a program error occurs after writing the write data into the rewritable non-volatile memory module. If a program error occurs, the memory controller is also used to read the write data from the second temporary storage memory, and write the write data into the rewritable non-volatile memory module according to the write command.

In an embodiment of the present invention, the memory controller is further configured to receive a read command from the host system, and determine whether the second temporary memory stores read data corresponding to the read command. If the second temporary memory stores the read data corresponding to the read command, the memory controller reads the read data from the second temporary memory and transmits the read data to the host system in response to the above read instruction.

In an embodiment of the present invention, the above-mentioned second temporary storage memory is configured in the memory controller or configured outside the memory controller.

In an embodiment of the present invention, the first temporary storage memory is a static random access memory (static random access memory, SRAM).

In an embodiment of the present invention, the above-mentioned second temporary storage memory is a synchronous dynamic random access memory (synchronous dynamic random access memory, SDRAM).

In an embodiment of the present invention, the capacity of the second temporary storage is greater than that of the first temporary storage.

In an embodiment of the present invention, the capacity of the second temporary storage is 8 times that of the first temporary storage.

In an embodiment of the present invention, the transmission bandwidth of the second temporary storage is applied to a single operation program, and the transmission bandwidth of the first temporary storage can be shared among multiple operation programs at the same time.

From another perspective, an embodiment of the present invention provides a data writing method for a memory storage device. The memory storage device has a second temporary storage, a memory controller and a rewritable non-volatile memory module, wherein the first temporary storage is configured in the memory controller and the transmission bandwidth of the first temporary storage is greater than that of the second temporary storage. 2. The transmission bandwidth of the temporary memory. The data writing method includes receiving a write command and write data corresponding to the write command from the host system and temporarily storing the write data into a write data temporary storage area of the first temporary storage memory. The data writing method also includes copying the write data from the write data temporary storage area to the second temporary storage memory, and writing the write data from the write data temporary storage area to the rewritable in the non-volatile memory module. The writing method also includes: after writing the write data into the rewritable non-volatile memory module, judging whether a program error occurs; and, if a program error occurs, reading from the second temporary storage The write data is fetched and written into the rewritable non-volatile memory module according to the write command.

In an embodiment of the present invention, the above data writing method further includes: receiving a read command from the host system; judging whether the second temporary storage stores the read data for the read command; and if the second temporary storage If the read data corresponding to the read command is stored, the corresponding read data is read from the second temporary storage and sent to the host system to respond to the read command.

From another perspective, an embodiment of the present invention provides a memory controller for controlling a rewritable non-volatile memory module. The memory controller includes a host interface, a memory interface, a memory management circuit and a first temporary storage memory. The host interface is used to electrically connect to the host system. The memory interface is used to electrically connect to the rewritable non-volatile memory module. The memory management circuit is electrically connected to the host interface and the memory interface. The first temporary storage memory is electrically connected to the memory management circuit and has a write-in data temporary storage area. Wherein, the memory management circuit is used for receiving the write data corresponding to the write command from the host system, and temporarily storing the write data in the write data temporary storage area. The memory management circuit is also used for writing write data from the write data temporary storage area into the rewritable non-volatile memory module according to the write command. The memory management circuit is also used to copy the write data from the write data temporary storage area to the second temporary storage, wherein the transmission bandwidth of the first temporary storage is higher than the transmission bandwidth of the second temporary storage. The memory management circuit is also used to determine whether a program error occurs after writing the write data into the rewritable non-volatile memory module. If a program error occurs, the memory management circuit is also used to read the write data from the second temporary storage memory, and write the write data into the rewritable non-volatile memory module according to the write command.

In an embodiment of the present invention, the memory management circuit is further configured to receive a read command from the host system, and determine whether the second temporary memory stores read data corresponding to the read command. If the second temporary memory stores the read data corresponding to the read command, the memory management circuit reads the read data from the second temporary memory and transmits the read data to the host system to respond to the read command.

Based on the above, the memory storage device, writing method and memory controller proposed by the present invention can use the first temporary storage in the memory controller as a buffer, and the transmission bandwidth of the second temporary storage can be used as the write data. time transmission bandwidth. Therefore, the transmission bandwidth of the second temporary storage memory can be effectively used, thereby increasing the writing speed of the memory storage device.

In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail in conjunction with the accompanying drawings.

Description of drawings

FIG. 1A shows a host system and a memory storage device according to an exemplary embodiment.

FIG. 1B is a schematic diagram of a computer, an input/output device and a memory storage device according to an exemplary embodiment.

FIG. 1C is a schematic diagram of a host system and a memory storage device according to an exemplary embodiment.

FIG. 2 is a schematic block diagram illustrating the memory storage device shown in FIG. 1A .

FIG. 3 is a schematic block diagram of a memory controller according to an exemplary embodiment.

FIG. 4 is a block diagram of a memory storage device according to an exemplary embodiment.

FIG. 5 is a flow chart of a data writing method shown in an embodiment.

Explanation of main component symbols

1000: host system

1100: computer

1102: Microprocessor

1104: scratch memory

1106: Input/Output Device

1108: System bus

1110: data transmission interface

1202: mouse

1204: keyboard

1206: display

1208: Printer

1212: Pen drive

1214: memory card

1216: SSD

1310: Digital camera

1312: SD card

1314: MMC card

1316: memory stick

1318: CF card

1320: Embedded Storage

100: memory storage device

102: Connector

104: memory controller

106: Rewritable non-volatile memory module

108: Second scratch memory

202: memory management circuit

204: host interface

206: memory interface

208: First temporary storage

300: Write data temporary storage area

302: Write data

S502, S504, S506, S508, S510: the steps of the data writing method

detailed description

Generally speaking, a memory storage device (also called a memory storage system) includes a rewritable non-volatile memory module and a controller (also called a control circuit). Typically memory storage devices are used with a host system so that the host system can write data to or read data from the memory storage device.

FIG. 1A shows a host system and a memory storage device according to an exemplary embodiment.

Referring to FIG. 1A , the host system 1000 generally includes a computer 1100 and an input/output (I/O) device 1106 . The computer 1100 includes a microprocessor 1102 , a temporary memory (such as random access memory, RA) 1104 , a system bus 1108 and a data transmission interface 1110 . The input/output device 1106 includes a mouse 1202, a keyboard 1204, a display 1206 and a printer 1208 as shown in FIG. 1B. It must be understood that the device shown in FIG. 1B is not limited to the I/O device 1106, and the I/O device 1106 may also include other devices.

In an exemplary embodiment of the present invention, the memory storage device 100 is electrically connected to other components of the host system 1000 through the data transmission interface 1110 . Data can be written to or read from the memory storage device 100 by the operations of the microprocessor 1102 , the temporary memory 1104 and the input/output device 1106 . For example, the memory storage device 100 may be a rewritable non-volatile memory storage device such as a flash drive 1212 , a memory card 1214 or a solid state drive (Solid State Drive, SSD) 1216 as shown in FIG. 1B .

In general, the host system 1000 is any system that can substantially cooperate with the memory storage device 100 to store data. Although in this exemplary embodiment, the host system 1000 is illustrated as a computer system, however, in another exemplary embodiment of the present invention, the host system 1000 may be a digital camera, video camera, communication device, audio player or video player and other systems. For example, when the host system is a digital camera (video camera) 1310, the rewritable non-volatile memory storage device is the SD card 1312, MMC card 1314, memory stick (memorystick) 1316, CF card 1318 or embedded type storage device 1320 (as shown in FIG. 1C ). The embedded storage device 1320 includes an embedded multimedia card (EmbeddedMMC, eMMC). It is worth mentioning that the embedded multimedia card is directly electrically connected to the substrate of the host system.

FIG. 2 is a schematic block diagram illustrating the memory storage device shown in FIG. 1A .

Referring to FIG. 2 , the memory storage device 100 includes a connector 102 , a memory controller 104 , a rewritable non-volatile memory module 106 and a second temporary storage memory 108 .

In this exemplary embodiment, the connector 102 is compatible with the Serial Advanced Technology Attachment (SATA) standard. However, it must be understood that the present invention is not limited thereto, and the connector 102 may also be in accordance with the Parallel Advanced Technology Attachment (PATA) standard, the Institute of Electrical and Electronics Engineers (Institute of Electrical and Electronic Engineers, IEEE) 1394 standard, the high-speed peripheral component connection interface (Peripheral Component Interconnect Express , PCIExpress) standard, Universal Serial Bus (UniversalSerialBus, USB) standard, Secure Digital (SecureDigital, SD) interface standard, Memory Stick (MemoryStick, MS) interface standard, MultiMediaCard (MultiMediaCard, MMC) interface standard, small flash ( CompactFlash (CF) interface standard, Integrated Device Electronics (IDE) standard or other suitable standards.

The memory controller 104 is used to execute a plurality of logic gates or control instructions implemented in hardware or firmware, and write data in the rewritable non-volatile memory module 106 according to the instructions of the host system 1000, Read and erase operations.

The rewritable non-volatile memory module 106 is electrically connected to the memory controller 104 and used for storing data written by the host system 1000 . The rewritable non-volatile memory module 106 includes a plurality of physical blocks (not shown). In this exemplary embodiment, the rewritable non-volatile memory module 106 is a multi-level memory cell (MultiLevelCell, MLC) NAND flash memory module. However, the present invention is not limited thereto, and the rewritable non-volatile memory module 106 can also be a single-level memory cell (SingleLevelCell, SLC) NAND flash memory module, other flash memory modules or other memories with the same characteristics mod.

The second temporary storage memory 108 is configured outside the memory controller and electrically connected to the memory controller 104 . The second temporary storage memory 108 is used for temporarily storing instructions or data executed by the memory controller 104 . For example, the second temporary storage is used to back up the written data received from the host system 1000 . In this exemplary embodiment, the second temporary storage memory 108 is a synchronous dynamic random access memory (SDRAM) and the transmission bandwidth of the second temporary storage memory 108 is 400 Mbit/s. However, the present invention is not limited thereto, and the second temporary storage memory 108 may also be a dynamic random access memory (dynamic random access memory, DRAM), a static random access memory (static random access memory, SRAM), a magnetoresistive random access memory (Magnetoresistive Random Access Memory, MRAM) ), cache random access memory (CacheRAM), synchronous dynamic random access memory (synchronous dynamic random access memory, SDRAM), video random access memory (VideoRAM, VRAM), inverse OR gate flash memory (NORFlash), embedded dynamic random access memory access memory (embeddedDRAM, eDRAM) or other memory.

FIG. 3 is a schematic block diagram of a memory controller according to an exemplary embodiment.

Referring to FIG. 3 , the memory controller 104 includes a memory management circuit 202 , a host interface 204 , a memory interface 206 and a first temporary storage memory 208 .

The memory management circuit 202 is used to control the overall operation of the memory controller 104 . Specifically, the memory management circuit 202 has a plurality of control instructions, and when the memory storage device 100 is operating, these control instructions are executed to perform operations such as writing, reading, and erasing data.

In this exemplary embodiment, the control commands of the memory management circuit 202 are implemented in the form of firmware. For example, the memory management circuit 202 has a microprocessor unit (not shown) and a ROM (not shown), and these control instructions are burned into the ROM. When the memory storage device 100 is in operation, these control instructions are executed by the microprocessor unit to perform operations such as writing, reading, and erasing data.

In another exemplary embodiment of the present invention, the control command of the memory management circuit 202 can also be stored in a specific area of the rewritable non-volatile memory module 106 in the form of code (for example, the memory module is dedicated to storing system data system area). In addition, the memory management circuit 202 has a microprocessor unit (not shown), a read-only memory (not shown) and a temporary storage memory (not shown). In particular, the ROM has driver code, and when the memory controller 104 is enabled, the microprocessor unit will first execute the driver code segment to store the data stored in the rewritable non-volatile memory module 106 The control instructions are loaded into the temporary memory of the memory management circuit 202 . Afterwards, the microprocessor unit runs these control instructions to perform operations such as writing, reading and erasing data.

In addition, in another exemplary embodiment of the present invention, the control instructions of the memory management circuit 202 can also be implemented in a hardware form. For example, the memory management circuit 202 includes a microcontroller, a memory management unit, a memory writing unit, a memory reading unit, a memory erasing unit and a data processing unit. The memory management unit, the memory writing unit, the memory reading unit, the memory erasing unit and the data processing unit are electrically connected to the microcontroller. Wherein, the memory management unit is used to manage the physical block of the rewritable non-volatile memory module 106; the memory writing unit is used to issue a write command to the rewritable non-volatile memory module 106 to write data into the rewritable non-volatile memory module 106; the memory read unit is used to issue a read instruction to the rewritable non-volatile memory module 106 to read from the rewritable non-volatile memory module 106 Read data in; the memory erasing unit is used to issue erasing instructions to the rewritable non-volatile memory module 106 to erase data from the rewritable non-volatile memory module 106; and the data processing unit It is used for processing data to be written into the rewritable non-volatile memory module 106 and data read from the rewritable non-volatile memory module 106 .

The host interface 204 is electrically connected to the memory management circuit 202 and used for receiving and identifying commands and data transmitted by the host system 1000 . That is to say, the commands and data transmitted by the host system 1000 are transmitted to the memory management circuit 202 through the host interface 204 . In this exemplary embodiment, the host interface 204 is compatible with the SATA standard. However, it must be understood that the present invention is not limited thereto, and the host interface 204 can also be compatible with PATA standard, IEEE1394 standard, PCIExpress standard, USB standard, SD standard, MS standard, MMC standard, CF standard, IDE standard or other suitable data transmission standards.

The memory interface 206 is electrically connected to the memory management circuit 202 and used for accessing the rewritable non-volatile memory module 106 . That is to say, the data to be written into the rewritable non-volatile memory module 106 will be converted into a format acceptable to the rewritable non-volatile memory module 106 via the memory interface 206 .

The first temporary memory 208 is electrically connected to the memory management circuit 202 for temporarily storing instructions or data executed by the memory management circuit 202 . Specifically, the first temporary storage memory 208 includes a write data temporary storage area 300 for temporarily storing data written by the host system 1000 . However, it must be understood that, in addition to the write data temporary storage area 300, the first temporary storage memory 208 may include other areas (not shown) for temporary storage of other data. For example, the memory management circuit 202 can store the mapping table (mapping table) between the virtual address and the physical address in the rewritable non-volatile memory module 106 in other areas of the first temporary memory 208 . In this exemplary embodiment, the transmission bandwidth of the first temporary storage memory 208 is greater than the transmission bandwidth of the second temporary storage memory 108 . For example, the first temporary storage memory 208 is a static random access memory (static random access memory, SRAM). However, the first temporary storage memory 208 can also be MRAM, CacheRAM, SDRAM, VRAM, NORFlash or eDRAM. And the transmission bandwidth of the first temporary storage 208 is 800 Mbit/s.

In this exemplary embodiment, in order to increase the writing speed of the memory storage device 100, the first temporary storage memory 208 with a larger transmission bandwidth is used as an area for temporarily storing written data, and the second temporary storage memory 208 with a smaller transmission bandwidth is used as an area for temporarily storing written data. The second temporary storage 108 is used as a backup area for writing data.

FIG. 4 is a schematic diagram of writing data according to an exemplary embodiment.

Referring to FIG. 4, when the memory storage device 100 receives the write command and the write data 302 corresponding to the write command from the host system 1000, the memory management circuit 202 will temporarily store the write data 302 to the write data temporary The storage area is 300. Since the transmission bandwidth of the first temporary storage 208 is relatively large, it can meet the writing requirement of the host system 1000 . That is to say, the speed at which the memory management circuit 202 temporarily stores the write data 302 in the write data temporary storage area 300 will not be lower than the speed at which the host system 1000 transmits the write data 302 to the memory management circuit 202, thereby enabling instant transfer from The host system 1000 receives the data and temporarily stores it in the first temporary storage 208 .

In this exemplary embodiment, the transmission bandwidth of the first temporary storage memory 208 can be shared by at least two operating programs at the same time, such as writing or reading programs. For example, while one piece of data is written into the first temporary storage 208 , other data can be read from the first temporary storage 208 and transmitted to the rewritable non-volatile memory module 106 . For example, while one piece of data is written into the first temporary storage 208 , other data can also be read from the first temporary storage 208 and transferred to the second temporary storage 108 .

Next, the memory management circuit 202 reads the write data 302 from the write data temporary storage area 300 , and writes the write data 302 into the rewritable non-volatile memory module 106 according to the write command.

On the other hand, the memory management circuit 202 also reads the write data 302 from the write data temporary storage area 300 , and copies the write data 302 to the second temporary storage memory 108 . It should be noted that, in this exemplary embodiment, the transmission bandwidth of the second temporary storage memory 108 can be used to transmit the writing data 302 entirely. That is to say, for a piece of write data 302 , the memory management circuit 202 may only need to perform a write operation to the second temporary storage memory 108 , but not a read operation. On the other hand, the memory management circuit 202 can also copy the write data 302 to the second temporary storage memory 108 while writing the write data 302 to the rewritable non-volatile memory module 106 .

Based on this, the write data 302 is backed up in the second temporary storage 108, and the memory controller 104 can issue a write command from the host system 1000 and temporarily store the new write data in the first temporary storage. memory 208 . In particular, the written data 302 has been backed up in the second temporary storage memory 108, therefore, in the first temporary storage memory 208, even if the address originally storing the written data 302 is used to temporarily store the new written data , and will not affect the operation of the memory storage device 100 .

Specifically, the memory management circuit 202 determines whether a program error occurs after writing the write data 302 into the rewritable non-volatile memory module 106 . If a program error occurs, the memory management circuit 202 will read the write data 302 from the second temporary storage memory 108, and rewrite the write data 302 to the rewritable non-volatile memory module according to the write command 106 in. That is to say, when a program error occurs and the write data 302 is not successfully written to the rewritable non-volatile memory module 106, even if the write data 302 has been overwritten in the first temporary storage memory 208 For new write data, the memory management circuit 202 can still rewrite the write data 302 from the second temporary storage memory 108 to the rewritable non-volatile memory module 106 . Based on this, the memory storage device 100 can use the first temporary memory 208 with a larger bandwidth to increase the writing speed while ensuring that the written data 302 can be successfully written to the rewritable non-volatile memory module. 106. In this exemplary embodiment, when the memory management circuit 202 reads the write data 302 from the second temporary storage 108 , all the transmission bandwidth of the second temporary storage 108 can be used to transmit the write data 302 . That is to say, in this exemplary embodiment, the transmission bandwidth of the second temporary memory 108 can be entirely used to execute a single operation procedure, such as a write or read procedure. For example, all the transmission bandwidth of the second temporary storage memory 108 is used to write data into the second temporary storage memory 108 . Alternatively, all the transmission bandwidth of the second temporary storage memory 108 is used to read data from the second temporary storage memory 108 .

Besides, in this exemplary embodiment, the memory management circuit 202 is also configured to receive a read command from the host system 1000 . In particular, after receiving the read command, the memory management circuit 202 determines whether the second temporary storage memory 108 stores read data corresponding to the read command. If the second temporary memory 108 stores the read data corresponding to the read command, the memory management circuit 202 will read the corresponding read data from the second temporary memory 108 and send the read data to the The host system 1000 responds to the read command received by the memory management circuit 202 . For example, the host system 1000 first writes the write data 302 into the memory storage device 100 , and then reads the write data 302 from the memory storage device 100 after a period of time. Since the memory management circuit will back up the write data 302 to the second temporary storage memory 108 when writing the write data 302 to the rewritable non-volatile memory module 106, the host system 1000 needs to store When the device 100 reads the write data 302 , the write data 302 may also be stored in the second temporary storage memory 108 and the rewritable non-volatile memory module 106 . Therefore, if the data corresponding to the read command is still stored in the second temporary storage 108 , the corresponding data is directly transmitted from the second temporary storage 108 to the host system 1000 , which can effectively increase the reading speed.

In this exemplary embodiment, the capacity of the first temporary storage 208 is smaller than that of the second temporary storage 108 . For example, the capacity of the second temporary storage memory 108 is 8 times the capacity of the first temporary storage memory 208, under this multiplier (that is, 8 times), the second temporary storage memory 108 and the first temporary storage memory 208 can have Better usage efficiency. Specifically, in the example where the capacity of the second temporary storage memory 108 is less than 8 times the capacity of the first temporary storage memory 208, when the write data temporary storage area 300 is full of write data, and the memory management circuit 202 will When the written data written in the temporary data storage area 300 is backed up to the second temporary storage 108 , the second temporary storage 108 may not have enough space to back up the written data. On the other hand, if the capacity of the second temporary storage memory 108 is greater than 8 times of the capacity of the first temporary storage memory 208, although there will not be the problem that the space of the second temporary storage memory 108 is not enough, the second temporary storage memory 108 There may be too much free memory space or the backed up data is too old, and the host system 1000 does not often read such old data, so that the usage efficiency of the second temporary storage 108 is reduced. Therefore, when the capacity of the second temporary storage memory 108 is 8 times the capacity of the first temporary storage memory 208, better memory usage efficiency can be arranged, but it is worth noting that this proportional relationship is an empirical value, and it is also It can be changed to 4 times, 10 times or other ratios according to actual needs.

FIG. 5 is a flowchart of a data writing method according to an exemplary embodiment.

Referring to FIG. 5 , in step S502 , the memory management circuit 202 of the memory controller 104 receives a write command and write data corresponding to the write command from the host system. Next, in step S504 , the memory management circuit 202 temporarily stores the write data into the write data temporary storage area of the first temporary storage memory.

Afterwards, in step S506, the memory management circuit 202 will write the write data from the write data temporary storage area to the rewritable non-volatile memory module according to the write command, and write data from the write data temporary storage area Copy the written data in the zone to the second scratch memory.

Then, in step S508 , the memory management circuit 202 determines whether a program error occurs after writing the write data into the rewritable non-volatile memory module. Moreover, if a program error occurs, then in step S510, the memory management circuit 202 will read the write data from the second temporary storage memory, and rewrite the write data to the rewritable non-volatile memory according to the write instruction. in the sex memory module.

However, the steps of the above data writing method may have other sequences, and the present invention does not limit the sequence of the steps in FIG. 5 .

It should be noted that although in the exemplary embodiment of the present invention, the second temporary storage memory 108 is configured outside the memory controller 104 . However, the present invention is not limited thereto. In another exemplary embodiment of the present invention, the second temporary storage memory 108 may also be configured inside the memory controller 104 .

To sum up, the memory storage device, memory controller and writing method proposed by the embodiments of the present invention can use the transmission bandwidth of a temporary memory in the memory storage device more efficiently. That is to say, when data is written, the transmission bandwidth of the temporary memory used to back up the written data is all used to transmit the written data. Accordingly, the writing speed of the memory storage device can be increased.

Although the present invention has been disclosed above with the embodiments, it is not intended to limit the present invention, and any person skilled in the art may make some changes and modifications without departing from the spirit and scope of the present invention.

Claims (17)

1. a memorizer memory devices, comprising:

A connector, in order to be electrically connected to a host computer system;

One type nonvolatile module;

One Memory Controller, be electrically connected to this connector and this type nonvolatile module, wherein this Memory Controller comprises one first temporary storage, and this first temporary storage comprises a write data temporary storage district; And

One second temporary storage, is electrically connected this first temporary storage, and wherein a transmitting bandwidth of this second temporary storage is lower than a transmitting bandwidth of this first temporary storage,

Wherein this Memory Controller in order to receive at least one write data of corresponding at least one write instruction from this host computer system, and by this at least one write data temporary storage to this write data temporary storage district,

Wherein this Memory Controller also in order to write in this type nonvolatile module according to this at least one write instruction by these at least one write data from this write data temporary storage district,

Wherein this Memory Controller also in order to from this write data temporary storage district according to this at least one write instruction by this at least one write data Replica in this second temporary storage,

Wherein this Memory Controller also in order to judge whether generation one program error after writing in this type nonvolatile module by these at least one write data,

If when wherein there is this program error, then this Memory Controller also in order to read this at least one write data from this second temporary storage, and these at least one write data write in this type nonvolatile module according to this at least one write instruction.

2. memorizer memory devices according to claim 1,

Wherein this Memory Controller is also in order to receive at least one reading command from this host computer system,

Wherein this Memory Controller is also in order to judge whether this second temporary storage stores should at least one reading data of at least one reading command,

If wherein this second temporary storage store to should these at least one reading data of at least one reading command time, then this Memory Controller reads these at least one reading data and these at least one reading data is sent to this host computer system to respond this at least one reading command from this second temporary storage.

3. memorizer memory devices according to claim 1, wherein this second temporary storage is the outside being configured in this Memory Controller or being configured in this Memory Controller.

4. memorizer memory devices according to claim 1, wherein this first temporary storage is a static RAM.

5. memorizer memory devices according to claim 1, wherein this second temporary storage is a Synchronous Dynamic Random Access Memory.

6. memorizer memory devices according to claim 1, wherein a capacity of this second temporary storage is greater than a capacity of this first temporary storage.

7. memorizer memory devices according to claim 6, wherein the capacity of this second temporary storage is 8 times of the capacity of this first temporary storage.

8. memorizer memory devices according to claim 1, wherein this transmitting bandwidth of this second temporary storage is applied to a single operation program, and wherein this transmitting bandwidth of this first temporary storage can be shared in multiple running program simultaneously.

9. a method for writing data, for a memorizer memory devices, wherein this memorizer memory devices has one second temporary storage, a Memory Controller and a type nonvolatile module, one first temporary storage is in this Memory Controller and a transmitting bandwidth of this first temporary storage is greater than a transmitting bandwidth of this second temporary storage, and this wiring method comprises:

From a host computer system receive at least one write instruction with to should at least one write data of at least one write instruction;

By this at least one write data temporary storage in a write data temporary storage district of this first temporary storage;

According to this at least one write instruction, these at least one write data are write in this type nonvolatile module from this write data temporary storage district;

From this write data temporary storage district according to this at least one write instruction by this at least one write data Replica in this second temporary storage;

Generation one program error is judged whether after writing in this type nonvolatile module by these at least one write data; And

If when there is this program error, then from this second temporary storage, read these at least one write data, and according to this at least one write instruction, these at least one write data are write in this type nonvolatile module.

10. method for writing data according to claim 9, also comprises:

At least one reading command is received from this host computer system;

Judge whether this second temporary storage stores at least one reading data to this at least one reading command; And

If this second temporary storage stores at least one reading data to this at least one reading command, then from this second temporary storage, read these at least one reading data and these at least one reading data are sent to this host computer system to respond this at least one reading command.

11. 1 kinds of Memory Controllers, for controlling a type nonvolatile module, this Memory Controller comprises:

One host interface, in order to be electrically connected to a host computer system;

One memory interface, in order to be electrically connected to this type nonvolatile module;

One memory management circuitry, is electrically connected to this host interface, this memory interface; And

One first temporary storage, is electrically connected to this memory management circuitry, and has a write data temporary storage district;

Wherein this memory management circuitry in order to receive at least one write data of corresponding at least one write instruction from this host computer system, and by this at least one write data temporary storage to this write data temporary storage district,

Wherein this memory management circuitry also in order to write in this type nonvolatile module according to this at least one write instruction by these at least one write data from this write data temporary storage district,

Wherein this memory management circuitry also in order to from this write data temporary storage district according to this at least one write instruction by this at least one write data Replica in one second temporary storage, wherein a transmitting bandwidth of this first temporary storage is higher than a transmitting bandwidth of this second temporary storage

Wherein this memory management circuitry also in order to judge whether generation one program error after writing in this type nonvolatile module by these at least one write data,

If when wherein there is this program error, then this memory management circuitry also in order to read this at least one write data from this second temporary storage, and these at least one write data write in this type nonvolatile module according to this at least one write instruction.

12. Memory Controllers according to claim 11,

Wherein this memory management circuitry is also in order to receive at least one reading command from this host computer system,

Wherein this memory management circuitry is also in order to judge whether this second temporary storage stores should at least one reading data of at least one reading command,

If wherein this second temporary storage store to should these at least one reading data of at least one reading command time, then this memory management circuitry reads these at least one reading data and these at least one reading data is sent to this host computer system to respond this at least one reading command from this second temporary storage.

13. Memory Controllers according to claim 11, wherein this second temporary storage is the outside being configured in this Memory Controller or being configured in this Memory Controller.

14. Memory Controllers according to claim 11, wherein this first temporary storage is a static RAM.

15. Memory Controllers according to claim 11, wherein this second temporary storage is a Synchronous Dynamic Random Access Memory.

16. Memory Controllers according to claim 11, wherein a capacity of this second temporary storage is greater than a capacity of this first temporary storage.

17. Memory Controllers according to claim 16, wherein the capacity of this second temporary storage is 8 times of the capacity of this first temporary storage.