CN103185847B - Auxiliary testing device - Google Patents
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Abstract
一种辅助测试装置,适于一待测物。辅助测试装置包括电源单元、储存单元与控制单元。电源单元用以提供多个电压,其中这些电压互不相同。储存单元用以储存对应待测物的电源时序表与模拟信号产生表。控制单元耦接储存单元与电源单元,用以依据电源时序表,提供多个电源时序控制信号,使电源单元依据这些电源时序控制信号,依序提供前述电压给待测物,并依据模拟信号产生表,提供对应待测物的模拟信号给待测物,且控制单元接收待测物回应于前述电压与模拟信号所产生的多个状态信号。
An auxiliary test device is suitable for an object to be tested. The auxiliary test device includes a power supply unit, a storage unit and a control unit. The power supply unit is used to provide multiple voltages, wherein these voltages are different from each other. The storage unit is used to store a power timing table and an analog signal generation table corresponding to the object to be tested. The control unit is coupled to the storage unit and the power supply unit, and is used to provide multiple power timing control signals according to the power timing table, so that the power supply unit sequentially provides the aforementioned voltages to the object to be tested according to these power timing control signals, and provides analog signals corresponding to the object to be tested to the object to be tested according to the analog signal generation table, and the control unit receives multiple status signals generated by the object to be tested in response to the aforementioned voltages and analog signals.
Description
技术领域 technical field
本发明涉及一种测试装置,特别涉及一种辅助测试装置。The invention relates to a testing device, in particular to an auxiliary testing device.
背景技术 Background technique
一般来说,市面上的计算机系统在出货前,通常都要对其各项性能指标进行测试。在某些机种设计为多模块(例如记忆体模块与中央处理器模块)且多层的架构下,需要整机组合后方可进行测试功能。Generally speaking, computer systems on the market are usually tested for their various performance indicators before shipment. Some models are designed with multi-module (such as memory module and CPU module) and multi-layer architecture, and the test function can only be performed after the whole machine is assembled.
由于整机组合后的体积较大且受测试设备的限制,使得在进行电路内测试(In-CircuitTesting,ICT)测试时,而无法做到整机测试。因此,测试设备仅能支持单片单板做上电测试,也即将电源供应器直接连接至单一模块,通过电源供应器来改变或调整供应至单一模块的电源,这样的做法无法有效让前述各个模块可正常进行上电测试。Due to the large size of the combined machine and the limitation of the test equipment, it is impossible to perform the test of the whole machine when performing the In-Circuit Testing (ICT) test. Therefore, the test equipment can only support a single board for power-on testing, that is, the power supply is directly connected to a single module, and the power supplied to the single module is changed or adjusted through the power supply. The module can perform power-on test normally.
然而,利用前述单片单板的测试方法,并不能控制应有电源的启动时序以及单一模块所需的操作信号。并且,在没有考量待测物(例如主板)是否已允许上电启动以及没有对错误电源时序(incorrectpowersequence)的保护下,由于实际中存在供电不稳定的情况,电源供应器并不能有效控制输出至待测物的电源。如此一来,不仅造成待测物的元件损坏的潜在的机率增加,并且也额外提高生产的成本。However, the aforementioned testing method for a single board cannot control the start-up sequence of the proper power supply and the operating signals required by a single module. Moreover, without considering whether the object under test (such as the motherboard) is allowed to be powered on and not protected against incorrect power sequence, the power supply cannot effectively control the output to The power supply of the object under test. In this way, not only the potential probability of damage to the components of the DUT is increased, but also the production cost is additionally increased.
发明内容 Contents of the invention
鉴于以上的问题,本发明的目的在于提供一种辅助测试装置,藉以使待测物可依据正确的电源时序进行上电并给予待测物对应的模拟信号,以进行单一模块测试而无须将整机整合后测试,进而减少待测物的电路元件的损坏机率,并增加测试的便利性。In view of the above problems, the object of the present invention is to provide an auxiliary test device, so that the DUT can be powered on according to the correct power supply sequence and give the DUT a corresponding analog signal to perform a single module test without the need to Test after machine integration, thereby reducing the damage probability of circuit components of the DUT and increasing the convenience of testing.
本发明的一种辅助测试装置,适于待测物。此辅助测试装置包括电源单元、储存单元与控制单元。电源单元用以提供多个电压,其中前述电压互不相同。储存单元用以储存对应待测物的电源时序表与模拟信号产生表。控制单元耦接储存单元与电源单元,用以依据电源时序表,提供多个电源时序控制信号,使电源单元依据前述电源时序控制信号,依序提供前述电压给待测物,并依据模拟信号产生表,提供对应待测物的模拟信号给待测物,且控制单元接收待测物回应于前述电压与模拟信号所产生的多个状态信号。An auxiliary test device of the present invention is suitable for a test object. The auxiliary testing device includes a power supply unit, a storage unit and a control unit. The power supply unit is used to provide multiple voltages, wherein the aforementioned voltages are different from each other. The storage unit is used for storing the power sequence table and the analog signal generation table corresponding to the DUT. The control unit is coupled to the storage unit and the power supply unit, and is used to provide multiple power supply sequence control signals according to the power supply sequence table, so that the power supply unit sequentially provides the aforementioned voltages to the object under test according to the aforementioned power sequence control signals, and generates according to the analog signal. The table provides an analog signal corresponding to the object under test to the object under test, and the control unit receives a plurality of state signals generated by the object under test in response to the aforementioned voltage and the analog signal.
在一实施例中,前述辅助测试装置还包括更新单元。此更新单元耦接储存单元,用以接收并依据更新信号,以更新电源时序表与模拟信号产生表。In an embodiment, the aforementioned auxiliary testing device further includes an updating unit. The update unit is coupled to the storage unit and is used for receiving and updating the power timing table and the analog signal generation table according to the update signal.
在一实施例中,前述辅助测试装置还包括显示单元。显示单元耦接控制单元,用以通过控制单元接收前述状态信号,以显示前述状态信号。In one embodiment, the aforementioned auxiliary testing device further includes a display unit. The display unit is coupled to the control unit for receiving the aforementioned state signal through the control unit to display the aforementioned state signal.
在一实施例中,前述储存单元更用储存对应待测物的另一电源时序表与另一模拟信号产生表,而辅助测试装置还包括检测单元。此检测单元耦接控制单元,用以检测待测物的类型,以产生检测信号。其中,控制单元用以接收并依据检测信号,而选用并依据电源时序表与模拟信号产生表或另一电源时序表与另一模拟信号产生表,提供前述电源时序信号以及模拟信号。In one embodiment, the aforementioned storage unit is further used to store another power timing table and another analog signal generation table corresponding to the DUT, and the auxiliary testing device further includes a detection unit. The detection unit is coupled to the control unit for detecting the type of the object to be tested to generate a detection signal. Wherein, the control unit is used for receiving and according to the detection signal, selecting and according to the power timing table and the analog signal generating table or another power timing table and another analog signal generating table to provide the aforementioned power timing signal and analog signal.
在一实施例中,前述控制单元与储存单元配置于复杂可程序逻辑装置(ComplexProgrammingLogicDevice,CPLD)中。In one embodiment, the aforementioned control unit and storage unit are configured in a complex programmable logic device (Complex Programming Logic Device, CPLD).
本发明的辅助测试装置,通过在辅助测试装置与待测物连接后,依据待测物所对应的电源时序,依序提供对应电源时序的工作电压,使得待测物可依据其正确的电源时序进行上电,并提供待测物对应的模拟信号。如此一来,可进行单一模块测试而无须将整机组合后测试,以减少待测物的电路元件的损坏机率,并增加测试的便利性。In the auxiliary test device of the present invention, after the auxiliary test device is connected to the object to be tested, according to the power supply sequence corresponding to the object to be tested, the operating voltage corresponding to the power supply sequence is sequentially provided, so that the object to be tested can be based on its correct power supply sequence. Power on and provide the analog signal corresponding to the DUT. In this way, a single module test can be performed without combining the whole machine to test, so as to reduce the damage probability of the circuit components of the DUT and increase the convenience of the test.
以下结合附图和具体实施例对本发明进行详细描述,但不作为对本发明的限定。The present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments, but not as a limitation of the present invention.
附图说明 Description of drawings
图1为本发明的辅助测试装置的方框图;Fig. 1 is the block diagram of auxiliary testing device of the present invention;
图2为本发明的另一辅助测试装置的方框图。Fig. 2 is a block diagram of another auxiliary testing device of the present invention.
其中,附图标记Among them, reference signs
100、200辅助测试装置100, 200 auxiliary test device
110、210电源单元110, 210 power supply unit
120、220储存单元120, 220 storage units
130、230控制单元130, 230 control unit
180、280待测物180, 280 DUT
240显示单元240 display units
250检测单元250 detection units
260更新单元260 update units
具体实施方式 Detailed ways
下面结合附图对本发明的结构原理和工作原理作具体的描述:Below in conjunction with accompanying drawing, structural principle and working principle of the present invention are specifically described:
请参考图1所示,其为本发明的辅助测试装置的方框图。本实施例的辅助测试装置100适于一待测物(unitundertest,UUT)180,其中此待测物180例如为记忆体模块(DIMMmodule)、中央处理器模块(CPUmodule)、主要输入输出板(MainI/Oboard)等的个体单板,但本发明不以此为限。Please refer to FIG. 1 , which is a block diagram of the auxiliary testing device of the present invention. The auxiliary test device 100 of the present embodiment is suitable for a unit under test (UUT) 180, wherein the unit under test 180 is, for example, a memory module (DIMM module), a central processing unit module (CPU module), a main input and output board (MainI) /Oboard) and other individual veneers, but the present invention is not limited thereto.
辅助测试装置100包括电源单元110、储存单元120与控制单元130。电源单元110用以提供多个电压,其中这些电压互不相同。其中,前述电压例如为3.3V、5V、12V等,但本发明不以此为限。储存单元120用以储存对应待测物180的电源时序表与模拟信号产生表。其中,电源时序表例如记录有待测物180由开机至正常运作的上电顺序,模拟信号产生表例如记录有待测物180初始程序前的电源良好(PowerGood)信号或是前置元件的信号。The auxiliary test device 100 includes a power unit 110 , a storage unit 120 and a control unit 130 . The power unit 110 is used for providing multiple voltages, wherein the voltages are different from each other. Wherein, the foregoing voltage is, for example, 3.3V, 5V, 12V, etc., but the present invention is not limited thereto. The storage unit 120 is used for storing a power supply timing table and an analog signal generation table corresponding to the object under test 180 . Among them, the power sequence table, for example, records the power-on sequence of the object under test 180 from power-on to normal operation, and the analog signal generation table, for example, records the power good (PowerGood) signal before the initial program of the object under test 180 or the signal of the pre-component .
控制单元130耦接储存单元120与电源单元110,用以依据电源时序表,提供多个电源时序控制信号,并将电源时序控制信号提供给电源单元110。假设,电源时序表记录的电压输出的顺序,例如12V、5V、3.3V,则控制单元130据此提供依序提供12V、5V、3.3V所对应的电源时序控制信号。The control unit 130 is coupled to the storage unit 120 and the power unit 110 for providing a plurality of power timing control signals according to the power timing table, and providing the power timing control signals to the power unit 110 . Assuming that the voltage output sequence recorded in the power timing table is, for example, 12V, 5V, and 3.3V, the control unit 130 provides the corresponding power timing control signals of 12V, 5V, and 3.3V accordingly.
接着,电源单元110会依据电源时序控制信号,依序提供待测物180所需的工作电压给待测物180,以使待测物180可由开机阶段运行至正常运作阶段。也就是说,电源单元110会依据前述的电源时序控制信号,而依序提供前述12V、5V、3.3V的电压给待测物180,以确保待测物180可以正确的电源时序进行运作。Then, the power supply unit 110 sequentially provides the working voltage required by the object under test 180 to the object under test 180 according to the power sequence control signal, so that the object under test 180 can operate from the power-on stage to the normal operation stage. That is to say, the power supply unit 110 sequentially provides the aforementioned voltages of 12V, 5V, and 3.3V to the DUT 180 according to the aforementioned power timing control signal, so as to ensure that the DUT 180 can operate in the correct power timing.
另外,控制单元130还会依据模拟信号产生表,提供模拟信号给待测物180。其中,模拟信号可以是前一阶段的电源良好(PowerGood)信号或是前置元件的信号,也即与待测物180相关的其他模块所提供的信号。举例来说,记忆体模块的初始则需要有中央处理器存在的确认信号。也就是说,假设待测物180为记忆体模块时,则控制单元130会提供中央处理器存在的确认信号,则待测物180才会进行初始程序。In addition, the control unit 130 also provides an analog signal to the object under test 180 according to the analog signal generation table. Wherein, the analog signal may be a PowerGood signal of a previous stage or a signal of a pre-component, that is, a signal provided by other modules related to the DUT 180 . For example, the initialization of the memory module requires a confirmation signal of the presence of the CPU. That is to say, if the object under test 180 is assumed to be a memory module, the control unit 130 will provide a confirmation signal of the existence of the central processing unit, and then the object under test 180 will perform an initial procedure.
控制单元130除了提供电源时序控制信号与模拟信号的外,还可接收待测物180回应于电压单元110提供的电压以及模拟信号而产生的多个状态信号。其中,前述状态信号例如为电源正确或错误状态信号以及初始程序正确或错误状态信号等。也就是说,当待测物180内的电路元件接收到12V的电压并进行运作后,会回传对应12V的电压的正确或错误状态信号给控制单元130;当待测物180内的电路元件接收到5V的电压并进行后,会回传对应此5V的正确或错误状态信号给控制单元130;其余则类推。也即,本实施例可通过控制单元130监控待测物180的上电时序与初始程序过程以及待测物180内的元件对应前述电压与模拟信号的运作状况。In addition to providing the power sequence control signal and the analog signal, the control unit 130 can also receive a plurality of status signals generated by the DUT 180 in response to the voltage and the analog signal provided by the voltage unit 110 . Wherein, the aforementioned status signal is, for example, a power supply correct or error status signal, an initial program correct or error status signal, and the like. That is to say, when the circuit element in the object under test 180 receives the voltage of 12V and operates, it will return the correct or wrong state signal corresponding to the voltage of 12V to the control unit 130; when the circuit element in the object under test 180 After the voltage of 5V is received and processed, a correct or incorrect state signal corresponding to the 5V will be sent back to the control unit 130; the rest can be analogized. That is to say, in this embodiment, the control unit 130 can monitor the power-on sequence and initial program process of the object under test 180 and the operation status of the components in the object under test 180 corresponding to the aforementioned voltages and analog signals.
另外,控制单元130例如可将前述状态信号储存至储存单元120。如此一来,使用者可通过读取储存单元120储存的信息,以得知待测物180是否已执行到正常运作状态,而据以使用主要测试装置对待测物180进行后续的测量。In addition, the control unit 130 may, for example, store the aforementioned status signal in the storage unit 120 . In this way, the user can read the information stored in the storage unit 120 to know whether the object under test 180 has been executed to a normal operation state, and accordingly use the main test device to perform subsequent measurements on the object under test 180 .
在本实施例中,储存单元120与控制单元130可以一复杂可程序逻辑装置(ComplexProgrammingLogicDevice,CPLD)来实现。In this embodiment, the storage unit 120 and the control unit 130 can be realized by a complex programmable logic device (Complex Programming Logic Device, CPLD).
本实施例的辅助测试装置100可提供对应待测物180应有的上电时序的电压以及模拟信号给待测物180,则待测物180无需组合其他模块的情况下,仍可具有所有模块组装后的上电程序与初使程序而进行操作,使得待测物180可以单一模块(记忆体模块或中央处理器模块)单独进行测试。如此一来,可减少待测物的电路元件的损坏机率,并增加测试的便利性。The auxiliary test device 100 of this embodiment can provide the voltage corresponding to the power-on sequence of the object under test 180 and the analog signal to the object under test 180, so that the object under test 180 can still have all the modules without combining other modules. After the assembly, the power-on program and the initial program are operated, so that the object under test 180 can be tested independently with a single module (memory module or CPU module). In this way, the damage probability of the circuit elements of the object under test can be reduced, and the convenience of testing can be increased.
请参考图2所示,其为本发明的另一辅助测试装置的方框图。本实施例的辅助测试装置200适于一待测物(unitundertest,UUT)280。辅助测试装置200包括电源单元210、储存单元220、控制单元230、显示单元240、检测单元250与更新单元260。Please refer to FIG. 2 , which is a block diagram of another auxiliary testing device of the present invention. The auxiliary testing device 200 of this embodiment is suitable for a unit under test (UUT) 280 . The auxiliary test device 200 includes a power unit 210 , a storage unit 220 , a control unit 230 , a display unit 240 , a detection unit 250 and an update unit 260 .
电源单元210用以提供多个电压,其中这些电压互不相同。其中,前述电压例如为3.3V、5V、12V等。储存单元220用以储存对应待测物280的电源时序表与另一电源时序表以及模拟信号产生表与另一模拟信号产生表。也就是说,储存单元220可储存两种不同类型的待测物280所需的电源时序表与模拟信号产生表。前述的电源时序表与模拟信号产生表仅以两个为例,但本发明不以此为限,使用者可视待测物280的类型,而调整储存单元220中的电源时序表与模拟信号产生表的数量。The power unit 210 is used for providing multiple voltages, wherein the voltages are different from each other. Wherein, the aforementioned voltage is, for example, 3.3V, 5V, 12V and so on. The storage unit 220 is used for storing the power timing table and another power timing table and the analog signal generation table and another analog signal generation table corresponding to the DUT 280 . That is to say, the storage unit 220 can store the power timing table and the analog signal generation table required by two different types of DUTs 280 . The aforementioned power timing table and analog signal generation table are only two examples, but the present invention is not limited thereto. The user can adjust the power timing table and analog signal in the storage unit 220 according to the type of the object under test 280. The number of generated tables.
控制单元230耦接储存单元220与电源单元210,用以依据电源时序表与模拟信号产生表或另一电源时序表与另一模拟信号产生表,提供多个电源时序控制信号与模拟信号。接着,电源单元210会依据前述的电源时序控制信号,依序提供电压给待测物280。并且,控制单元230还可依据模拟信号产生表,提供对应待测物280所需的模拟信号。控制单元230会接收待测物280回应于前述电压与模拟信号所产生的多个状态信号。The control unit 230 is coupled to the storage unit 220 and the power supply unit 210 for providing a plurality of power timing control signals and analog signals according to the power timing table and the analog signal generation table or another power timing table and another analog signal generation table. Next, the power supply unit 210 sequentially provides voltages to the object under test 280 according to the aforementioned power sequence control signal. Moreover, the control unit 230 can also provide the required analog signal corresponding to the object under test 280 according to the analog signal generation table. The control unit 230 receives a plurality of state signals generated by the object under test 280 in response to the aforementioned voltage and analog signals.
显示单元240耦接控制单元230,用以通过控制单元230接收待测物280所回传的状态信号,以显示状态信号。如此一来,使用者便可通过显示单元240所显示的状态而得知待测物280是否产生错误,进而对待测物280进行相应的处理。The display unit 240 is coupled to the control unit 230 for receiving the status signal returned by the object under test 280 through the control unit 230 to display the status signal. In this way, the user can know whether an error has occurred in the object under test 280 through the status displayed on the display unit 240 , and then perform corresponding processing on the object under test 280 .
检测单元250耦接控制单元230,用以检测待测物280的类型,以产生检测信号。举例来说,检测单元250可配置有多接脚的连接端口,以便于检测单元250通过连接端口与待测物280连接时,检测单元250可通过连接端口连接的针脚数量与位置,检测出待测物280的类型,例如记忆体模块或中央处理器模块。之后,检测单元250据此产生对应的检测信号,并传送给控制单元230。The detection unit 250 is coupled to the control unit 230 for detecting the type of the object under test 280 to generate a detection signal. For example, the detection unit 250 can be configured with a multi-pin connection port, so that when the detection unit 250 is connected to the object under test 280 through the connection port, the detection unit 250 can detect the number and position of the pins connected to the connection port. The type of the object 280, such as a memory module or a CPU module. Afterwards, the detection unit 250 generates a corresponding detection signal and sends it to the control unit 230 .
接着,控制单元230可依据检测信号,于储存单元220中选用对应此检测信号的电源时序表与模拟信号产生表或另一电源时序表与另一模拟信号产生表,而据以提供相关的电源时序信号以及模拟信号。例如,记忆体模块对应电源时序表与模拟信号产生表,而中央处理器模块对应另一电源时序表与另一模拟信号产生表。Next, the control unit 230 can select a power timing table and an analog signal generation table or another power timing table and another analog signal generation table corresponding to the detection signal in the storage unit 220 according to the detection signal, and provide relevant power accordingly. timing signals as well as analog signals. For example, the memory module corresponds to a power timing table and an analog signal generation table, and the CPU module corresponds to another power timing table and another analog signal generation table.
另外,更新单元260耦接储存单元220,用以接收并依据更新信号,以更新储存单元220中所储存的电源时序表与模拟信号产生表。也就是说,使用者可通过更新单元260更新储存单元220中所储存的电源时序表与模拟信号产生表的版本与数量。如此一来,可增加使用的便利性。在本实施例中,控制单元230与储存单元220可以复杂可程序逻辑装置来实现。In addition, the update unit 260 is coupled to the storage unit 220 for receiving and updating the power timing table and the analog signal generation table stored in the storage unit 220 according to the update signal. That is to say, the user can update the version and quantity of the power timing table and the analog signal generation table stored in the storage unit 220 through the updating unit 260 . In this way, the convenience of use can be increased. In this embodiment, the control unit 230 and the storage unit 220 can be realized by complex programmable logic devices.
本发明的实施例的辅助测试装置,其通过在辅助测试装置与待测物连接后,依据待测物所对应的电源时序,产生对应的电源时序控制信号,以依序提供电压给待测物,使得待测物可依据其正确的电源时序进行上电,并提供待测物对应的模拟信号。藉此,可进行单一模块测试而无须整机组合后测试,以可减少待测物的电路元件的损坏机率。另外,辅助测试装置还可显示上电时序过程的状态,且依据待测物的类型提供对应待测物所需的电源时序的电压以及模拟信号,并可更新电源时序表的版本与数量,进而可增加测试的便利性。In the auxiliary test device of the embodiment of the present invention, after the auxiliary test device is connected to the object under test, it generates a corresponding power sequence control signal according to the power sequence corresponding to the object under test, so as to sequentially provide voltage to the object under test , so that the DUT can be powered on according to its correct power sequence, and provide the analog signal corresponding to the DUT. In this way, a single module test can be carried out without the need to test the whole machine after assembly, so as to reduce the damage probability of the circuit components of the DUT. In addition, the auxiliary test device can also display the status of the power-on sequence process, and provide the voltage and analog signal corresponding to the power sequence required by the DUT according to the type of the DUT, and can update the version and quantity of the power sequence table, and then Can increase the convenience of testing.
当然,本发明还可有其他多种实施例,在不背离本发明精神及其实质的情况下,熟悉本领域的技术人员当可根据本发明作出各种相应的改变和变形,但这些相应的改变和变形都应属于本发明所附的权利要求的保护范围。Of course, the present invention can also have other various embodiments, and those skilled in the art can make various corresponding changes and deformations according to the present invention without departing from the spirit and essence of the present invention, but these corresponding Changes and deformations should belong to the scope of protection of the appended claims of the present invention.
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