[go: up one dir, main page]

CN103137415B - Semiconductor-fabricating device and semiconductor making method - Google Patents

Semiconductor-fabricating device and semiconductor making method Download PDF

Info

Publication number
CN103137415B
CN103137415B CN201210477226.1A CN201210477226A CN103137415B CN 103137415 B CN103137415 B CN 103137415B CN 201210477226 A CN201210477226 A CN 201210477226A CN 103137415 B CN103137415 B CN 103137415B
Authority
CN
China
Prior art keywords
processing chamber
plasma
temperature
quantity delivered
oxygen
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201210477226.1A
Other languages
Chinese (zh)
Other versions
CN103137415A (en
Inventor
申平洙
金秉勳
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
PSK Inc
Original Assignee
PSK Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by PSK Inc filed Critical PSK Inc
Publication of CN103137415A publication Critical patent/CN103137415A/en
Application granted granted Critical
Publication of CN103137415B publication Critical patent/CN103137415B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67017Apparatus for fluid treatment
    • H01L21/67063Apparatus for fluid treatment for etching
    • H01L21/67069Apparatus for fluid treatment for etching for drying etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32715Workpiece holder
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Analytical Chemistry (AREA)
  • Plasma & Fusion (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

本发明提供一种半导体制造装置及半导体制造方法,能够在蚀刻工艺执行时,提高氮化膜的蚀刻选择比。在本发明的半导体制造装置中,在工艺腔室外部由二氟甲烷CH2F2、氮气N2以及氧气O2气体产生等离子体,将产生的等离子体供给到工艺腔室内。根据本发明,无需变更源气体,通过调节氧气的供给量及卡盘的温度,能够将氮化硅膜相对于氧化硅膜的蚀刻选择比与氮化硅膜相对于多晶硅膜的蚀刻选择比的相对大小调节成相反。

The invention provides a semiconductor manufacturing device and a semiconductor manufacturing method, which can improve the etching selectivity of a nitride film when performing an etching process. In the semiconductor manufacturing apparatus of the present invention, plasma is generated from difluoromethane CH 2 F 2 , nitrogen N 2 , and oxygen O 2 gases outside the process chamber, and the generated plasma is supplied into the process chamber. According to the present invention, the ratio of the etching selectivity of the silicon nitride film to the silicon oxide film and the etching selectivity of the silicon nitride film to the polysilicon film can be adjusted by adjusting the supply amount of oxygen gas and the temperature of the chuck without changing the source gas. The relative size is adjusted to the opposite.

Description

半导体制造装置及半导体制造方法Semiconductor manufacturing device and semiconductor manufacturing method

技术领域technical field

本发明涉及一种半导体制造装置及半导体制造方法,更具体地说,涉及一种对基板进行蚀刻的半导体制造装置及半导体制造方法。The present invention relates to a semiconductor manufacturing device and a semiconductor manufacturing method, and more specifically, to a semiconductor manufacturing device and a semiconductor manufacturing method for etching a substrate.

背景技术Background technique

为了制造半导体元件,需要蒸镀、照相、蚀刻、灰化及清洗等多种工艺。其中,蚀刻工艺是去除在晶片等半导体基板上所形成的薄膜中期望区域的薄膜的工艺,最近多采用通过等离子体蚀刻薄膜的方法。在这样的蚀刻工艺中重点考虑的要素中,1个是蚀刻选择比。蚀刻选择比表示了对其他薄膜不进行蚀刻而仅蚀刻欲蚀刻的薄膜的程度。In order to manufacture semiconductor elements, various processes such as vapor deposition, photography, etching, ashing, and cleaning are required. Among them, the etching process is a process for removing a thin film in a desired region of a thin film formed on a semiconductor substrate such as a wafer, and recently, a method of etching a thin film by plasma is often used. One of the important considerations in such an etching process is the etching selectivity. The etching selectivity indicates the degree to which only the thin film to be etched is etched without etching other thin films.

在薄膜中,氮化硅膜(Silicon Nitride、SiN)的蚀刻一般按照以下来进行。首先,将基板放置在工艺腔室内的卡盘(chuck)上,向工艺腔室内供给源气体,由这些气体,在工艺腔室内产生等离子体。等离子体与薄膜进行化学反应而在基板上去除薄膜。作为用于蚀刻氮化硅膜的源气体,常使用四氟化碳(CF4、tetra fluoro methane)、三氟甲烷(CHF3、trifluoro methane)以及氧气O2。但是,使用上述装置构造及上述气体蚀刻氮化硅膜的情况下,即使卡盘的温度或工艺腔室内的压力之类工艺条件进行了各种变化,氮化硅膜相对于氧化硅膜或多晶硅膜的蚀刻选择比也很低,约为30:1至50:1左右。In a thin film, etching of a silicon nitride film (Silicon Nitride, SiN) is generally performed as follows. First, a substrate is placed on a chuck in a process chamber, source gases are supplied into the process chamber, and plasma is generated in the process chamber from these gases. The plasma reacts chemically with the thin film to remove the thin film on the substrate. As a source gas for etching a silicon nitride film, carbon tetrafluoride (CF 4 , tetrafluoromethane), trifluoromethane (CHF 3 , trifluoromethane), and oxygen O 2 are often used. However, in the case of etching the silicon nitride film using the above-mentioned device structure and the above-mentioned gas, even if the process conditions such as the temperature of the chuck and the pressure in the process chamber are changed, the silicon nitride film is relatively weak compared with the silicon oxide film or polysilicon film. The etch selectivity of the membrane is also very low, around 30:1 to 50:1 or so.

另外,一般在进行蚀刻工艺期间,氮化硅膜相对于氧化硅膜的蚀刻选择比与氮化硅膜相对于多晶硅膜的蚀刻选择比的相对大小维持不变,不会大幅度地变更。但是,随着蚀刻工艺的进行,在基板上形成的薄膜的状态变更的情况下,以上述蚀刻方法进行工艺时,会使蚀刻低效率地进行。In addition, generally during the etching process, the relative magnitudes of the etching selectivity ratio of the silicon nitride film to the silicon oxide film and the etching selectivity ratio of the silicon nitride film to the polysilicon film remain unchanged and do not change greatly. However, when the state of the thin film formed on the substrate changes as the etching process progresses, the etching progresses inefficiently when the process is performed by the above etching method.

现有技术文献prior art literature

专利文献patent documents

专利文献1:日本国特开2004-172584号公报Patent Document 1: Japanese Patent Laid-Open No. 2004-172584

发明内容Contents of the invention

本发明的目的在于,提供一种在对基板执行蚀刻工艺时,能够提高氮化膜相对于其他薄膜的蚀刻选择比的半导体制造装置及半导体制造方法。An object of the present invention is to provide a semiconductor manufacturing device and a semiconductor manufacturing method capable of increasing the etching selectivity of a nitride film relative to other thin films when an etching process is performed on a substrate.

另外,本发明的目的在于,提供一种在蚀刻工艺进行的途中,能够调节氮化硅膜相对于氧化硅膜的蚀刻选择比与氮化硅膜相对于多晶硅膜的蚀刻选择比的相对大小的半导体制造装置及半导体制造方法。In addition, an object of the present invention is to provide a method capable of adjusting the relative size of the etching selectivity ratio of the silicon nitride film to the silicon oxide film and the etching selectivity ratio of the silicon nitride film to the polysilicon film during the etching process. Semiconductor manufacturing apparatus and semiconductor manufacturing method.

本发明要解决的课题不限于此,本领域技术人员从以下的记载中能明确理解未提及的其他课题。The problems to be solved by the present invention are not limited thereto, and those skilled in the art will clearly understand other problems not mentioned from the following description.

本发明提供一种半导体制造方法,用于蚀刻在基板上形成的氮化膜。根据本发明的一实施方式,在工艺腔室中形成的基座上放置基板,在上述工艺腔室的外部由第1源气体产生等离子体,将上述等离子体供给到上述工艺腔室,上述第1源气体包含二氟甲烷CH2F2、氮气N2以及氧气O2,在工艺进行的途中,变更上述氧气的供给量或上述工艺腔室的温度。The present invention provides a semiconductor manufacturing method for etching a nitride film formed on a substrate. According to one embodiment of the present invention, a substrate is placed on a susceptor formed in a process chamber, plasma is generated from a first source gas outside the process chamber, the plasma is supplied to the process chamber, and the first 1. The source gas includes difluoromethane CH 2 F 2 , nitrogen N 2 , and oxygen O 2 . During the process, the supply amount of the oxygen gas or the temperature of the process chamber is changed.

根据本发明的上述半导体制造方法,可以使上述氧气的供给量和上述工艺腔室温度中的任一个增加,而使余下的另一个减少。According to the semiconductor manufacturing method of the present invention, any one of the supply amount of the oxygen gas and the temperature of the process chamber can be increased while the other can be decreased.

根据本发明的上述半导体制造方法,上述工艺腔室的温度调节包括上述基座的温度调节。According to the semiconductor manufacturing method of the present invention, the temperature adjustment of the process chamber includes temperature adjustment of the susceptor.

根据本发明的上述半导体制造方法,上述氧气的供给量在100至2000SCCM的范围和2000至2500SCCM的范围之间变更,上述工艺腔室的温度在40℃至70℃的范围和10℃至40℃的范围之间变更。According to the above-mentioned semiconductor manufacturing method of the present invention, the supply amount of the above-mentioned oxygen is changed between the range of 100 to 2000 SCCM and the range of 2000 to 2500 SCCM, and the temperature of the above-mentioned process chamber is in the range of 40°C to 70°C and 10°C to 40°C Change between ranges.

在变更上述氧气的供给量或上述工艺腔室的温度时,可以将上述二氟甲烷的供给量维持恒定。When changing the supply amount of the oxygen gas or the temperature of the process chamber, the supply amount of the difluoromethane can be kept constant.

在变更上述氧气的供给量或上述工艺腔室的温度时,可以变更上述氮气气体的供给量。When changing the supply amount of the oxygen gas or the temperature of the process chamber, the supply amount of the nitrogen gas may be changed.

根据本发明的上述半导体制造方法,在上述工艺进行时,上述基座的温度为0至70℃,上述二氟甲烷CH2F2气体的供给量为10至500SCCM,上述氮气N2气体的供给量为100至2500SCCM,上述氧气O2气体的供给量为100至2500SCCM。另外,上述工艺腔室内的压力为300至1000mTorr。另外,在工艺进行时,为了产生上述等离子体而供给的电力为1000至3000W。According to the above-mentioned semiconductor manufacturing method of the present invention, when the above-mentioned process is carried out, the temperature of the above-mentioned susceptor is 0 to 70° C., the supply amount of the above-mentioned difluoromethane CH 2 F 2 gas is 10 to 500 SCCM, and the supply of the above-mentioned nitrogen N 2 gas is The amount is 100 to 2500SCCM, and the supply amount of the above-mentioned oxygen O2 gas is 100 to 2500SCCM. In addition, the pressure in the process chamber is 300 to 1000 mTorr. In addition, when the process is in progress, the power supplied to generate the plasma is 1000 to 3000W.

根据本发明的上述半导体制造方法,当变更上述氧气的供给量或上述工艺腔室的温度时,上述电力的大小也可变更。According to the semiconductor manufacturing method of the present invention, when the supply amount of the oxygen gas or the temperature of the process chamber is changed, the magnitude of the electric power can also be changed.

另外,可以对向上述工艺腔室供给上述等离子体的通路供给第2源气体,上述第2源气体包含三氟化氮NF3。在蚀刻工艺进行时,上述三氟化氮的供给量大于0且为1000SCCM以下。In addition, a second source gas may be supplied to a passage for supplying the plasma to the process chamber, and the second source gas may contain nitrogen trifluoride NF 3 . When the etching process is performed, the supply amount of the above-mentioned nitrogen trifluoride is greater than 0 and less than or equal to 1000 SCCM.

另外,本发明提供一种半导体制造方法,在形成多晶硅膜、氧化硅膜和氮化硅膜的基板上蚀刻氮化硅膜。根据上述半导体制造方法,在上述基板被载置到工艺腔室内的基座上的状态下,由包含二氟甲烷CH2F2、氮气N2以及氧气O2的第1源气体产生等离子体,蚀刻上述氮化硅膜,通过改变上述氧气的供给量或上述工艺腔室的温度,调节上述氮化硅膜相对于上述氧化硅膜的蚀刻选择比与上述氮化硅膜相对于上述多晶硅膜的蚀刻选择比的相对大小。In addition, the present invention provides a semiconductor manufacturing method of etching a silicon nitride film on a substrate on which a polysilicon film, a silicon oxide film, and a silicon nitride film are formed. According to the semiconductor manufacturing method described above, plasma is generated from a first source gas containing difluoromethane CH 2 F 2 , nitrogen N 2 , and oxygen O 2 in a state where the substrate is placed on a susceptor in a process chamber, Etching the above-mentioned silicon nitride film, by changing the supply amount of the above-mentioned oxygen gas or the temperature of the above-mentioned process chamber, the etching selectivity ratio of the above-mentioned silicon nitride film relative to the above-mentioned silicon oxide film and the ratio of the above-mentioned silicon nitride film relative to the above-mentioned polysilicon film are adjusted. Relative size of etch selectivity.

根据本发明上述半导体制造方法,可以在上述工艺腔室的外部产生上述等离子体后,将上述等离子体供给到上述工艺腔室。According to the semiconductor manufacturing method of the present invention, the plasma may be supplied to the process chamber after the plasma is generated outside the process chamber.

根据本发明上述半导体制造方法,可以使上述氧气的供给量和上述工艺腔室的温度中的任一个增加,而使余下的另一个减少。According to the semiconductor manufacturing method of the present invention, any one of the supply amount of the oxygen gas and the temperature of the process chamber can be increased while the other can be decreased.

根据本发明上述半导体制造方法,上述工艺腔室的温度调节包含调节上述基座的温度,上述氧气的供给量在100至2000SCCM的范围和2000至2500SCCM的范围之间变更,上述基座的温度在40℃至70℃的范围和10℃至40℃的范围之间变更。According to the above-mentioned semiconductor manufacturing method of the present invention, the temperature adjustment of the above-mentioned process chamber includes adjusting the temperature of the above-mentioned susceptor, the supply amount of the above-mentioned oxygen is changed between the range of 100 to 2000 SCCM and the range of 2000 to 2500 SCCM, and the temperature of the above-mentioned susceptor is between It varies between the range of 40°C to 70°C and the range of 10°C to 40°C.

根据本发明上述半导体制造方法,在变更上述氧气的供给量或上述工艺腔室的温度时,可以与上述二氟甲烷与上述氮气的供给量一起变更。另外,在变更上述氧气的供给量或上述工艺腔室的温度时,将上述工艺腔室内的压力维持恒定。According to the semiconductor manufacturing method of the present invention, when changing the supply amount of the oxygen gas or the temperature of the process chamber, the supply amount of the difluoromethane and the nitrogen gas may be changed together. In addition, when changing the supply amount of the oxygen gas or the temperature of the process chamber, the pressure in the process chamber is kept constant.

根据本发明上述半导体制造方法,在变更上述氧气的供给量或上述工艺腔室的温度时,还可以变更为了产生等离子体而供给的电力的大小。According to the semiconductor manufacturing method of the present invention, when changing the supply amount of the oxygen gas or the temperature of the process chamber, it is also possible to change the magnitude of electric power supplied to generate plasma.

根据本发明上述半导体制造方法,上述二氟甲烷CH2F2的供给量为10至500SCCM,上述氮气的供给量为100至2500SCCM,上述氧气的供给量为100至2500SCCM。另外,放置了上述基板的基座的温度为0至70℃,上述工艺腔室内的压力为300至1000mTorr。According to the semiconductor manufacturing method of the present invention, the supply amount of the difluoromethane CH 2 F 2 is 10 to 500 SCCM, the supply amount of the nitrogen gas is 100 to 2500 SCCM, and the supply amount of the oxygen gas is 100 to 2500 SCCM. In addition, the temperature of the susceptor on which the substrate is placed is 0 to 70° C., and the pressure in the process chamber is 300 to 1000 mTorr.

另外,本发明提供一种半导体制造装置。上述半导体制造装置包含:执行蚀刻工艺的工艺单元;等离子体供给单元,该等离子体供给单元被形成在上述工艺单元的外部,用于向上述工艺单元供给等离子体;以及控制器,该控制器控制上述工艺单元和上述等离子体供给单元。上述工艺单元包含:工艺腔室;支撑基板的基座,该基座位于上述工艺腔室内,并具有加热部。上述等离子体供给单元包含:内部具有放电空间的等离子体腔室,该等离子体腔室形成在上述工艺单元的外部;第1源气体供给部,该第1源气体供给部向上述放电空间供给第1源气体;电力施加部,由该电力施加部提供电力,以便在上述放电空间内由第1源气体产生等离子体;以及流入导管,该流入导管构成了将上述放电空间中产生的等离子体供给到上述工艺腔室的通路。上述第1源气体包含二氟甲烷CH2F2、氮气N2以及氧气O2。上述控制器在工艺进行的途中使上述氧气的供给量或上述工艺腔室的温度变更。In addition, the present invention provides a semiconductor manufacturing device. The above-mentioned semiconductor manufacturing apparatus includes: a process unit that performs an etching process; a plasma supply unit formed outside the above-mentioned process unit for supplying plasma to the above-mentioned process unit; and a controller that controls The aforementioned process unit and the aforementioned plasma supply unit. The process unit includes: a process chamber; a base supporting the substrate, the base is located in the process chamber and has a heating part. The plasma supply unit includes: a plasma chamber having a discharge space inside, and the plasma chamber is formed outside the process unit; a first source gas supply part that supplies a first source gas to the discharge space. a gas; a power applying unit that supplies power to generate plasma from the first source gas in the discharge space; and an inflow conduit configured to supply the plasma generated in the discharge space to the access to the process chamber. The first source gas includes difluoromethane CH 2 F 2 , nitrogen N 2 and oxygen O 2 . The controller changes the supply amount of the oxygen gas or the temperature of the process chamber during the progress of the process.

根据本发明的半导体制造装置,上述等离子体腔室在上述工艺腔室的上部与上述工艺腔室结合,上述工艺单元还包含位于上述基座上部的挡板,该挡板在上下方向形成有多个通孔。According to the semiconductor manufacturing device of the present invention, the plasma chamber is combined with the process chamber at the upper part of the process chamber, and the process unit further includes a baffle located at the upper part of the base, and the baffle is formed with a plurality of through hole.

根据本发明的半导体制造装置,上述等离子体供给单元还可包含向通路供给第2源气体的第2源气体供给部,该通路为上述放电空间中产生的上述等离子体流向上述工艺腔室的通路,上述第2源气体包含三氟化氮NF3According to the semiconductor manufacturing apparatus of the present invention, the plasma supply unit may further include a second source gas supply unit that supplies a second source gas to a passage through which the plasma generated in the discharge space flows to the process chamber. , the second source gas contains nitrogen trifluoride NF 3 .

发明效果Invention effect

根据本发明的实施方式,可以在对基板执行蚀刻工艺时,提高氮化膜的蚀刻选择比。According to the embodiments of the present invention, it is possible to increase the etching selectivity of the nitride film when an etching process is performed on the substrate.

另外,根据本发明的实施方式,当利用等离子体对基板执行蚀刻工艺时,能够大幅度地提高氮化硅膜相对于氧化硅膜或多晶硅膜的蚀刻选择比。In addition, according to an embodiment of the present invention, when an etching process is performed on a substrate using plasma, it is possible to greatly increase the etching selectivity of a silicon nitride film with respect to a silicon oxide film or a polysilicon film.

另外,根据本发明的实施方式,通过在进行蚀刻工艺期间变更工艺条件,能够调节氮化硅膜相对于氧化硅膜的蚀刻选择比与氮化硅膜相对于多晶硅膜的蚀刻选择比的相对大小。In addition, according to the embodiment of the present invention, by changing the process conditions during the etching process, it is possible to adjust the relative size of the etching selectivity ratio of the silicon nitride film to the silicon oxide film and the etching selectivity ratio of the silicon nitride film to the polysilicon film. .

另外,根据本发明的实施方式,在使用同一源气体的情况下,还能够变更所使用的氧气气体量及/或工艺腔室的温度,来使氮化硅膜相对于氧化硅膜的蚀刻选择比与氮化硅膜相对于多晶硅膜的蚀刻选择比的相对大小调节为相反。In addition, according to the embodiment of the present invention, in the case of using the same source gas, the amount of oxygen gas used and/or the temperature of the process chamber can also be changed to make the etching selectivity of the silicon nitride film relative to the silicon oxide film The ratio is adjusted inversely to the relative magnitude of the etching selectivity ratio of the silicon nitride film to the polysilicon film.

附图说明Description of drawings

图1是示意地表示本发明一实施方式的半导体制造装置的图。FIG. 1 is a diagram schematically showing a semiconductor manufacturing apparatus according to an embodiment of the present invention.

图2是表示利用图1的装置在第1工艺条件下执行蚀刻工艺时,氮化硅膜相对于氧化硅膜和多晶硅膜的蚀刻选择比的实验例。FIG. 2 is an experimental example showing an etching selectivity ratio of a silicon nitride film to a silicon oxide film and a polysilicon film when an etching process is performed under a first process condition using the apparatus of FIG. 1 .

图3是表示利用图1的装置在第2工艺条件下执行蚀刻工艺时,氮化硅膜相对于氧化硅膜和多晶硅膜的蚀刻选择比的实验例。3 is an experimental example showing an etching selectivity ratio of a silicon nitride film to a silicon oxide film and a polysilicon film when an etching process is performed under a second process condition using the apparatus of FIG. 1 .

图4是表示利用与图1不同的装置构造执行蚀刻工艺时,氮化硅膜相对于氧化硅膜和多晶硅膜的蚀刻选择比的实验例。FIG. 4 is an experimental example showing an etching selectivity ratio of a silicon nitride film to a silicon oxide film and a polysilicon film when an etching process is performed using an apparatus configuration different from that of FIG. 1 .

图5是根据本发明的一实施方式执行蚀刻工艺的方法的流程图。FIG. 5 is a flowchart of a method of performing an etching process according to an embodiment of the present invention.

图中符号说明Description of symbols in the figure

100···工艺腔室100···process chamber

200···排气单元200···Exhaust unit

300···等离子体供给部件300···Plasma supply parts

310···等离子体腔室310···plasma chamber

320···源气体供给部320···Source gas supply unit

330···电力施加部330···Electric power application department

340···流入导管340···inflow conduit

具体实施方式detailed description

下面,参照附图对本发明一实施方式的半导体制造装置及半导体制造方法进行详细说明。在本发明的说明中,针对关联的公知构成或功能的具体说明被判断为有可能模糊本发明的要旨的情况下,则省略其详细说明。Hereinafter, a semiconductor manufacturing apparatus and a semiconductor manufacturing method according to an embodiment of the present invention will be described in detail with reference to the drawings. In the description of the present invention, when it is judged that a specific description of related known configurations or functions may obscure the gist of the present invention, the detailed description will be omitted.

在本实施方式中,基板是半导体晶片。但是,不限于此,基板也可以是玻璃基板等其他种类的基板。In this embodiment, the substrate is a semiconductor wafer. However, it is not limited thereto, and the substrate may be other types of substrates such as glass substrates.

图1是表示本发明一实施方式的半导体制造装置的图。FIG. 1 is a diagram showing a semiconductor manufacturing apparatus according to an embodiment of the present invention.

参照图1,半导体制造装置1利用等离子体来蚀刻基板W上的薄膜。在基板中形成包含多晶硅膜、氧化硅膜以及氮化硅膜的多个膜,想要蚀刻的薄膜是氮化膜。作为一个例子,氮化膜是氮化硅膜(Silicon nitride)。Referring to FIG. 1 , a semiconductor manufacturing apparatus 1 etches a thin film on a substrate W using plasma. A plurality of films including a polysilicon film, a silicon oxide film, and a silicon nitride film are formed on a substrate, and the thin film to be etched is a nitride film. As an example, the nitride film is a silicon nitride film (Silicon nitride).

半导体制造装置1具有工艺单元(processing unit、100)、排气单元(exhausting unit、200)、等离子体供给单元(plasma supplying unit、300)及控制器(未图示)。工艺单元100提供了用于放置基板并执行蚀刻工艺的空间。排气单元200将工艺腔室100内部残留的工艺气体及基板处理过程中所产生的反应产物等排出到外部,将工艺腔室100内的压力维持为设定压力。等离子体供给单元300在工艺单元100的外部根据工艺气体生成等离子体(plasma),将该等离子体供给工艺单元100。控制器控制工艺单元100及等离子体供给单元300。The semiconductor manufacturing apparatus 1 has a processing unit (processing unit, 100 ), an exhausting unit (exhausting unit, 200 ), a plasma supplying unit (plasma supplying unit, 300 ), and a controller (not shown). The process unit 100 provides a space for placing a substrate and performing an etching process. The exhaust unit 200 exhausts the process gas remaining inside the process chamber 100 and the reaction products generated during the substrate processing to the outside to maintain the pressure in the process chamber 100 at a set pressure. The plasma supply unit 300 generates plasma (plasma) from a process gas outside the process unit 100 and supplies the plasma to the process unit 100 . The controller controls the process unit 100 and the plasma supply unit 300 .

工艺单元100具有工艺腔室110、基板支撑部120以及挡板130。工艺腔室110的内部形成了执行基板处理工艺的处理空间111。工艺腔室110的上部壁被开放,也可以在侧壁形成开口(未图示)。基板通过开口,出入工艺腔室110的内部。开口由门(未图示)等开闭部件开闭。在工艺腔室110的底面形成排气孔112。排气孔112连结于排气单元200,提供了将工艺腔室110内部残留的气体和反应产物排出到外部的通路。The process unit 100 has a process chamber 110 , a substrate supporting part 120 and a baffle 130 . The inside of the process chamber 110 forms a processing space 111 in which a substrate processing process is performed. The upper wall of the process chamber 110 is opened, and an opening (not shown) may be formed in a side wall. The substrate enters and exits the process chamber 110 through the opening. The opening is opened and closed by an opening and closing member such as a door (not shown). Exhaust holes 112 are formed on the bottom surface of the process chamber 110 . The exhaust hole 112 is connected to the exhaust unit 200 and provides a passage for exhausting the remaining gas and reaction products inside the process chamber 110 to the outside.

基板支撑部120支撑基板W。基板支撑部120包含基座121和支撑轴122。基座121位于处理空间111内,形成为圆板形状。基座121由支撑轴122支撑。基板W被设置在基座121的上面。在基座121的内部形成有电极(未图示)。电极连结于外部电源,根据施加的电力产生静电。产生的静电使基板W固定在基座121上。在基座121的内部形成有加热部件125。作为一个例子,加热部件125可以是加热线圈。另外,在基座121的内部形成有冷却部件126。冷却部件126由流过冷却水的冷却管线构成。加热部件125将基板W加热到已设定的温度。冷却部件126使基板W强制地冷却。The substrate supporting part 120 supports the substrate W. As shown in FIG. The substrate supporting part 120 includes a base 121 and a supporting shaft 122 . The susceptor 121 is located in the processing space 111 and is formed in a disk shape. The base 121 is supported by a support shaft 122 . The substrate W is provided on the susceptor 121 . Electrodes (not shown) are formed inside the susceptor 121 . The electrodes are connected to an external power source, and static electricity is generated by the applied power. The generated static electricity fixes the substrate W on the susceptor 121 . A heating member 125 is formed inside the susceptor 121 . As an example, the heating element 125 may be a heating coil. In addition, a cooling member 126 is formed inside the base 121 . The cooling unit 126 is constituted by a cooling line through which cooling water flows. The heating unit 125 heats the substrate W to a set temperature. The cooling member 126 forcibly cools the substrate W.

另外,在工艺腔室110的外侧形成有腔壁加热器118。腔壁加热器118形成为线圈形状。选择性地在工艺腔室110的外壁内形成腔壁加热器118。挡板130位于基座121的上部。挡板130形成通孔131。通孔131为从挡板130的上面至下面形成的貫通孔,在挡板130的各区域中均匀地形成。In addition, a chamber wall heater 118 is formed outside the process chamber 110 . The chamber wall heater 118 is formed in a coil shape. A chamber wall heater 118 is optionally formed within an outer wall of the process chamber 110 . The baffle 130 is located on the upper portion of the base 121 . The baffle 130 forms a through hole 131 . The through holes 131 are through holes formed from the top to the bottom of the baffle 130 , and are uniformly formed in each area of the baffle 130 .

再参照图1,等离子体供给单元300位于工艺腔室110的上部。等离子体供给单元300提高使源气体放电,而生成等离子体,并将生成的等离子体供给给处理空间111。等离子体供给单元300包含等离子体腔室310、第1源气体供给部320、第2源气体供给部322、电力施加部330以及流入导管340。Referring again to FIG. 1 , the plasma supply unit 300 is located at an upper portion of the process chamber 110 . The plasma supply unit 300 discharges the source gas to generate plasma, and supplies the generated plasma to the processing space 111 . The plasma supply unit 300 includes a plasma chamber 310 , a first source gas supply unit 320 , a second source gas supply unit 322 , a power application unit 330 , and an inflow conduit 340 .

等离子体腔室310位于工艺腔室110的外部。作为一个例子,等离子体腔室310位于工艺腔室110的上部,与工艺腔室110结合。在等离子体腔室310的内部形成上面及下面开放的放电空间311。等离子体腔室310的上端由气体供给端315密闭。将气体供给端315连结于第1源气体供给部320。第1源气体通过气体供给端315供给到放电空间311。第1源气体包含二氟甲烷(CH2F2、Difluoromethane)、氮气N2以及氧气O2。选择性地,第1源气体还可包含四氟化碳(CF4、Tetrafluoromethane)等其他种类的气体。The plasma chamber 310 is located outside the process chamber 110 . As an example, the plasma chamber 310 is located at an upper portion of the process chamber 110 and is combined with the process chamber 110 . Inside the plasma chamber 310 is formed a discharge space 311 with an open top and bottom. The upper end of the plasma chamber 310 is sealed by a gas supply port 315 . The gas supply end 315 is connected to the first source gas supply part 320 . The first source gas is supplied to the discharge space 311 through the gas supply port 315 . The first source gas contains difluoromethane (CH 2 F 2 , Difluoromethane), nitrogen N 2 , and oxygen O 2 . Optionally, the first source gas may also contain other types of gases such as carbon tetrafluoride (CF 4 , Tetrafluoromethane).

电力施加部330向放电空间311施加高频电力。电力施加部330包含天线331与电源332。The power applying unit 330 applies high-frequency power to the discharge space 311 . The power applying unit 330 includes an antenna 331 and a power source 332 .

天线331是感应耦合型等离子体(ICP)天线,形成为线圈形状。天线331在等离子体腔室310的外部在等离子体腔室310上缠绕多圈。天线331在对应于放电空间311的区域中,缠绕在等离子体腔室310上。天线331的一端连结于电源332,另一端接地。The antenna 331 is an inductively coupled plasma (ICP) antenna formed in a coil shape. The antenna 331 is wound multiple turns on the plasma chamber 310 outside the plasma chamber 310 . The antenna 331 is wound around the plasma chamber 310 in a region corresponding to the discharge space 311 . One end of the antenna 331 is connected to the power source 332, and the other end is grounded.

电源332向天线331供给高频电流。供给天线331的高频电力施加到放电空间311。高频电流在放电空间311中形成感应电场,放电空间311内的第1源气体从感应电场得到离子化所需的能量,变换为等离子体状态。The power supply 332 supplies high-frequency current to the antenna 331 . The high-frequency power supplied to the antenna 331 is applied to the discharge space 311 . The high-frequency current forms an induced electric field in the discharge space 311, and the first source gas in the discharge space 311 obtains energy required for ionization from the induced electric field, and transforms into a plasma state.

电力施加部330的构造不限于上述实例,可以使用由第1源气体产生等离子体的多种构造。The structure of the power application unit 330 is not limited to the above example, and various structures in which plasma is generated from the first source gas can be used.

流入导管340位于等离子体腔室310与工艺腔室110之间。流入导管340将工艺腔室110开放的上面密封,下端与挡板130结合。流入导管340的内部形成流入空间341。流入空间341将放电空间311与处理空间111连接起来,形成了将放电空间311生成的等离子体供给到处理空间111的通路。The inflow conduit 340 is located between the plasma chamber 310 and the process chamber 110 . The inflow conduit 340 seals the open upper surface of the process chamber 110 , and the lower end is combined with the baffle plate 130 . The inside of the inflow duct 340 forms an inflow space 341 . The inflow space 341 connects the discharge space 311 and the processing space 111 , and forms a path for supplying plasma generated in the discharge space 311 to the processing space 111 .

流入空间341可包含流入口341a与扩散空间341b。流入口341a位于放电空间311的下部,与放电空间311连结。放电空间311生成的等离子体通过流入口341a而流入。扩散空间341b位于流入口341a的下部,连结流入口341a与处理空间111。扩散空间341b越向下,则截面积越逐渐变宽。扩散空间341b具有倒漏斗形状。由流入口341a供给的等离子体在通过扩散空间341b的期间被扩散。The inflow space 341 may include an inflow port 341a and a diffusion space 341b. The inflow port 341a is located below the discharge space 311 and connected to the discharge space 311 . Plasma generated in the discharge space 311 flows in through the inflow port 341a. The diffusion space 341b is located under the inlet 341a, and connects the inlet 341a and the processing space 111 . As the diffusion space 341b goes downward, the cross-sectional area gradually becomes wider. The diffusion space 341b has an inverted funnel shape. The plasma supplied from the inflow port 341a is diffused while passing through the diffusion space 341b.

可以在将放电空间311产生的等离子体供给工艺腔室110的通路上连结有第2源气体供给部322。例如,第2源气体供给部322对通路供给第2源气体,该通路为在形成了天线331的下端的位置与形成了扩散空间341b的上端的位置之间流过等离子体的通路。作为一个例子,第2源气体包含三氟化氮NF3(Nitrogen trifluoride)。也可选择性地不供给第2源气体而仅由第1源气体执行蚀刻工艺。A second source gas supply unit 322 may be connected to a passage for supplying plasma generated in the discharge space 311 to the process chamber 110 . For example, the second source gas supply unit 322 supplies the second source gas to a passage through which plasma flows between the position where the lower end of the antenna 331 is formed and the position where the upper end of the diffusion space 341b is formed. As an example, the second source gas contains nitrogen trifluoride NF 3 (Nitrogen trifluoride). Alternatively, the etching process may be performed using only the first source gas without supplying the second source gas.

接着,说明利用图1的半导体制造装置蚀刻基板W的方法。图1的半导体制造装置1是在工艺处理单元100的外部产生等离子体,利用下游(downstream)方式将该等离子体供给到工艺腔室110的远程等离子体装置的一种。根据本实施方式,源气体中使用二氟甲烷CH2F2、三氟化氮NF3、氮气N2以及氧气O2。将二氟甲烷CH2F2、氮气N2以及氧气O2直接供给放电空间311,将三氟化氮NF3供给到用于将放电空间311产生的等离子体供给到工艺腔室110的通路。补充一点,第1源气体中还可使用四氟化碳CF4Next, a method of etching the substrate W using the semiconductor manufacturing apparatus of FIG. 1 will be described. The semiconductor manufacturing apparatus 1 shown in FIG. 1 is a type of remote plasma apparatus that generates plasma outside the processing unit 100 and supplies the plasma to the process chamber 110 in a downstream manner. According to this embodiment, difluoromethane CH 2 F 2 , nitrogen trifluoride NF 3 , nitrogen N 2 , and oxygen O 2 are used as the source gas. Difluoromethane CH 2 F 2 , nitrogen N 2 , and oxygen O 2 are directly supplied to the discharge space 311 , and nitrogen trifluoride NF 3 is supplied to a passage for supplying plasma generated in the discharge space 311 to the process chamber 110 . In addition, carbon tetrafluoride CF 4 may be used as the first source gas.

在蚀刻工艺进行期间,如下提供工艺条件。此时,氮化硅膜相对于氧化硅膜的选择比以约100:1至3000:1实现,氮化硅膜相对于多晶硅膜的选择比以约100:1至1000:1的高选择比实现。During the etching process, process conditions are provided as follows. At this time, the selectivity ratio of the silicon nitride film to the silicon oxide film is realized at about 100:1 to 3000:1, and the selectivity ratio of the silicon nitride film to the polysilicon film is realized at a high selectivity ratio of about 100:1 to 1000:1. accomplish.

(工艺条件)(process conditions)

基座温度:0至70℃Base temperature: 0 to 70°C

二氟甲烷CH2F2气体的供给量:10至500SCCMSupply amount of difluoromethane CH 2 F 2 gas: 10 to 500 SCCM

三氟化氮NF3气体的供给量:0至1000SCCMSupply amount of nitrogen trifluoride NF 3 gas: 0 to 1000SCCM

氮气N2气体的供给量:100至2500SCCMSupply amount of nitrogen N2 gas: 100 to 2500SCCM

氧气O2气体的供给量:100至2500SCCMSupply amount of oxygen O2 gas: 100 to 2500SCCM

电力:1000~3000WPower: 1000~3000W

工艺腔室内的压力:300至1000mTorrPressure in process chamber: 300 to 1000mTorr

在蚀刻工艺执行时,与使用四氟化碳CF4或三氟甲烷CHF3气体作为源气体的情况相比,在一起使用二氟甲烷CH2F2与氮气N2以及氧气O2的情况下,通过同时进行二氟甲烷CH2F2在多晶硅膜(poly silicon)与氧化硅膜(siliconoxide)上形成CxHy聚合物膜的机理、与利用氧气O2与氮气N2去除上述聚合物膜的机理,能够使氮化硅膜相对于多晶硅膜喝氧化硅膜的蚀刻选择比大幅度地增加。When the etching process is performed, in the case of using difluoromethane CH 2 F 2 together with nitrogen N 2 and oxygen O , through the mechanism of difluoromethane CH 2 F 2 forming C x H y polymer film on poly silicon film (poly silicon) and silicon oxide film (silicon oxide) at the same time, and using oxygen O 2 and nitrogen N 2 to remove the above polymer The mechanism of the film can greatly increase the etching selectivity of the silicon nitride film relative to the polysilicon film and the silicon oxide film.

另外,尽管在蚀刻工艺进行的途中在工艺条件中未变更源气体的种类,但也能够变更氮化硅膜相对于氧化硅膜的蚀刻选择比与氮化硅膜相对于多晶硅膜的蚀刻选择比的相对大小。In addition, although the type of source gas is not changed in the process conditions during the etching process, the etching selectivity ratio of the silicon nitride film to the silicon oxide film and the etching selectivity ratio of the silicon nitride film to the polysilicon film can also be changed. relative size.

蚀刻选择比在下面第1工艺条件下,氮化硅膜相对于氧化硅膜的蚀刻选择比比氮化硅膜相对于多晶硅膜的蚀刻选择比高。Etching Selectivity Under the following first process condition, the etching selectivity of the silicon nitride film to the silicon oxide film is higher than the etching selectivity of the silicon nitride film to the polysilicon film.

(第1工艺条件)(1st process condition)

基座温度:0至40℃Base temperature: 0 to 40°C

二氟甲烷CH2F2气体的供给量:10至500SCCMSupply amount of difluoromethane CH 2 F 2 gas: 10 to 500 SCCM

三氟化氮NF3气体的供给量:0至1000SCCMSupply amount of nitrogen trifluoride NF 3 gas: 0 to 1000SCCM

氮气N2气体的供给量:100至2500SCCMSupply amount of nitrogen N2 gas: 100 to 2500SCCM

氧气O2气体的供给量:2000至2500SCCMSupply amount of oxygen O2 gas: 2000 to 2500SCCM

电力:1000~3000WPower: 1000~3000W

工艺腔室内的压力:300至1000mTorrPressure in process chamber: 300 to 1000mTorr

另外,在下面第2工艺条件下,氮化硅膜相对于多晶硅膜的蚀刻选择比比氮化硅膜相对于氧化硅膜的蚀刻选择比高。In addition, under the following second process conditions, the etching selectivity of the silicon nitride film to the polysilicon film is higher than the etching selectivity of the silicon nitride film to the silicon oxide film.

(第2工艺条件)(2nd process condition)

基座温度:40至70℃Base temperature: 40 to 70°C

二氟甲烷CH2F2气体的供给量:10至500SCCMSupply amount of difluoromethane CH 2 F 2 gas: 10 to 500 SCCM

三氟化氮NF3气体的供给量:0至1000SCCMSupply amount of nitrogen trifluoride NF 3 gas: 0 to 1000SCCM

氮气N2气体的供给量:100至2500SCCMSupply amount of nitrogen N2 gas: 100 to 2500SCCM

氧气O2气体的供给量:100至2000SCCMSupply amount of oxygen O2 gas: 100 to 2000SCCM

电力:1000~3000WPower: 1000~3000W

工艺腔室内的压力:300至1000mTorrPressure in process chamber: 300 to 1000mTorr

图2表示在第1工艺条件内的范围下执行蚀刻工艺时,氮化硅膜相对于多晶硅膜和氧化硅膜的蚀刻选择比。图3表示在第2工艺条件的范围内执行蚀刻工艺时,氮化硅膜相对于多晶硅膜和氧化硅膜的蚀刻选择比。参照图2与图3,可知在图2的工艺条件下,氮化硅膜相对于氧化硅膜的蚀刻选择比(180:1)比氮化硅膜相对于多晶硅膜的蚀刻选择比(90:1)高,在图3的工艺条件下,与此相反,氮化硅膜相对于多晶硅膜的蚀刻选择比(170:1)比氮化硅膜相对于氧化硅膜的蚀刻选择比(90:1)比高。FIG. 2 shows the etching selectivity ratio of the silicon nitride film with respect to the polysilicon film and the silicon oxide film when the etching process is performed in the range within the first process condition. FIG. 3 shows the etching selectivity ratio of the silicon nitride film with respect to the polysilicon film and the silicon oxide film when the etching process is performed within the range of the second process condition. 2 and 3, it can be seen that under the process conditions of FIG. 2, the etching selectivity ratio (180:1) of the silicon nitride film relative to the silicon oxide film is higher than the etching selectivity ratio (90:1) of the silicon nitride film relative to the polysilicon film. 1) High, under the process conditions of Figure 3, on the contrary, the etching selectivity ratio (170:1) of the silicon nitride film relative to the polysilicon film is higher than the etching selectivity ratio (90:1) of the silicon nitride film relative to the silicon oxide film. 1) Ratio.

根据本发明的实施方式,不变更源气体的种类,通过调节氧气气体的供给量或工艺腔室内的温度,就可调节氮化硅膜相对于氧化硅膜的蚀刻选择比与氮化硅膜相对于多晶硅膜的蚀刻选择比的相对大小。工艺腔室的温度调节通过变更基座的温度来进行。因此,当向工艺腔室110内供给源气体后执行蚀刻工艺时,在变更基板W上形成的氮化硅膜、氧化硅膜以及多晶硅膜的状态等情况下,也可以不变更源气体的种类,通过调节氮化硅膜相对于氧化硅膜的蚀刻选择比与氮化硅膜相对于多晶硅膜的蚀刻选择比的相对大小来执行工艺。According to the embodiments of the present invention, the etching selectivity ratio of the silicon nitride film relative to the silicon oxide film can be adjusted by adjusting the supply amount of oxygen gas or the temperature in the process chamber without changing the type of source gas. The relative size of the etch selectivity of the polysilicon film. The temperature adjustment of the process chamber is performed by changing the temperature of the susceptor. Therefore, when performing the etching process after supplying the source gas into the process chamber 110, it is not necessary to change the type of the source gas when the state of the silicon nitride film, silicon oxide film, and polysilicon film formed on the substrate W is changed. , the process is performed by adjusting the relative size of the etching selectivity ratio of the silicon nitride film to the silicon oxide film and the etching selectivity ratio of the silicon nitride film to the polysilicon film.

图4是表示在与图1的装置构造不同的工艺腔室内部直接产生等离子体的构造装置中使用二氟甲烷CH2F2、氧气O2、氮气N2以及氩气Ar气体作为源气体来执行蚀刻工艺时,氮化硅膜相对于氧化硅膜和多晶硅膜的蚀刻选择比的实验例。Fig. 4 shows that in a structural device that directly generates plasma inside a process chamber different from that of Fig. 1, difluoromethane CH 2 F 2 , oxygen O 2 , nitrogen N 2 and argon Ar gas are used as source gases. An experimental example of the etching selectivity ratio of a silicon nitride film to a silicon oxide film and a polysilicon film when performing an etching process.

根据图4所示的实验例,可知在如图4所示提供基座的温度、工艺腔室内的压力、二氟甲烷CH2F2、氩气Ar、氧气O2以及氮气N2的供给量还有电力时,氮化硅膜相对于氧化硅膜的蚀刻选择比约为36:1,氮化硅膜相对于多晶硅膜的蚀刻选择比约为48:1,与使用图1的装置构造执行蚀刻工艺时相比,蚀刻选择比相对地非常低。According to the experimental example shown in Figure 4, it can be known that the temperature of the susceptor, the pressure in the process chamber, the supply amount of difluoromethane CH 2 F 2 , argon Ar, oxygen O 2 and nitrogen N 2 are provided as shown in Figure 4 When there is still power, the etching selectivity ratio of the silicon nitride film to the silicon oxide film is about 36:1, and the etching selectivity ratio of the silicon nitride film to the polysilicon film is about 48:1. Compared with the etching process, the etch selectivity is relatively very low.

图5是表示利用图1的装置1来蚀刻氮化硅膜的方法的流程图。下面的蚀刻方法通过控制器控制源气体的流量、基座120的温度、工艺腔室110内的压力、电力的大小等来进行。FIG. 5 is a flowchart showing a method of etching a silicon nitride film using the apparatus 1 of FIG. 1 . The following etching method is performed by controlling the flow rate of the source gas, the temperature of the susceptor 120 , the pressure in the process chamber 110 , the magnitude of electric power, etc. by the controller.

参照图5,首先在基座120上载置基板W(步骤S10)。当初期执行蚀刻工艺时,根据第1工艺条件,按照氮化硅膜相对于氧化硅膜的蚀刻选择比比氮化硅膜相对于多晶硅膜的蚀刻选择比高的方式执行工艺(步骤S20)。之后,若经过一定时间,则在将基板W维持在基座120中的状态下,变更为第2工艺条件(步骤S30)。之后,在第2工艺条件下按照氮化硅膜相对于多晶硅膜的蚀刻选择比比氮化硅膜相对于氧化硅膜的蚀刻选择比高的方式执行工艺(步骤S40)。在从第1工艺条件变更为第2工艺条件时,使氧气气体的供给量、基座120的温度或者氧气气体的供给量和基座120的温度全部变更,二氟甲烷、三氟化氮、氮气气体的供给量及工艺腔室110内的压力维持不变。为了产生等离子体而供给的电力可以维持一定或者进行变更。若工艺完成,则从基座120卸载基板W(步骤S50)。Referring to FIG. 5 , first, a substrate W is placed on a susceptor 120 (step S10 ). When initially performing the etching process, the process is performed such that the etching selectivity of the silicon nitride film to the silicon oxide film is higher than the etching selectivity of the silicon nitride film to the polysilicon film according to the first process condition (step S20 ). Thereafter, when a predetermined time has elapsed, the substrate W is changed to the second process condition while maintaining the substrate W on the susceptor 120 (step S30 ). Thereafter, the process is performed under the second process condition such that the etching selectivity of the silicon nitride film to the polysilicon film is higher than the etching selectivity of the silicon nitride film to the silicon oxide film (step S40 ). When changing from the first process condition to the second process condition, the supply rate of oxygen gas and the temperature of the susceptor 120 or the supply rate of oxygen gas and the temperature of the susceptor 120 are all changed, difluoromethane, nitrogen trifluoride, The supply amount of nitrogen gas and the pressure in the process chamber 110 remain unchanged. The power supplied to generate plasma may be maintained constant or changed. When the process is completed, the substrate W is unloaded from the susceptor 120 (step S50 ).

但是,与此不同,二氟甲烷、三氟化氮、氮气气体的供给量及工艺腔室110内的压力也可以在不影响氮化硅膜相对于多晶硅膜的蚀刻选择比与氮化硅膜相对于氧化硅膜的蚀刻选择比的相对大小的变更的范围内进行变更。However, unlike this, the supply amount of difluoromethane, nitrogen trifluoride, and nitrogen gas and the pressure in the process chamber 110 can also be controlled without affecting the etching selectivity of the silicon nitride film relative to the polysilicon film and the silicon nitride film. Changes are made within the range of changes in the relative size of the etching selectivity ratio to the silicon oxide film.

另外,也可以选择性地,在执行蚀刻工艺的初期,根据第2工艺条件来执行工艺,若经过一定时间,则变更为第1工艺条件来执行工艺。In addition, alternatively, in the initial stage of performing the etching process, the process is performed according to the second process condition, and after a certain period of time, the process is changed to the first process condition to perform the process.

再有,也可以选择性地,边交替地适用第1工艺条件与第2工艺条件,边执行蚀刻工艺。Alternatively, the etching process may be performed while alternately applying the first process condition and the second process condition.

在上述实例中,说明了当从第1工艺条件变更为第2工艺条件时,工艺腔室110内的温度(调节)在调节基座121的温度后进行。但不限于此,工艺腔室110内的温度调节也可通过调节腔壁加热器118的温度来进行,或调节全部腔壁加热器118与基座121的温度来进行。In the above example, when changing from the first process condition to the second process condition, the temperature (adjustment) in the process chamber 110 is performed after adjusting the temperature of the susceptor 121 . But not limited thereto, the temperature adjustment in the process chamber 110 can also be performed by adjusting the temperature of the chamber wall heater 118 , or by adjusting the temperatures of all the chamber wall heaters 118 and the susceptor 121 .

另外,上述实例中,在第1工艺条件与第2工艺条件下氮气气体的供给量恒定进行了说明。但当工艺条件从第1工艺条件变更为第2工艺条件时,也可以使氮气气体的供给量变化。氮气气体的供给量能够调节氮化膜的蚀刻量。例如,使氮气的供给量增加,减少氮化膜的蚀刻量。因此,可以在第1工艺条件与第2工艺条件下利用氮气气体的供给量变化来调节氮化硅膜相对于多晶硅膜的蚀刻选择比与氮化硅膜相对于氧化硅膜的蚀刻选择比,调节其相对大小。In addition, in the above-mentioned example, it was demonstrated that the supply amount of nitrogen gas was constant under the 1st process condition and the 2nd process condition. However, when the process conditions are changed from the first process conditions to the second process conditions, the supply amount of nitrogen gas may be changed. The supply amount of nitrogen gas can adjust the etching amount of the nitride film. For example, the amount of nitrogen gas to be supplied is increased to reduce the amount of etching of the nitride film. Therefore, it is possible to adjust the etching selectivity of the silicon nitride film relative to the polysilicon film and the etching selectivity ratio of the silicon nitride film relative to the silicon oxide film by utilizing the change in the supply amount of the nitrogen gas under the first process condition and the second process condition, Adjust its relative size.

以上的说明不过示例地说明了本发明的技术思想,只要是在本发明所属技术领域中具有通常知识的人员,均可在不脱离本发明的本质特性的范围内进行多种修正及变形。因此,本发明公开的实施方式并不是限定本发明的技术思想,而仅是用于说明,这种实施方式并没有限定本发明的技术思想的范围。本发明的保护范围必需由下面的权利要求进行解释,必需解释为在与权利要求同等范围内的全部技术思想均包含在本发明的权利范围内。The above description is merely an illustration of the technical idea of the present invention, and those who have ordinary knowledge in the technical field to which the present invention pertains can make various corrections and modifications without departing from the essential characteristics of the present invention. Therefore, the embodiments disclosed in the present invention are not intended to limit the technical idea of the present invention, but are for illustration only, and such embodiments do not limit the scope of the technical idea of the present invention. The protection scope of the present invention must be interpreted by the following claims, and it must be interpreted that all technical ideas within the scope equivalent to the claims are included in the scope of the present invention.

Claims (18)

1. a semiconductor making method, for being etched on substrate the nitride film formed, wherein,
Pedestal formed in processing chamber is placed substrate, in the outside of described processing chamber by the 1st Source gas produces plasma, and described plasma is supplied to described processing chamber,
Described 1st source gas comprises difluoromethane CH2F2, nitrogen N2And oxygen O2,
In the way that technique is carried out, change quantity delivered and the temperature of described processing chamber of described oxygen, make institute State any one in the quantity delivered of oxygen and the temperature of described processing chamber to increase, make another reduce,
Wherein, the temperature regulation of described processing chamber includes the temperature regulation of described pedestal,
And the quantity delivered of described oxygen is at the scope of 100 to 2000SCCM and 2000 to 2500SCCM Change between scope, the temperature of described pedestal the scope of 40 DEG C to 70 DEG C and 0 DEG C to 40 DEG C scope it Between change.
Semiconductor making method the most according to claim 1, it is characterised in that:
When changing the temperature of the quantity delivered of described oxygen and described processing chamber, described difluoromethane is supplied Amount remains constant.
Semiconductor making method the most according to claim 1, it is characterised in that:
When changing the temperature of the quantity delivered of described oxygen and described processing chamber, change described nitrogen gas Quantity delivered.
Semiconductor making method the most according to claim 1, it is characterised in that:
Described difluoromethane CH2F2The quantity delivered of gas is 10 to 500SCCM, described nitrogen N2Gas Quantity delivered be 100 to 2500SCCM.
Semiconductor making method the most according to claim 4, it is characterised in that:
Pressure in described processing chamber is 300 to 1000mTorr, supplies to produce described plasma The electric power given is 1000 to 3000W.
Semiconductor making method the most according to claim 4, it is characterised in that:
The path supplying described plasma to described processing chamber is supplied the 2nd source gas,
Described 2nd source gas comprises Nitrogen trifluoride NF3
Semiconductor making method the most according to claim 6, it is characterised in that:
When etch process is carried out, the quantity delivered of described Nitrogen trifluoride is more than 0 and is below 1000SCCM.
8. a semiconductor making method, is forming polysilicon film, silicon oxide film and the substrate of silicon nitride film On, silicon nitride film, wherein,
When having loaded described substrate on the pedestal in processing chamber, by including difluoromethane CH2F2, nitrogen N2And oxygen O2The 1st source gas produce plasma, etch described silicon nitride film, By changing quantity delivered and the temperature of described processing chamber of described oxygen, regulate described silicon nitride film Relative to the etching selectivity of described silicon oxide film and described silicon nitride film relative to the erosion of described polysilicon film Carve the relative size selecting ratio,
Wherein, increase according to any one in the temperature of the quantity delivered and described processing chamber that make described oxygen, Another mode reduced remaining is made to change,
The temperature change of described processing chamber comprises the temperature change of described pedestal, and the quantity delivered of described oxygen Change between the scope and the scope of 2000 to 2500SCCM of 100 to 2000SCCM, described pedestal Temperature change between scope and the scope of 0 DEG C to 40 DEG C of 40 DEG C to 70 DEG C.
Semiconductor making method the most according to claim 8, it is characterised in that:
After the described plasma of outside generation of described processing chamber, it is supplied to described processing chamber.
Semiconductor making method the most according to claim 9, it is characterised in that:
When changing the temperature of the quantity delivered of described oxygen and described processing chamber, by the confession of described difluoromethane Give amount and the pressure remained constant in described processing chamber.
11. semiconductor making methods according to claim 9, it is characterised in that:
When changing the temperature of the quantity delivered of described oxygen and described processing chamber, change the supply of described nitrogen Amount.
12. according to Claim 8 to the semiconductor making method according to any one of 11, it is characterised in that:
Described difluoromethane CH2F2Quantity delivered be 10 to 500SCCM, the quantity delivered of described nitrogen is 100 to 2500SCCM.
13. semiconductor making methods according to claim 12, it is characterised in that:
Pressure in described processing chamber is 300 to 1000mTorr.
14. 1 kinds of semiconductor-fabricating devices, comprise:
Perform the technique unit of etch process;
To the plasma feed unit of described technique unit supply plasma, this plasma feed unit It is formed at the outside of described technique unit;With
Controller, this controller controls described technique unit and described plasma feed unit,
Described technique unit comprises: processing chamber;With
Having the pedestal of heater block, this pedestal is positioned at described processing chamber, supports substrate,
Described plasma feed unit comprises:
At the outside plasma chamber formed of described technique unit, the inside of this plasma chamber has Discharge space;
1st source gas supply part, the 1st source gas supply part supplies the 1st source gas to described discharge space;
Electric power applying unit, by this electric power applying unit provide electric power, with in described discharge space by the 1st source gas Body produces plasma;With
Inflow catheter, this inflow catheter provides and is supplied to described by the plasma of generation in described discharge space The path of processing chamber,
Described 1st source gas comprises difluoromethane CH2F2, nitrogen N2And oxygen O2,
Described controller makes the quantity delivered of described oxygen and the temperature of described pedestal become in the way that technique is carried out More, make any one in the quantity delivered of described oxygen and the temperature of described processing chamber increase, make another subtract It is few,
Wherein, the temperature that the temperature change of described processing chamber comprises described pedestal changes, and described oxygen Quantity delivered changes between the scope and the scope of 2000 to 2500SCCM of 100 to 2000SCCM, institute The temperature stating pedestal changes between scope and the scope of 0 DEG C to 40 DEG C of 40 DEG C to 70 DEG C.
15. semiconductor-fabricating devices according to claim 14, it is characterised in that:
Described plasma chamber is combined with described processing chamber on the top of described processing chamber,
Described technique unit comprises the baffle plate on the top being positioned at described pedestal, and this baffle plate is formed at above-below direction Multiple through holes.
16. semiconductor-fabricating devices according to claim 15, it is characterised in that:
Described plasma feed unit also comprises the 2nd source gas supply to path supply the 2nd source gas Portion, this path is the path that the described plasma produced in described discharge space flows to described processing chamber,
Described 2nd source gas comprises Nitrogen trifluoride NF3
17. 1 kinds of semiconductor making methods, it utilizes partly leading according to any one of claim 14 to 16 System manufacturing apparatus etches nitride film, wherein comprises:
The step of described 1st source gas is supplied to described discharge space;
The step of plasma is produced by described 1st source gas at described discharge space;
The described plasma produced in described discharge space is supplied the step of described processing chamber;With
By the step of the nitride film on substrate described in described plasma etching,
In the way that etch process is carried out, change quantity delivered and the temperature of described processing chamber of described oxygen, make Any one in the quantity delivered of described oxygen and the temperature of described processing chamber increases, and makes another reduce,
Wherein, the temperature that the temperature change of described processing chamber comprises described pedestal changes, and described oxygen Quantity delivered changes between the scope and the scope of 2000 to 2500SCCM of 100 to 2000SCCM, institute The temperature stating pedestal changes between scope and the scope of 0 DEG C to 40 DEG C of 40 DEG C to 70 DEG C.
18. semiconductor making methods according to claim 17, it is characterised in that:
Period, described difluoromethane CH is carried out at described etch process2F2Quantity delivered be 10 to 500SCCM, the quantity delivered of described nitrogen is 100 to 2500SCCM, the pressure in described processing chamber Being 300 to 1000mTorr, described electric power is 1000 to 3000W.
CN201210477226.1A 2011-11-21 2012-11-21 Semiconductor-fabricating device and semiconductor making method Expired - Fee Related CN103137415B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020110121767A KR101276262B1 (en) 2011-11-21 2011-11-21 Apparatus and method for manufacturing semiconductor devices
KR10-2011-0121767 2011-11-21

Publications (2)

Publication Number Publication Date
CN103137415A CN103137415A (en) 2013-06-05
CN103137415B true CN103137415B (en) 2016-08-10

Family

ID=48497076

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201210477226.1A Expired - Fee Related CN103137415B (en) 2011-11-21 2012-11-21 Semiconductor-fabricating device and semiconductor making method

Country Status (4)

Country Link
JP (1) JP2013110415A (en)
KR (1) KR101276262B1 (en)
CN (1) CN103137415B (en)
TW (1) TWI487023B (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101526507B1 (en) * 2013-11-15 2015-06-09 피에스케이 주식회사 Apparatus and method for treating substrate
KR101629770B1 (en) * 2013-12-03 2016-06-24 피에스케이 주식회사 Method for temperature compensation and appratus for manufacturing semiconductor devices
JP5800969B1 (en) * 2014-08-27 2015-10-28 株式会社日立国際電気 Substrate processing apparatus, semiconductor device manufacturing method, program, and recording medium
KR102496037B1 (en) 2016-01-20 2023-02-06 삼성전자주식회사 method and apparatus for plasma etching
WO2017176027A1 (en) * 2016-04-05 2017-10-12 주식회사 테스 Method for selectively etching silicon oxide film
KR20170123740A (en) * 2016-04-29 2017-11-09 피에스케이 주식회사 Apparatus and method for treating substrate
CN111489954A (en) * 2019-01-25 2020-08-04 东莞新科技术研究开发有限公司 Method for removing nitride after semiconductor substrate etching
CN111696863B (en) * 2019-03-15 2024-04-12 北京北方华创微电子装备有限公司 Silicon dielectric material etching method
CN113223925A (en) * 2020-01-21 2021-08-06 东莞新科技术研究开发有限公司 Method for removing residual substance on surface of substrate
CN114068299A (en) * 2020-08-03 2022-02-18 东莞新科技术研究开发有限公司 Method for polishing surface of substrate

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5620559A (en) * 1994-03-18 1997-04-15 Fujitsu Limited Hydrogen radical processing
CN101064272A (en) * 2006-04-28 2007-10-31 应用材料股份有限公司 Plasma etch process using polymerizing etch gases
CN101582374A (en) * 2008-05-15 2009-11-18 周星工程股份有限公司 Method of forming a thin film pattern for semiconductor device and apparatus for the same

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100430189B1 (en) * 1996-10-11 2004-05-03 동경 엘렉트론 주식회사 Plasma etching method
JP4906425B2 (en) * 2006-07-26 2012-03-28 株式会社日立ハイテクノロジーズ Plasma processing equipment
KR20080042264A (en) * 2006-11-09 2008-05-15 주식회사 하이닉스반도체 Semiconductor device manufacturing method
US7871926B2 (en) * 2007-10-22 2011-01-18 Applied Materials, Inc. Methods and systems for forming at least one dielectric layer
CN103035516A (en) * 2008-09-25 2013-04-10 积水化学工业株式会社 Method and apparatus for etching silicon-containing film

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5620559A (en) * 1994-03-18 1997-04-15 Fujitsu Limited Hydrogen radical processing
CN101064272A (en) * 2006-04-28 2007-10-31 应用材料股份有限公司 Plasma etch process using polymerizing etch gases
CN101582374A (en) * 2008-05-15 2009-11-18 周星工程股份有限公司 Method of forming a thin film pattern for semiconductor device and apparatus for the same

Also Published As

Publication number Publication date
KR20130056040A (en) 2013-05-29
JP2013110415A (en) 2013-06-06
TW201327674A (en) 2013-07-01
KR101276262B1 (en) 2013-06-20
CN103137415A (en) 2013-06-05
TWI487023B (en) 2015-06-01

Similar Documents

Publication Publication Date Title
CN103137415B (en) Semiconductor-fabricating device and semiconductor making method
US20200035497A1 (en) Processing apparatus
JP5925802B2 (en) Uniform dry etching in two stages
US9523150B2 (en) Substrate processing apparatus, method for manufacturing semiconductor device and computer-readable recording medium
JP5661523B2 (en) Film forming method and film forming apparatus
TWI497582B (en) Silicon-selective dry etch for carbon-containing films
KR20190026589A (en) Etching method
JP5767199B2 (en) Semiconductor manufacturing apparatus and semiconductor manufacturing method
JP7336365B2 (en) METHOD AND PLASMA PROCESSING APPARATUS FOR ETCHING FILM
TWI806362B (en) Isotropic etching of film with atomic layer control
US10629450B2 (en) Method for selectively etching silicon oxide film
US9508531B2 (en) Method of manufacturing semiconductor device by alternatively increasing and decreasing pressure of process chamber
TWI405260B (en) A plasma etching treatment method and a plasma etching processing apparatus
KR102304163B1 (en) Etching method
KR20210097045A (en) Etching method, substrate processing apparatus, and substrate processing system
TWI768564B (en) Hydrogen plasma based cleaning process for etch hardware
CN111834202B (en) Substrate processing method and substrate processing device
WO2014034674A1 (en) Plasma processing method and plasma processing device
TW202514790A (en) Selective etching of silicon-and-germanium-containing materials with increased surface purities
KR101098975B1 (en) Substrate processing apparatus
CN115763239A (en) Method and apparatus for processing substrate
CN111916349B (en) Silicon etching method
US12334331B2 (en) Substrate processing method and plasma processing apparatus
US20240234097A1 (en) Etching method and plasma processing apparatus
KR20250021872A (en) Selective atomic layer etching method for dose

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20160810

CF01 Termination of patent right due to non-payment of annual fee