CN103130179A - Method of manufacturing resonant transducer - Google Patents
Method of manufacturing resonant transducer Download PDFInfo
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- CN103130179A CN103130179A CN2012105103128A CN201210510312A CN103130179A CN 103130179 A CN103130179 A CN 103130179A CN 2012105103128 A CN2012105103128 A CN 2012105103128A CN 201210510312 A CN201210510312 A CN 201210510312A CN 103130179 A CN103130179 A CN 103130179A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
- H04R31/00—Apparatus or processes specially adapted for the manufacture of transducers or diaphragms therefor
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00134—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems comprising flexible or deformable structures
- B81C1/0015—Cantilevers
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00642—Manufacture or treatment of devices or systems in or on a substrate for improving the physical properties of a device
- B81C1/0065—Mechanical properties
- B81C1/00666—Treatments for controlling internal stress or strain in MEMS structures
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
- H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
- H03H3/0072—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks of microelectro-mechanical resonators or networks
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2201/00—Specific applications of microelectromechanical systems
- B81B2201/02—Sensors
- B81B2201/0271—Resonators; ultrasonic resonators
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C2201/00—Manufacture or treatment of microstructural devices or systems
- B81C2201/01—Manufacture or treatment of microstructural devices or systems in or on a substrate
- B81C2201/0161—Controlling physical properties of the material
- B81C2201/0163—Controlling internal stress of deposited layers
- B81C2201/0164—Controlling internal stress of deposited layers by doping the layer
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C2201/00—Manufacture or treatment of microstructural devices or systems
- B81C2201/01—Manufacture or treatment of microstructural devices or systems in or on a substrate
- B81C2201/0161—Controlling physical properties of the material
- B81C2201/0171—Doping materials
- B81C2201/0173—Thermo-migration of impurities from a solid, e.g. from a doped deposited layer
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49005—Acoustic transducer
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- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Mechanical Engineering (AREA)
- Physics & Mathematics (AREA)
- Acoustics & Sound (AREA)
- Signal Processing (AREA)
- Pressure Sensors (AREA)
- Measuring Fluid Pressure (AREA)
- Transducers For Ultrasonic Waves (AREA)
Abstract
A method of manufacturing a resonant transducer having a vibration beam includes: (a) providing an SOI substrate including: a first silicon layer; a silicon oxide layer on the first silicon layer; and a second silicon layer on the silicon oxide layer; (b) forming a first gap and second gap through the second silicon layer by etching the second silicon layer using the silicon oxide layer as an etching stop layer; (c) forming an impurity diffusion source layer on the second silicon layer; (d) forming an impurity diffused layer in a surface portion of the second silicon layer; (e) removing the impurity diffusion source layer through etching; and (f) removing at least a portion of the silicon oxide layer through etching such that an air gap is formed between the first silicon layer and a region of the second silicon layer surrounded by the first and second gaps.
Description
The application requires the priority of No. the 2011-264543rd, the Japanese patent application submitted on December 2nd, 2011, and its full content is incorporated herein by reference.
Technical field
The embodiment that describes herein relates to the method for making resonant transducer.
Background technology
Fig. 6-Figure 17 shows the formation of necessary part of the resonant transducer of correlation technique.
Fig. 6 shows the structure of necessary assembly, and Fig. 7-Figure 15 shows manufacture process, and Figure 16 A and 16B show the circuit corresponding to the necessary assembly of Fig. 6, and Figure 17 shows the operation of the resonant transducer of correlation technique.
The below will describe manufacture process.As shown in Figure 7, silicon oxide film 10a is formed on n-type monocrystalline substrate 1 and then is patterned.Remove in the zone at oxide-film and form groove by substrate is carried out undercutting in substrate 1, by selective epitaxial growth, with 10
18cm
-3Boron concentration form p+ monocrystalline silicon 11 at this.
Then, on the surface of p+ monocrystalline silicon layer 11 with 3 * 10
19cm
-3Or the higher boron concentration p++ monocrystalline silicon 12a that upwards grows.P++ monocrystalline silicon layer 12a back is as walking beam 3, and the back is forming the gap below walking beam in the current space that is taken by p+ monocrystalline silicon layer 11.Then, as shown in Figure 8, silicon oxide film 10b is formed on the surface of substrate 1 on the surface that comprises p++ monocrystalline silicon layer 12a.The groove D back of removing that silicon oxide film 10b forms by part will be as the grounded part to the housing 4 of substrate 1.
Then, as shown in Figure 9, silicon nitride film 13 is formed on the surface of silicon oxide film 10b and the inside of groove D, then is patterned.The back will be at the current p++ of being positioned at monocrystalline silicon layer 12a(walking beam 3) on silicon oxide film 10b and those parts of silicon nitride film 13 spaces of taking in, form the gap above walking beam 3.Capacitance is determined by the thickness of these films and the area of walking beam 3.Therefore, by these sizes of suitable adjusting, can optimize the required capacitance of driving walking beam 3 and detect required capacitances by walking beam 3.
Then, as shown in Figure 10, p++ polysilicon 14 is formed on whole surface and is patterned to be formed for the etching liquid introducing hole E of sacrificial layer etching.P++ polysilicon layer 14 back will be as the interconnection of drawing from housing 4 to electrode.This interconnection can be with p++/p+ monocrystalline silicon or by before selective epitaxial growth, Impurity Diffusion being formed to silicon substrate 1.By make silicon substrate 1 and the interconnection between the minimized method of parasitic capacitance form the interconnection be favourable.
Next, as shown in figure 11, hydrofluoric acid is introduced hole E by etching liquid and is introduced into, and therefore, part silicon nitride film 13 and partial oxidation silicon fiml 10b are removed.To the coupling part of silicon substrate 1, silicon nitride film 13 is because its low rate of etch is used as etch stop layer.
Then, as shown in figure 12, p+ monocrystalline silicon layer 11 is removed by alkaline solution (for example, hydrazine, KOH or TMAH).P++ monocrystalline silicon layer 12a and p++ polysilicon 14 are all not etched because of its high impurity concentration.In using the alkaline solution etching process, n-type silicon substrate 1 can prevent etched by it being applied 1 to 2V voltage.Utilization is<111〉rate of etch of monocrystalline silicon on direction is the low fact, walking beam 3 vertically on etching be prevented from.
Then, as shown in figure 13, (by the SiO that forms by sputter
2, glass etc. makes) seal member 15 is by formation such as sputter, evaporation, CVD, epitaxial growths, so etching liquid introduces hole E and be closed, and forms slight vacuum chamber 5.Electric insulation between housing 4 and walking beam 3 can be by for example becoming more stable by thermal oxidation forming silicon oxide layer on the surface of walking beam 3 and on the inner surface of vacuum chamber 5 before this step.In this case, seal member can be made by conductive material.
Then, as shown in Figure 14, the electrical interconnection of drawing from walking beam 3 and housing 4 forms by p++ polysilicon layer 14 is carried out patterning, and has formed pad electrode.
Then, as shown in figure 15, by forming barrier film from thinning back side silicon substrate 1.
Figure 16 A shows by p++ polysilicon layer 14 being carried out patterning and electrical interconnection 20 is formed the plane that is connected to the state that walking beam 3 and housing 4 and pad A1 electrode 21 also formed.
Figure 16 B is the circuit diagram of resonant transducer that comprises the assembly of Fig. 6.In Figure 16 B, Vb represents bias voltage (constant voltage); Vi represents driving voltage (AC voltage); R1 and R2 represent line resistance; And R3 represents resistance substrate.C1 represents the electric capacity between walking beam 3 and housing 4, and C2 represents parasitic capacitance, and C3 and C4 represent substrate 1 and the electric capacity between 20 of interconnecting.The value of these parameters is determined by pattern and other factors of interconnection forming method, interconnection 20.Determine these factors for the value that minimizes these parameters.
With reference to figure 16B, if the capacitor C 1 between walking beam 3 and housing 4 is constant, the amplitude of output current is with (C1+C2) Vi ω is proportional, and wherein ω is the frequency of driving voltage Vi.On the other hand, when capacitor C 1 during at frequencies omega resonance, increased amplitude approximately to the proportional electric current of Δ C1Vb ω, wherein Δ C1 is the variation composition of the C1 that causes due to resonance.Determine resonant frequency with this curent change.
Incidentally, if the incipient extension strain is not applied to walking beam 3 when even having gaging pressure Pm, walking beam 3 may be out of shape due to gaging pressure Pm, causes the state that can not measure.In addition, unless the change of incipient extension strain is controlled, otherwise the sensitivity meeting changes inadequately.This will be described below.
Figure 17 shows the covalent radius Ri of various impurity, and with the covalent radius R of silicon
SiThe ratio.
As shown in figure 17, the covalent radius Ri of phosphorus (P) and boron (B) is respectively
With
It all is shorter than
The covalent radius R of silicon (Si)
SiTherefore, when boron or phosphorus are injected into monocrystalline silicon, elongation strain occurs in the injection region.In the situation that boron, this strain approximates greatly 4 * 10
-4ε (=2 * 10
-3/ 5.431), this is because boron is 10 in its concentration
20cm
-3The time being changed to of lattice paprmeter
And the lattice paprmeter of silicon is
Greater than 4 * 10
-4The strain of ε can produce by following mode.For example, if boron is to be twice in 2 * 20 of above-mentioned value
20cm
-3Concentration be injected into, occur pro rata 8 * 10 with injection rate
-4The incipient extension strain of ε.Therefore, by obtaining the arbitrary initial elongation strain with the debita spissitudo B Implanted.
Based on above-mentioned theory, the walking beam 3 shown in Fig. 6 has been provided the incipient extension strain.The strain that gives walking beam 3 can become less than 4 * 10 by the boron concentration that increases the boron concentration in n-type silicon substrate 1 or reduce in walking beam 3
-4ε wherein, reduces concentration in boron walking beam 3 and is by walking beam 3 being carried out oxidation and then remove boron atom in the near surface that oxide-film makes walking beam 3 with BHF and separate in oxide and realize.When boron concentration approximates 10
17cm
-3The time, almost do not have strain that (for example, seeing JP-A-01-299428 and JP-A-2005-037309) occurs.
Above-mentioned traditional resonant transducer has following problem.Perpendicular to substrate 1 vibration, and walking beam 3, exciting electrode and vibration detection electrode have stepped construction due to walking beam 3, so manufacture process needs a lot of processing steps.Due in forming walking beam 3, carry out the selective etch that utilizes impurity concentration difference, so boron concentration should be set to larger than 4 * 10
19cm
-3
In epitaxy method, because have defective and dislocation in walking beam 3, thus be difficult to control exactly the elongation strain of walking beam 3, and walking beam 3 can not be given and high elongation strain when it is very thick.In addition, the stretched film strain that is caused by impurity may make wafer distortion.Like this, in epitaxy method, can not form thick and to the walking beam 3 of high elongation strain.On the other hand, for the diffusion method by correlation technique forms walking beam 3 thick and that give high elongation strain, needing increases diffusion length, causes diffusion time elongated.For example can not obtain the high elongation strain greater than 300 μ ε.
In addition, in epitaxy, can not be formed on walking beam thick on short transverse 3, because in the situation that it is thicker than about 5 μ m, elongation strain reduces.
Summary of the invention
An illustrative aspects of the present invention provide a kind of have high accuracy and to the resonant transducer of the walking beam of high elongation strain.
According to one or more illustrative aspects of the present invention, provide a kind of manufacturing to have the method for the resonant transducer of walking beam.The method comprises: the SOI substrate (a) is provided, and the SOI substrate comprises: the first silicon layer; Silicon oxide layer on the first silicon layer; And the second silicon layer on silicon oxide layer; (b) the first gap and the second gap by coming etching the second silicon layer to form to pass the second silicon layer as etch stop layer with silicon oxide layer; (c) form the impurity diffusion source layer on the second silicon layer, wherein this impurity diffusion source layer is configured in Impurity Diffusion to the second silicon layer; (d) form impurity diffusion layer by for the heat treatment of SOI substrate, the impurity from the impurity diffusion source layer being spread in the surface portion of the second silicon layer; (e) remove the impurity diffusion source layer by etching; And at least a portion that (f) removes silicon oxide layer by etching, so that the first silicon layer and the second silicon layer by the first gap and the second gap around the zone between form the air gap, wherein the second silicon layer by the first gap and the second gap around the zone as walking beam.
According to one or more illustrative aspects of the present invention, step (e) and (f) execution simultaneously.
According to one or more illustrative aspects of the present invention, step (f) is carried out afterwards in step (e).
According to one or more illustrative aspects of the present invention, the impurity diffusion source layer is configured to and will comprises that its radius is shorter than in Impurity Diffusion to the second silicon layer of atom of silicon radius.
According to one or more illustrative aspects of the present invention, impurity comprises boron or phosphorus.
According to one or more illustrative aspects of the present invention, arrange that (c) carries out afterwards in step (b).Step (c) comprising: (i) on the upper surface of the second silicon layer, on the second silicon layer and inner wall surface the first gap and the second gap-contact and silicon oxide layer pass through form the impurity diffusion source layer on part that the first gap and the second gap expose.
According to one or more illustrative aspects of the present invention, step (b) is carried out afterwards in step (c).Step (b) comprising: form the first gap and the second gap of passing impurity diffusion source layer and the second silicon layer.
According to one or more illustrative aspects of the present invention, the method also comprises: (g) form mask layer on the second silicon layer, wherein mask layer is configured to regulate the impurity level that will be flooded to the impurity in the second silicon layer.Step (c) comprising: form the impurity diffusion source layer on mask layer.
According to one or more illustrative aspects of the present invention, step (c) is carried out afterwards in step (b), and step (g) is carried out between step (b) and step (c).Step (g) comprising: (i) on the upper surface of the second silicon layer, on the second silicon layer and inner wall surface the first gap and the second gap-contact and silicon oxide layer pass through form mask layer on part that the first gap and the second gap expose.Step (c) comprising: (i) form the impurity diffusion source layer on mask layer.
According to one or more illustrative aspects of the present invention, step (c) is carried out afterwards in step (b), and step (g) is carried out between step (a) and step (b).Step (b) comprising: (i) form the first gap and the second gap of passing mask layer and the second silicon layer.Step (c) comprising: (i) on mask layer, on the second silicon layer and inner wall surface the first gap and the second gap-contact and silicon oxide layer pass through form the impurity diffusion source layer on part that the first gap and the second gap expose.
According to one or more illustrative aspects of the present invention, if even do not give elongation strain to walking beam when walking beam not being applied gaging pressure, walking beam may be out of shape when it is applied gaging pressure, causes carrying out the state of measurement.Given this, for example give walking beam less than the boron (B) of silicon (Si) or the impurity of phosphorus (P) with elongation strain on atomic radius by adding to walking beam.
The required diffusion length of elongation strain that produces expectation can shorten from three directions diffuse to walking beam with it after walking beam forms by impurity.The advantage that the diffusion length that shortens provides necessary heat treatment time greatly to shorten and the degree of the wafer distortion that causes due to membrane stress reduces greatly.
High elongation strain can be by being controlled to be up to the value corresponding to the terminal solid solubility of the boron in silicon almost and obtaining by regulating heat treated duration and the temperature impurity concentration with walking beam.
Can form by the irrealizable thick walking beam that is given high elongation strain of epitaxy.
This manufacture method has also solved PBF solution when it is applied to by the first gap and the definition of the second gap surperficial, can not be easily introduced into the first gap with high-aspect-ratio and the problem in the second gap.
Other aspects of the present invention and advantage will be apparent from following description, accompanying drawing and claim.
Description of drawings
Figure 1A and 1B show the structure of the necessary part of the resonant transducer of making by manufacturing method according to the invention;
Fig. 2 A-2E shows the sectional view of the manufacture process of the necessary part of resonant transducer according to an embodiment of the invention;
Fig. 3 A-3E shows the sectional view of the manufacture process of necessary part according to another embodiment of the present invention;
Fig. 4 A-4E shows the sectional view of the manufacture process of necessary part according to still another embodiment of the invention;
Fig. 5 A-5E shows according to the sectional view of the manufacture process of the necessary part of an embodiment more of the present invention;
Fig. 6 shows the structure of necessary part of the resonant transducer of correlation technique;
Fig. 7 shows first sectional view of manufacture process of necessary part of the resonant transducer of the correlation technique shown in Fig. 6;
Fig. 8 shows second sectional view of manufacture process of necessary part of the resonant transducer of the correlation technique shown in Fig. 6;
Fig. 9 shows the 3rd sectional view of manufacture process of necessary part of the resonant transducer of the correlation technique shown in Fig. 6;
Figure 10 shows the 4th sectional view of manufacture process of necessary part of the resonant transducer of the correlation technique shown in Fig. 6;
Figure 11 shows the 5th sectional view of manufacture process of necessary part of the resonant transducer of the correlation technique shown in Fig. 6;
Figure 12 shows the 6th sectional view of manufacture process of necessary part of the resonant transducer of the correlation technique shown in Fig. 6;
Figure 13 shows the 7th sectional view of manufacture process of necessary part of the resonant transducer of the correlation technique shown in Fig. 6;
Figure 14 shows the 8th sectional view of manufacture process of necessary part of the resonant transducer of the correlation technique shown in Fig. 6;
Figure 15 shows the 9th sectional view of manufacture process of necessary part of the resonant transducer of the correlation technique shown in Fig. 6;
Figure 16 A and 16B show the circuit corresponding to the necessary part of the resonant transducer of the correlation technique shown in Fig. 6; And
Figure 17 shows the form how necessary part of the resonant transducer of the correlation technique shown in Fig. 6 works.
The specific embodiment
Hereinafter, exemplary embodiment of the present invention will be described with reference to the drawings.At all figure that are used for explaining embodiment, the parts with identical function represent with same reference numerals, and will omit being repeated in this description it.
Figure 1A and 1B are respectively plane and sectional view, show the structure of the necessary part of the exemplary resonant formula sensor of making by manufacturing method according to the invention.The diagram identical with Figure 1A and 1B is disclosed in disclosed US2012/0060607 A1 on March 15th, 2012 putting forward intersecting and merging by the applicant Yokogawa Electric Corporation on September 9th, 2011.
With reference to Figure 1A and 1B, walking beam 32 is the monocrystalline silicon that is arranged in vacuum chamber 33, and perpendicular to substrate 31(measuring diaphragm) the direction on surface 311 in long in than the direction parallel with the surface 311 in the cross section shown in Figure 1B.
The first battery lead plate 34 similar plates of shape are arranged in parallel with the surface 311 of substrate 31, and at one end are connected with walking beam 32.The second battery lead plate 35 and the third electrode plate 36 similar plates of shape are arranged in parallel with the surface 311 of substrate 31, and with walking beam 32 toward each other, and have the first gap 37 and the second gap 38 between the second battery lead plate 35 and third electrode plate 36 and walking beam 32.The upper surface of walking beam 32, the first battery lead plate 34, the second battery lead plate 35 and third electrode plate 36 are parallel with the surface 311 of substrate 31, and flush each other.
Fig. 2 A-2E shows the manufacture process of the necessary part of resonant transducer according to an embodiment of the invention.
Fig. 2 C shows the formation step of impurity diffusion source layer.The impurity diffusion source layer 102 that is used for giving walking beam 32 tensile stresses is formed on by the surface of the silicon oxide layer of the first gap 37 and the 38 SOI substrates 101 that expose, is formed on walking beam 32 and is positioned at the passing the first gap and the second gap 37 and 38 surfaces opposite to each other and be formed on the upper surface of walking beam 32 and be positioned at the upper surface of silicon layer of a side of SOI substrate 101 of silicon layer of a side of SOI substrate 101.Impurity diffusion source layer 102 also is configured to Impurity Diffusion to the silicon layer of SOI substrate 101.
Fig. 2 D shows the formation step of impurity diffusion layer.Carry out heat treatment, thereby impurity diffuses to walking beam 32 and the silicon layer (having formed impurity diffusion layer 103) that is arranged in SOI substrate 101 1 sides from impurity diffusion source layer 102.That is, be suitable for specifying the temperature of impurity concentration and the heat treatment of duration by having, for example the Impurity Diffusion of boron (B) is to walking beam 32 and the silicon layer (having formed impurity diffusion layer 103) that is arranged in SOI substrate 101 1 sides.Given elongation strain to walking beam 32 and silicon layer like this.
Fig. 2 E shows the separating step of walking beam.By in same step side by side or the partial oxidation silicon layer that sequentially etches away impurity diffusion source layer 102 and SOI substrate 101 in different step separate walking beam 32.For example, separate walking beam 32 by this structure being immersed in the partial oxidation silicon layer that etches away impurity diffusion source layer 102 and SOI substrate 101 in hydrofluoric acid.
If do not give elongation strain to it when walking beam 32 not being applied gaging pressure, walking beam 32 may be out of shape when it is applied gaging pressure, causes the state that can not measure.Given this, by adding such as give walking beam 32 less than the boron (B) of silicon (Si) or the impurity of phosphorus (P) with elongation strain on atomic radius to walking beam 32.
Producing the required diffusion length of the elongation strain of expectation can be by after walking beam forms, and impurity is diffused to walking beam 32 and shortens from three direction.The advantage that the diffusion length that shortens provides necessary heat treatment time greatly to be shortened and the degree of the wafer distortion that causes due to membrane stress reduces.
High elongation strain can be by obtaining by regulating the value that heat treated duration and the temperature impurity concentration maximum with walking beam 32 controls to almost corresponding to the terminal solid solubility of the boron in silicon.
Can form by the irrealizable thick walking beam 32 with high elongation strain of epitaxy.
Fig. 3 A-Fig. 3 E shows the manufacture process of the necessary part of resonant transducer according to another embodiment of the present invention.
Prepare as shown in Figure 3A SOI substrate 101.Fig. 3 B shows the formation step of elongation strain regulating course.The elongation strain regulating course 201 that can regulate the elongation strain that will apply is formed on the surface of a side of the silicon layer that is positioned at SOI substrate 101.In this example, elongation strain regulating course 201 is silica (SiO
2) layer.Yet, the unnecessary always silica of elongation strain regulating course 201 (SiO
2) layer, and can comprise a plurality of layers.
Fig. 3 C shows the formation step in the first gap and the second gap.The first gap 37 and the second gap 38 are passed elongation strain regulating course 201 by etching and are formed with the silicon layer that is positioned at a side of SOI substrate 101.In other words, elongation strain regulating course 201 is impurity level regulating courses, is configured to regulate the impurity level of the impurity in the silicon layer that will diffuse to SOI substrate 101.
Fig. 3 D shows the formation step of impurity diffusion source layer.Be used for the impurity diffusion source layer 202 that tensile stress gives walking beam 32 is formed on by the surface of the silicon oxide layer of the first and second gaps 37 and the 38 SOI substrates 101 that expose, is formed on walking beam 32 and is positioned at the surface of passing the first gap 37 and the second gap 38 surfaces opposite to each other and being formed on elongation strain regulating course 201 of the silicon layer of SOI substrate 101 1 sides.Impurity diffusion source layer 202 also is configured to Impurity Diffusion to the silicon layer of SOI substrate 101.
Fig. 3 E shows the formation step of impurity diffusion layer.Heat treatment is performed, thereby impurity diffuses to walking beam 32 and is positioned at silicon layer (having formed impurity diffusion layer 203) on a side of SOI substrate 101 from impurity diffusion source layer 202.
Then, although do not use accompanying drawing because this step is similar to the step of Fig. 2 E, separate walking beam 32 by the partial oxidation silicon layer that etches away impurity diffusion source layer 102 and SOI substrate 101.
If even it is not applied elongation strain when walking beam 32 not being applied gaging pressure, walking beam 32 may be out of shape when it is applied gaging pressure, causes the state that can not measure.Given this, by adding such as give walking beam 32 less than the boron (B) of silicon (Si) or the impurity of phosphorus (P) with elongation strain on atomic radius to walking beam 32.
Producing the required diffusion length of the elongation strain of expectation can be by after walking beam forms, and impurity is diffused to walking beam 32 and shortens from three direction.The advantage that the diffusion length that shortens provides necessary heat treatment time greatly to be shortened and the degree of the wafer distortion that causes due to membrane stress reduces.
High elongation strain can be by obtaining by regulating the value that heat treated duration and the temperature impurity concentration maximum with walking beam 32 controls to almost corresponding to the terminal solid solubility of the boron in silicon.
Can form by the irrealizable thick walking beam 32 with high elongation strain of epitaxy.
Impurity Diffusion to the walking beam 32 of Tensile strain adjusted layer 201 protection can be regulated by the thickness of elongation strain regulating course 201 with the degree of the silicon layer of a side that is positioned at SOI substrate 101.
Fig. 4 A-Fig. 4 E shows the manufacture process of the necessary part of resonant transducer according to another embodiment of the present invention.
Fig. 4 C shows the formation step of mask layer.Mask layer 301 is formed on the surface of silicon oxide layer of the SOI substrates 101 that exposed by the first and second gaps 37 and 38, be formed on walking beam 32 and be positioned at SOI substrate 101 a side the passing the first gap 37 and the second gap 38 of silicon layer and on surfaces opposite to each other and be formed on the upper surface of walking beam 32 and be positioned on the upper surface of silicon layer of a side of SOI substrate 101.
Fig. 4 D shows the formation step of impurity diffusion source layer.For tensile stress being given the surface that is formed on mask layer 301 with the impurity diffusion source layer 302 of walking beam 32.Impurity diffusion source layer 302 also is configured to Impurity Diffusion to the silicon layer of SOI substrate 101.
Fig. 4 E shows the formation step of impurity diffusion layer.Heat treatment is performed, thereby impurity diffuses to walking beam 32 and is positioned at silicon layer (having formed impurity diffusion layer 303) on a side of SOI substrate 101 from impurity diffusion source layer 302.
Then, although do not use accompanying drawing because this step is similar to the step of Fig. 2 E, separate walking beam 32 by the partial oxidation silicon layer that etches away impurity diffusion source layer 302, mask layer 301 and SOI substrate 101.
If even it is not applied elongation strain when applying gaging pressure to walking beam 32, walking beam 32 may be out of shape when it is applied gaging pressure, causes the state that can not measure.Given this, by adding such as give walking beam 32 less than the boron (B) of silicon (Si) or the impurity of phosphorus (P) with elongation strain on atomic radius to walking beam 32.
The required diffusion length of elongation strain that produces expectation can by after walking beam forms, diffuse to impurity walking beam 32 from three directions and shorten.The advantage that the diffusion length that shortens provides necessary heat treatment time greatly to shorten and the degree of the wafer distortion that causes due to membrane stress reduces.
High elongation strain can be by obtaining by regulating the value that heat treated duration and the temperature impurity concentration maximum with walking beam 32 controls to almost corresponding to the terminal solid solubility of the boron in silicon.
Can form by the irrealizable thick walking beam 32 with high elongation strain of epitaxy.
Impurity Diffusion to the degree of the walking beam 32 that is subjected to mask layer 301 protections can be regulated by the thickness of mask layer 301.
Fig. 5 A-Fig. 5 E shows the manufacture process of the necessary part of resonant transducer according to still another embodiment of the invention.
Fig. 5 C shows the first gap and the second gap forms step.The first gap 37 and the second gap 38 are passed impurity diffusion source layer 401 by etching and are formed with the silicon layer that is positioned at a side of SOI substrate 101.
Fig. 5 D shows the formation step of impurity diffusion layer.Heat treatment is performed, thereby impurity diffuses to walking beam 32 and is positioned at silicon layer (having formed impurity diffusion layer 402) on a side of SOI substrate 101 from impurity diffusion source layer 401.
Fig. 5 E shows the separating step of walking beam.By in same step side by side or the partial oxidation silicon layer that sequentially etches away impurity diffusion source layer 401 and SOI substrate 101 in different step separate walking beam 32.
A plurality of other layers can be formed on impurity diffusion source layer 401.For example, impurity diffusion source layer 401 can use formation silica (SiO thereon
2Layer) carry out patterning as mask.
If even do not give elongation strain to it when walking beam 32 not being applied gaging pressure, walking beam 32 can be out of shape when it is applied gaging pressure, causes the state that can not measure.Given this, by adding such as give walking beam 32 less than the boron (B) of silicon (Si) or the impurity of phosphorus (P) with elongation strain on atomic radius to walking beam 32.
Producing the required diffusion length of the elongation strain of expectation can be by after walking beam forms, and impurity is diffused to walking beam 32 and shortens from three direction.The advantage that the diffusion length that shortens provides necessary heat treatment time greatly to shorten and the degree of the wafer distortion that causes due to membrane stress reduces.
High elongation strain can be by being controlled to be up to the value corresponding to the terminal solid solubility of the boron in silicon almost and obtaining by regulating heat treated duration and the temperature impurity concentration with walking beam 32.
Can form by the irrealizable thick walking beam 32 with high elongation strain of epitaxy.
The embodiment of Fig. 5 A-Fig. 5 E has eliminated PBF solution when it is applied to by the first gap 37 and the second gap 38 definition surperficial, can not be easily introduced into the first gap 37 with large depth-to-width ratio and the problem in the second gap 38.
A kind of method that forms impurity diffusion source layer 102,202,302 or 401 is that the PBF solution that will comprise boron oxide (B2O3), organic bond and solvent is applied to target surface, then burn till in the oxygen-blanket of nitrogen of 600 °, and carry out the pre-deposition diffusion with higher temperature.
Do not use the additive method of PBF solution as follows:
(1) use Boron tribromide (BBr
3), boric acid (H
3BO
3Boron nitride sintered body (PBN), boron chloride or the analog of)-boron nitride sintered body (BN), thermal decomposition comes diffused with boron (B) atom.
(2) use phosphorous oxychloride (POCl
3), phosphorus tribromide (PBr
3), phosphorus trichloride (PCl
3), phosphorous oxide (P
2O
3) or analog etc. spread phosphorus (P) atom.
(3) form boron oxide (B by for example CVD
2O
3) or the diffusion source layer of analog.
In superincumbent each embodiment, be used for the heat treatment step of Impurity Diffusion to walking beam 32, impurity diffusion source layer 102,202,302 or 401 is not removed in single heat treatment.Replacedly, impurity diffusion layer 103,203,303 or 402 can be formed: carry out heat treatment for the first time with the Impurity Diffusion of scheduled volume to walking beam 32, then remove impurity diffusion source layer 102,202,302 or 401, and carry out heat treatment for the second time with diffusion impurity on the depth direction in walking beam 32.Impurity diffusion source layer 102,202,302 or 401 removal make and can regulate the amount that diffuses to the impurity in walking beam 32 to walking beam 32 by preventing excessive Impurity Diffusion.
In superincumbent each embodiment, impurity diffusion source layer 102,202,302 or 401 only forms once.Replacedly, can carry out by a plurality of combinations of impurity diffusion source layer 102,202,302 or 401 formation, the heat treatment that is used for diffusion and impurity diffusion source layer 102,202,302 or 401 removal to the Impurity Diffusion of walking beam 32.This can increase the impurity level that diffuses in walking beam 32.
Although described specific embodiment, these embodiment present by way of example, are not intended to limit the scope of the invention.In fact, the method and system of novelty described herein can be realized by multiple other modes.In addition, in the situation that do not deviate from spirit of the present invention, can carry out various abreviations, replacement and change to the form of method and system described herein.Claims and equivalent thereof are intended to cover form or the modification that belongs to scope and spirit of the present invention.
Claims (10)
1. a manufacturing has the method for the resonant transducer of walking beam, and described method comprises:
(a) provide SOI substrate (101), described SOI substrate comprises: the first silicon layer; Silicon oxide layer on described the first silicon layer; And the second silicon layer on described silicon oxide layer;
(b) the first gap (37) and the second gap (38) by coming described the second silicon layer of etching with described silicon oxide layer as etch stop layer, form to pass described the second silicon layer;
(c) form impurity diffusion source layer (401) on described the second silicon layer, wherein said impurity diffusion source layer is configured to Impurity Diffusion to described the second silicon layer;
(d) form impurity diffusion layer (402) by heat-treating for described SOI substrate the impurity from described impurity diffusion source layer is spread in the surface portion of described the second silicon layer;
(e) remove described impurity diffusion source layer by etching; And
(f) remove at least a portion of described silicon oxide layer by etching, so that described the first silicon layer and described the second silicon layer by described the first gap and described the second gap around the zone between form the air gap, wherein said the second silicon layer by described the first gap and described the second gap around described zone as described walking beam.
2. method according to claim 1, wherein said step (e) and (f) be performed simultaneously.
3. method according to claim 1, wherein said step (f) is performed afterwards in described step (e).
4. method according to claim 1, wherein said impurity diffusion source layer be configured to comprise its radius less than the Impurity Diffusion of the atom of the radius of silicon to described the second silicon layer.
5. method according to claim 1, wherein said impurity comprises boron or phosphorus.
6. method according to claim 1, wherein said step (c) is carried out afterwards in described step (b), and wherein said step (c) comprising:
(i) on the upper surface of described the second silicon layer, on described the second silicon layer and inner wall surface described the first gap and described the second gap-contact and described silicon oxide layer pass through form described impurity diffusion source layer on part that described the first gap and described the second gap expose.
7. method according to claim 1, wherein said step (b) is carried out afterwards in described step (c), and wherein said step (b) comprising:
Described the first gap and described second gap of described impurity diffusion source layer and described the second silicon layer passed in formation.
8. method according to claim 1 also comprises:
(g) form mask layer on described the second silicon layer, wherein said mask layer is configured to regulate the impurity level that will diffuse to the impurity in described the second silicon layer, and
Wherein said step (c) comprising: form described impurity diffusion source layer on described mask layer.
9. method according to claim 8, wherein said step (c) is carried out afterwards in described step (b), and described step (g) carries out between described step (b) and described step (c),
Wherein said step (g) comprising:
(i) on the upper surface of described the second silicon layer, on described the second silicon layer and inner wall surface described the first gap and described the second gap-contact and described silicon oxide layer pass through form described mask layer on part that described the first gap and described the second gap expose, and
Wherein said step (c) comprising:
(i) form described impurity diffusion source layer on described mask layer.
10. method according to claim 8, wherein said step (c) is carried out afterwards in described step (b), and described step (g) carries out between described step (a) and described step (b),
Wherein said step (b) comprising:
(i) form described the first gap and described the second gap of passing described mask layer and described the second silicon layer, and
Wherein said step (c) comprising:
(i) on described mask layer, on described the second silicon layer and inner wall surface described the first gap and described the second gap-contact and described silicon oxide layer pass through form described impurity diffusion source layer on part that described the first gap and described the second gap expose.
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US9084067B2 (en) | 2015-07-14 |
EP2599747A3 (en) | 2014-10-15 |
EP2599747A2 (en) | 2013-06-05 |
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CN103130179B (en) | 2016-03-30 |
EP2599747B1 (en) | 2016-10-26 |
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US20130139377A1 (en) | 2013-06-06 |
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