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CN103123934B - The gallium nitride based transistor structure with high electron mobility of tool barrier layer and manufacture method - Google Patents

The gallium nitride based transistor structure with high electron mobility of tool barrier layer and manufacture method Download PDF

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CN103123934B
CN103123934B CN201310048977.6A CN201310048977A CN103123934B CN 103123934 B CN103123934 B CN 103123934B CN 201310048977 A CN201310048977 A CN 201310048977A CN 103123934 B CN103123934 B CN 103123934B
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王晓亮
彭恩超
王翠梅
肖红领
冯春
姜丽娟
陈竑
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Abstract

一种具势垒层的氮化镓基高电子迁移率晶体管结构,包括:一衬底;一成核层,该成核层制作在衬底上面;一非有意掺杂高阻层,该非有意掺杂高阻层制作在成核层上面;一非有意掺杂高迁移率沟道层,该非有意掺杂高迁移率沟道层制作在非有意掺杂高阻层上面;一非有意掺杂氮化铝空间层,该非有意掺杂氮化铝空间层制作在非有意掺杂高迁移率沟道层上面;一非有意掺杂势垒层,该非有意掺杂势垒层制作在非有意掺杂氮化铝空间层上面;一非有意掺杂氮化镓盖帽层,该非有意掺杂氮化镓盖帽层制作在非有意掺杂势垒层上面。本发明可以增加对沟道二维电子气的限制作用,提高所研制器件的输出功率,同时器件的栅电流得到降低。

A GaN-based high electron mobility transistor structure with a potential barrier layer, comprising: a substrate; a nucleation layer fabricated on the substrate; a non-intentionally doped high-resistance layer, the non-intentionally doped An intentionally doped high-resistance layer is fabricated on the nucleation layer; an unintentionally doped high-mobility channel layer is fabricated on the unintentionally doped high-resistance layer; A doped aluminum nitride space layer, the non-intentionally doped aluminum nitride space layer is fabricated on the unintentionally doped high-mobility channel layer; an unintentionally doped barrier layer, the unintentionally doped barrier layer is fabricated On the unintentionally doped aluminum nitride space layer; an unintentionally doped GaN cap layer, the unintentionally doped GaN cap layer is formed on the unintentionally doped barrier layer. The invention can increase the confinement effect on the two-dimensional electron gas of the channel, improve the output power of the developed device, and reduce the gate current of the device at the same time.

Description

具势垒层的氮化镓基高电子迁移率晶体管结构及制作方法Gallium Nitride-based High Electron Mobility Transistor Structure and Fabrication Method with Potential Barrier Layer

技术领域technical field

本发明属于半导体技术领域,特别是指一种具势垒层的氮化镓基高电子迁移率晶体管(HEMT)结构及制作方法,该晶体管使用非有意掺杂铝镓氮和氮化铝相结合的新型势垒层以及高迁移率氮化镓沟道层,可以显著提高二维电子气面密度及对二维电子气的限制作用,降低异质结界面对沟道电子性能的影响,提高所研制器件的性能。The invention belongs to the technical field of semiconductors, in particular to a gallium nitride-based high electron mobility transistor (HEMT) structure and manufacturing method with a potential barrier layer. The transistor uses a combination of non-intentionally doped aluminum gallium nitride and aluminum nitride The new barrier layer and high-mobility gallium nitride channel layer can significantly increase the two-dimensional electron gas surface density and the confinement effect on the two-dimensional electron gas, reduce the influence of the heterojunction interface on the electronic properties of the channel, and improve The performance of the developed device.

背景技术Background technique

氮化镓基半导体材料具有优良的物理和化学特性,特别适合制备高频、高功率的高电子迁移率晶体管。氮化镓基高电子迁移率晶体管击穿电压高、工作频率高、输出功率大、抗辐射性能好,在无线通信、雷达、航空航天、汽车电子、自动化控制、石油勘探、高温辐射环境等领域有广阔的应用前景。Gallium nitride-based semiconductor materials have excellent physical and chemical properties, and are especially suitable for the preparation of high-frequency, high-power, high-electron mobility transistors. GaN-based high electron mobility transistors have high breakdown voltage, high operating frequency, high output power, and good radiation resistance. They are used in wireless communications, radar, aerospace, automotive electronics, automation control, oil exploration, high-temperature radiation environments, etc There are broad application prospects.

高电子迁移率晶体管的原理为:由于组成异质结的两种材料的禁带宽度不同,在异质结界面处形成了势垒和势阱,由极化效应或调制掺杂产生的自由电子,积累在非掺杂的氮化镓层靠近界面的三角形势阱中,形成二维电子气,由于势阱中的这些电子与势垒中的电离杂质空间分离,大大降低了库伦散射,从而显著提高了材料的电子迁移率。研制成器件后,通过调节栅电极偏压可以控制异质结界面处的二维电子气密度,在一定的直流偏压下,可以对高频微波信号进行放大。The principle of the high electron mobility transistor is: due to the different band gaps of the two materials that make up the heterojunction, a potential barrier and a potential well are formed at the heterojunction interface, and the free electrons generated by the polarization effect or modulation doping , accumulate in the triangular potential well of the non-doped GaN layer close to the interface, forming a two-dimensional electron gas. Since these electrons in the potential well are spatially separated from the ionized impurities in the potential barrier, Coulomb scattering is greatly reduced, thus significantly The electron mobility of the material is improved. After the device is developed, the two-dimensional electron gas density at the heterojunction interface can be controlled by adjusting the bias voltage of the gate electrode, and high-frequency microwave signals can be amplified under a certain DC bias voltage.

二维电子气面密度和迁移率是表征高电子迁移率晶体管结构材料质量的重要参数,在减小势垒厚度的同时,提高沟道中二维电子气面密度和迁移率是在提高氮化镓基高电子迁移率晶体管工作频率的基础上,增强输出电流密度和功率密度的重要举措。在本发明以前,为了提高氮化镓基高电子迁移率晶体管结构材料的二维电子气面密度和迁移率,通常采取两种方法:(1)对铝镓氮势垒层进行n型掺杂,可以在一定程度上提高沟道中的二维电子气面密度。但掺杂会降低材料晶格的完整性,从而导致铝镓氮层的晶体质量下降,氮化镓和铝镓氮层之间的界面粗糙度增加,降低电子迁移率;(2)采用高Al组分势垒层AlGaN/GaN HEMT结构,随着势垒层Al组分升高,异质结带阶和极化电场增大,可显著提高二维电子气面密度。但是,Al组分较高时,大的晶格失配会导致AlGaN势垒层的晶体质量、表面和界面质量变差,应变诱生的深能级缺陷增多,使散射增强,迁移率降低;同时,当Al组分过高时,大晶格失配限制了势垒层厚度,难以产生强的二维电子气。The two-dimensional electron gas surface density and mobility are important parameters to characterize the quality of high electron mobility transistor structure materials. While reducing the barrier thickness, increasing the two-dimensional electron gas surface density and mobility in the channel is the key to improving the GaN Based on the operating frequency of high electron mobility transistors, it is an important measure to enhance the output current density and power density. Before the present invention, in order to improve the two-dimensional electron gas surface density and the mobility of GaN-based high electron mobility transistor structural materials, two methods are generally adopted: (1) n-type doping is carried out to the AlGaN barrier layer , can increase the two-dimensional electron gas surface density in the channel to a certain extent. However, doping will reduce the integrity of the material lattice, resulting in a decrease in the crystal quality of the AlGaN layer, increasing the interface roughness between the GaN and AlGaN layers, and reducing the electron mobility; (2) using high Al Composition barrier layer AlGaN/GaN HEMT structure, with the increase of barrier layer Al composition, the heterojunction band order and polarization electric field increase, which can significantly increase the two-dimensional electron gas surface density. However, when the Al composition is high, the large lattice mismatch will lead to the deterioration of the crystal quality, surface and interface quality of the AlGaN barrier layer, and the strain-induced deep level defects will increase, which will enhance the scattering and reduce the mobility; At the same time, when the Al composition is too high, the large lattice mismatch limits the thickness of the barrier layer, making it difficult to generate a strong two-dimensional electron gas.

发明内容Contents of the invention

本发明的目的在于提供一种具势垒层的氮化镓基HEMT结构及制作方法,与普通的氮化镓基高电子迁移率晶体管材料相比,该晶体管结构在铝镓氮势垒层中插入氮化铝薄层组成新型势垒层,具有更高的二维电子气面密度,同时能够提高沟道二维电子气的势垒高度,更加有效地限制沟道电子向势垒层方向的泄漏,由此增加对沟道二维电子气的限制作用,提高所研制器件的输出功率,同时器件的栅电流有望得到降低。The purpose of the present invention is to provide a gallium nitride-based HEMT structure with a barrier layer and a manufacturing method. A new type of barrier layer is formed by inserting a thin layer of aluminum nitride, which has a higher two-dimensional electron gas surface density, and can increase the barrier height of the two-dimensional electron gas in the channel, and more effectively limit the flow of channel electrons to the barrier layer. Leakage, thereby increasing the confinement effect on the channel two-dimensional electron gas, improving the output power of the developed device, and at the same time the gate current of the device is expected to be reduced.

本发明提供一种具势垒层的氮化镓基高电子迁移率晶体管结构,包括:The invention provides a GaN-based high electron mobility transistor structure with a barrier layer, comprising:

一衬底;a substrate;

一成核层,该成核层制作在衬底上面;a nucleation layer, the nucleation layer is fabricated on the substrate;

一非有意掺杂高阻层,该非有意掺杂高阻层制作在成核层上面;An unintentionally doped high-resistance layer formed on the nucleation layer;

一非有意掺杂高迁移率沟道层,该非有意掺杂高迁移率沟道层制作在非有意掺杂高阻层上面;An unintentionally doped high-mobility channel layer, the unintentionally doped high-mobility channel layer is fabricated on the unintentionally doped high-resistance layer;

一非有意掺杂氮化铝空间层,该非有意掺杂氮化铝空间层制作在非有意掺杂高迁移率沟道层上面;An unintentionally doped aluminum nitride spacer layer, the unintentionally doped aluminum nitride spacer layer is fabricated on the unintentionally doped high-mobility channel layer;

一非有意掺杂势垒层,该非有意掺杂势垒层制作在非有意掺杂氮化铝空间层上面;An unintentionally doped barrier layer formed on the unintentionally doped aluminum nitride spacer layer;

一非有意掺杂氮化镓盖帽层,该非有意掺杂氮化镓盖帽层制作在非有意掺杂势垒层上面。An unintentionally doped GaN cap layer is formed on the unintentionally doped barrier layer.

本发明还提供一种具势垒层的氮化镓基高电子迁移率晶体管的制作方法,包括如下步骤:The present invention also provides a method for manufacturing a gallium nitride-based high electron mobility transistor with a potential barrier layer, comprising the following steps:

步骤1:选择一衬底;Step 1: Select a substrate;

步骤2:在衬底上生长一层成核层,生长厚度为0.01-0.50μm;Step 2: growing a nucleation layer on the substrate with a growth thickness of 0.01-0.50 μm;

步骤3:在成核层上生长非有意掺杂高阻层;Step 3: growing a non-intentionally doped high-resistance layer on the nucleation layer;

步骤4:在非有意掺杂高阻层上生长非有意掺杂高迁移率沟道层;Step 4: growing an unintentionally doped high-mobility channel layer on the unintentionally doped high-resistance layer;

步骤5:在非有意掺杂高迁移率沟道层上生长非有意掺杂氮化铝空间层,生长厚度为0.7-3nm;Step 5: growing an unintentionally doped aluminum nitride spacer layer on the unintentionally doped high-mobility channel layer, with a growth thickness of 0.7-3 nm;

步骤6:在非有意掺杂氮化铝空间层上生长非有意掺杂新型势垒层;Step 6: growing an unintentionally doped new barrier layer on the unintentionally doped aluminum nitride space layer;

步骤7:在非有意掺杂新型势垒层上生长非有意掺杂氮化镓盖帽层,厚度为1-5nm,完成制备。Step 7: growing an unintentionally doped gallium nitride capping layer on the unintentionally doped novel barrier layer with a thickness of 1-5 nm to complete the preparation.

本发明能够降低工艺难度,减少工艺步骤,通过引入的势垒层结构,即在传统的铝镓氮势垒层中插入氮化铝薄层,可获得低的缺陷密度和高的二维电子气面密度,同时可显著提高限制沟道电子的势垒高度,有望降低器件的栅漏电。本发明可显著改善和提高氮化镓基高温、高频、高功率器件和电路的性能。The invention can reduce the process difficulty and process steps, and through the introduced barrier layer structure, that is, a thin aluminum nitride layer is inserted in the traditional aluminum gallium nitride barrier layer, low defect density and high two-dimensional electron gas can be obtained At the same time, it can significantly increase the barrier height that restricts channel electrons, which is expected to reduce the gate leakage of the device. The invention can remarkably improve and enhance the performance of gallium nitride-based high-temperature, high-frequency, high-power devices and circuits.

附图说明Description of drawings

为进一步说明本发明的内容,以下结合附图对本发明作一详细的描述,其中:For further illustrating content of the present invention, below in conjunction with accompanying drawing, the present invention is described in detail, wherein:

图1为本发明的结构示意图;Fig. 1 is a structural representation of the present invention;

图2为本发明的制作流程图;Fig. 2 is the production flowchart of the present invention;

图3(a)具有传统势垒层和(b)具有新型势垒层的氮化镓基HEMT结构二维电子气分布和结构能带图。Figure 3 (a) has a traditional barrier layer and (b) has a new barrier layer GaN-based HEMT structure two-dimensional electron gas distribution and structure band diagram.

具体实施方式Detailed ways

请参阅图1所示,本发明一种具势垒层的氮化镓基HEMT结构,其中包括:Please refer to Fig. 1, a GaN-based HEMT structure with a barrier layer of the present invention, including:

一衬底10,该衬底10为碳化硅衬底或蓝宝石衬底或硅衬底,该衬底10的厚度为300-650μm。A substrate 10, the substrate 10 is a silicon carbide substrate or a sapphire substrate or a silicon substrate, and the thickness of the substrate 10 is 300-650 μm.

一成核层20,该成核层20制作在衬底10上面。所述成核层20为氮化镓或氮化铝或铝镓氮,厚度为0.01-0.50μm,优选值为0.03-0.30μm。A nucleation layer 20 is formed on the substrate 10 . The nucleation layer 20 is GaN or AlN or AlGaN with a thickness of 0.01-0.50 μm, preferably 0.03-0.30 μm.

一非有意掺杂高阻层30,该非有意掺杂高阻层30制作在成核层20上面,电阻率大于106Ω.cm。所述非有意掺杂高阻层30的材料为AlyGa1-yN,铝组分为0≤y≤0.15,厚度为1-5μm。该非有意掺杂高阻层30的作用有四个,一是作为缓冲层减小衬底和外延层之间的晶格失配,提高外延层的晶体质量,二是作为高阻层减小器件漏电,三是作为背势垒层抬高沟道在缓冲层衬底一侧的势垒高度,降低沟道电子在高场下的缓冲层泄漏,提高材料和器件的稳定性,四是提高器件的击穿电压,提高器件的输出功率。A non-intentionally doped high-resistance layer 30, the non-intentionally doped high-resistance layer 30 is fabricated on the nucleation layer 20, and the resistivity is greater than 10 6 Ω.cm. The material of the non-intentionally doped high-resistance layer 30 is AlyGa1 -yN , the aluminum composition is 0≤y≤0.15, and the thickness is 1-5 μm. The non-intentionally doped high-resistance layer 30 has four functions, one is to reduce the lattice mismatch between the substrate and the epitaxial layer as a buffer layer, and improve the crystal quality of the epitaxial layer; Device leakage, the third is to raise the barrier height of the channel on the buffer layer substrate side as a back barrier layer, reduce the leakage of channel electrons in the buffer layer under high field, improve the stability of materials and devices, and the fourth is to improve The breakdown voltage of the device increases the output power of the device.

一非有意掺杂高迁移率沟道层40,该非有意掺杂高迁移率沟道层40制作在非有意掺杂高阻层30上面,载流子迁移率大于500cm2/Vs。所述非有意掺杂高迁移率沟道层40材料为氮化镓,厚度为10-100nm。该非有意掺杂高迁移率沟道层40为二维电子气提供了一个良好的通道,同时也显著提高了沟道二维电子气迁移率。An unintentionally doped high-mobility channel layer 40, the unintentionally doped high-mobility channel layer 40 is fabricated on the unintentionally doped high-resistance layer 30, and the carrier mobility is greater than 500 cm 2 /Vs. The material of the non-intentionally doped high-mobility channel layer 40 is gallium nitride, and the thickness is 10-100 nm. The non-intentionally doped high-mobility channel layer 40 provides a good channel for the two-dimensional electron gas, and also significantly improves the mobility of the two-dimensional electron gas in the channel.

一非有意掺杂氮化铝空间层50,该非有意掺杂氮化铝空间层50制作在非有意掺杂高迁移率氮化镓沟道层40上面。所述非有意掺杂氮化铝空间层50的厚度为0.7-3nm,优选值为1nm。该非有意掺杂氮化铝空间层50的作用有三:一是利用二元化合物将沟道电子和多元化合物非有意掺杂新型势垒层60隔开,减少电子的合金散射,进一步提高沟道二维电子气迁移率;二是利用其禁带宽度大的特点,提高势垒,有效遏制电子向非有意掺杂新型势垒层60和表面的泄漏;三是利用氮化铝材料强的极化作用,在沟道中诱导出更多的电子,提高二维电子气的面密度。An unintentionally doped AlN space layer 50 , the unintentionally doped AlN space layer 50 is fabricated on the unintentionally doped high-mobility GaN channel layer 40 . The thickness of the non-intentionally doped aluminum nitride space layer 50 is 0.7-3 nm, preferably 1 nm. The non-intentionally doped aluminum nitride space layer 50 has three functions: one is to use the binary compound to separate the channel electrons from the non-intentionally doped new barrier layer 60 of the multi-component compound, reduce the alloy scattering of electrons, and further improve the channel Two-dimensional electron gas mobility; the second is to use its large forbidden band width to increase the potential barrier and effectively prevent electrons from leaking to the non-intentionally doped new barrier layer 60 and the surface; the third is to use the strong pole of the aluminum nitride material The effect of ionization induces more electrons in the channel and increases the surface density of the two-dimensional electron gas.

一非有意掺杂势垒层60,该非有意掺杂势垒层60制作在非有意掺杂氮化铝空间层50上面。所述非有意掺杂势垒层60的材料为AlxGa1-xN和AlN的复合层,总生长厚度为10-30nm,铝镓氮的铝组分为0.10≤x≤0.35,氮化铝的厚度为0.7-3nm,数目为至少1层,插入到铝镓氮之中的任何位置。该非有意掺杂势垒层60的优势在于,一是利用强极化作用的氮化铝薄层,诱导出更高密度的二维电子气,同时能够保持势垒材料较高的晶体质量,防止沟道电子迁移率的降低;二是提高沟道电子的有效势垒高度,减小器件工作时栅电流。An unintentionally doped barrier layer 60 is fabricated on the unintentionally doped aluminum nitride spacer layer 50 . The material of the non-intentionally doped barrier layer 60 is a composite layer of AlxGa1 - xN and AlN, the total growth thickness is 10-30nm, the aluminum composition of AlGaN is 0.10≤x≤0.35, nitrided The thickness of aluminum is 0.7-3nm, the number is at least 1 layer, and it is inserted into any position in AlGaN. The advantages of the non-intentionally doped barrier layer 60 are: firstly, the thin aluminum nitride layer with a strong polarization effect can induce a higher density of two-dimensional electron gas, while maintaining the high crystal quality of the barrier material, Prevent the reduction of channel electron mobility; the second is to increase the effective barrier height of channel electrons and reduce the gate current when the device is working.

一非有意掺杂氮化镓盖帽层70,该非有意掺杂氮化镓盖帽层70制作在非有意掺杂势垒层60上面,厚度为1-5nm。该非有意掺杂氮化镓盖帽层70作为帽层能降低器件工艺难度。An unintentionally doped GaN cap layer 70, the unintentionally doped GaN cap layer 70 is fabricated on the unintentionally doped barrier layer 60, with a thickness of 1-5 nm. The non-intentionally doped GaN capping layer 70 serves as a capping layer, which can reduce device process difficulty.

请再参阅图2并配合参阅图1所示,本发明还提供一种具势垒层的氮化镓基HEMT的制作方法,包括如下步骤:Please refer to FIG. 2 again and refer to FIG. 1. The present invention also provides a method for manufacturing a GaN-based HEMT with a barrier layer, which includes the following steps:

步骤1:选择一衬底10,该衬底10为碳化硅衬底或蓝宝石衬底或硅衬底,该衬底10的厚度为300-650μm;Step 1: Select a substrate 10, the substrate 10 is a silicon carbide substrate or a sapphire substrate or a silicon substrate, and the thickness of the substrate 10 is 300-650 μm;

步骤2:在衬底10上生长一层成核层20,所述成核层20为氮化镓或氮化铝或铝镓氮,该成核层20生长厚度为0.01-0.50μm,优选值为0.03-0.30μm;Step 2: growing a layer of nucleation layer 20 on the substrate 10, the nucleation layer 20 is gallium nitride or aluminum nitride or aluminum gallium nitride, and the growth thickness of the nucleation layer 20 is 0.01-0.50 μm, preferably 0.03-0.30μm;

步骤3:在成核层20上生长非有意掺杂高阻层30,电阻率大于106Ω.cm,该非有意掺杂高阻层30的材料为AlyGa1-yN,铝组分为0≤y≤0.15,生长厚度为1-5μm。所述的非有意掺杂高阻层30的室温电阻率大于1×106Ω·cm,优选值大于1×108Ω·cm;Step 3: grow an unintentionally doped high-resistance layer 30 on the nucleation layer 20, the resistivity is greater than 10 6 Ω.cm, the material of the unintentionally doped high-resistance layer 30 is AlyGa1 -yN , aluminum group Divided into 0≤y≤0.15, the growth thickness is 1-5μm. The room temperature resistivity of the non-intentionally doped high-resistance layer 30 is greater than 1×10 6 Ω·cm, preferably greater than 1×10 8 Ω·cm;

步骤4:在非有意掺杂高阻层30上生长非有意掺杂高迁移率沟道层40,载流子迁移率大于500cm2/Vs,该非有意掺杂高迁移率沟道层40的材料为氮化镓,生长厚度为10-100nm。所述的非有意掺杂高迁移率沟道层40为二维电子气的运行沟道,室温迁移率大于500cm2/Vs,优选值大于700cm2/Vs;Step 4: growing an unintentionally doped high-mobility channel layer 40 on the unintentionally doped high-resistance layer 30, the carrier mobility is greater than 500 cm 2 /Vs, and the unintentionally doped high-mobility channel layer 40 The material is gallium nitride, and the growth thickness is 10-100nm. The non-intentionally doped high-mobility channel layer 40 is a two-dimensional electron gas operating channel, and the mobility at room temperature is greater than 500 cm 2 /Vs, preferably greater than 700 cm 2 /Vs;

步骤5:在非有意掺杂高迁移率沟道层40上生长非有意掺杂氮化铝空间层50,生长厚度为0.7-3nm,优选值为1nm。所述非有意掺杂氮化铝空间层50可以提高2DEG的面密度和迁移率,减小异质结界面对沟道二维电子气的影响,提高异质结构材料的综合性能;Step 5: growing an unintentionally doped aluminum nitride space layer 50 on the unintentionally doped high-mobility channel layer 40 to a thickness of 0.7-3 nm, preferably 1 nm. The non-intentionally doped aluminum nitride space layer 50 can increase the surface density and mobility of 2DEG, reduce the influence of the heterojunction interface on the two-dimensional electron gas of the channel, and improve the comprehensive performance of the heterostructure material;

步骤6:在非有意掺杂氮化铝空间层50上生长非有意掺杂势垒层60。所述非有意掺杂势垒层60的材料为AlxGa1-xN和AlN的复合层,总生长厚度为10-30nm,铝镓氮的铝组分为0.10≤x≤0.35,氮化铝的厚度为0.7-3nm,数目为至少1层,插入到铝镓氮之中的任何位置;Step 6: growing an unintentionally doped barrier layer 60 on the unintentionally doped AlN space layer 50 . The material of the non-intentionally doped barrier layer 60 is a composite layer of AlxGa1 - xN and AlN, the total growth thickness is 10-30nm, the aluminum composition of AlGaN is 0.10≤x≤0.35, nitrided The thickness of aluminum is 0.7-3nm, the number is at least 1 layer, inserted into any position in AlGaN;

步骤7:在非有意掺杂势垒层60上生长非有意掺杂氮化镓盖帽层70,所述非有意掺杂氮化镓盖帽层70厚度为1-5nm,完成制备。Step 7: growing an unintentionally doped GaN capping layer 70 on the unintentionally doped barrier layer 60, the thickness of the unintentionally doped GaN capping layer 70 is 1-5 nm, and the preparation is completed.

该制作方法包括但不局限于金属有机物化学气相沉积法、分子束外延和气相外延,优先采用金属有机物化学气相沉积法。The fabrication method includes but not limited to metal organic chemical vapor deposition, molecular beam epitaxy and vapor phase epitaxy, and metal organic chemical vapor deposition is preferred.

实施例:Example:

本发明提供一种具势垒层的氮化镓基HEMT结构,其中包括:The present invention provides a GaN-based HEMT structure with a barrier layer, which includes:

一衬底10,该衬底10材料为蓝宝石。A substrate 10, the material of which is sapphire.

一成核层20,该成核层20制作在衬底10上面。该成核层20的材料为低温氮化镓,厚度为100nm;A nucleation layer 20 is formed on the substrate 10 . The material of the nucleation layer 20 is low-temperature gallium nitride with a thickness of 100 nm;

一非有意掺杂高阻层30,该非有意掺杂高阻层30制作在成核层20上面。该非有意掺杂高阻层30的铝组分y=0,该非有意掺杂高阻层30的材料为氮化镓,厚度为3μm。An unintentionally doped high-resistance layer 30 is fabricated on the nucleation layer 20 . The aluminum composition y of the unintentionally doped high resistance layer 30 is 0, the material of the unintentionally doped high resistance layer 30 is gallium nitride, and the thickness is 3 μm.

一非有意掺杂高迁移率沟道层40,该非有意掺杂高迁移率沟道层40制作在非有意掺杂高阻层30上面。该非有意掺杂高迁移率层沟道层40的材料为氮化镓,厚度为30nm。An unintentionally doped high mobility channel layer 40 is fabricated on the unintentionally doped high resistance layer 30 . The material of the non-intentionally doped high-mobility layer channel layer 40 is gallium nitride with a thickness of 30 nm.

一非有意掺杂氮化铝空间层50,该非有意掺杂氮化铝空间层50制作在非有意掺杂高迁移率氮化镓沟道层40上面。所述非有意掺杂氮化铝空间层50的厚度为1nm。An unintentionally doped AlN space layer 50 , the unintentionally doped AlN space layer 50 is fabricated on the unintentionally doped high-mobility GaN channel layer 40 . The thickness of the non-intentionally doped aluminum nitride space layer 50 is 1 nm.

一非有意掺杂势垒层60,该非有意掺杂势垒层60制作在非有意掺杂氮化铝空间层50上面。所述非有意掺杂势垒层60的材料为Al0.25Ga0.75N和AlN的复合层,总厚度为21nm,铝镓氮的铝组分为0.25,氮化铝的厚度为1nm,数目为1层,插入到铝镓氮之中的具体位置如下:Al0.25Ga0.75N(15nm)/AlN(1nm)/Al0.25Ga0.75N(5nm)。An unintentionally doped barrier layer 60 is fabricated on the unintentionally doped aluminum nitride spacer layer 50 . The material of the non-intentionally doped barrier layer 60 is a composite layer of Al 0.25 Ga 0.75 N and AlN, the total thickness is 21nm, the aluminum component of AlGaN is 0.25, the thickness of aluminum nitride is 1nm, and the number is 1 layer, the specific position inserted into AlGaN is as follows: Al 0.25 Ga 0.75 N (15nm)/AlN (1nm)/Al 0.25 Ga 0.75 N (5nm).

一非有意掺杂氮化镓盖帽层70,该非有意掺杂氮化镓盖帽层70制作在非有意掺杂新型势垒层60上面,厚度为3nm。An unintentionally doped GaN capping layer 70, the unintentionally doped GaN capping layer 70 is fabricated on the unintentionally doped new barrier layer 60, with a thickness of 3nm.

本发明提供一种具势垒层的氮化镓基HEMT的制作方法,采用金属有机物化学气相沉积法,包括如下步骤:The invention provides a method for manufacturing a GaN-based HEMT with a barrier layer, which adopts a metal-organic chemical vapor deposition method, and includes the following steps:

步骤1:选择一衬底10,该衬底10为蓝宝石衬底;Step 1: select a substrate 10, which is a sapphire substrate;

步骤2:在衬底10上生长一层成核层20,材料为氮化镓,生长温度为500-600℃,生长压力为53.34-80.01kPa,生长厚度为100nm;Step 2: growing a nucleation layer 20 on the substrate 10, the material is gallium nitride, the growth temperature is 500-600°C, the growth pressure is 53.34-80.01kPa, and the growth thickness is 100nm;

步骤3:在成核层20上生长非有意掺杂高阻层30,材料为氮化镓,生长温度为900-1100℃,优选值范围为1020-1100℃,生长厚度为3μm;Step 3: growing an unintentionally doped high-resistance layer 30 on the nucleation layer 20, the material is gallium nitride, the growth temperature is 900-1100°C, the preferred value range is 1020-1100°C, and the growth thickness is 3 μm;

步骤4:在非有意掺杂高阻层30上生长非有意掺杂高迁移率沟道层40,材料为氮化镓,生长厚度为30nm,生长温度为900-1100℃,室温迁移率大于500cm2/Vs,优选值大于700cm2/Vs;Step 4: growing an unintentionally doped high-mobility channel layer 40 on the unintentionally doped high-resistance layer 30, the material is gallium nitride, the growth thickness is 30nm, the growth temperature is 900-1100°C, and the room temperature mobility is greater than 500cm 2 /Vs, preferably greater than 700cm 2 /Vs;

步骤5:在非有意掺杂高迁移率沟道层40上生长非有意掺杂氮化铝空间层50,生长厚度为1nm,生长温度为850-1150℃;Step 5: growing an unintentionally doped aluminum nitride spacer layer 50 on the unintentionally doped high-mobility channel layer 40 with a growth thickness of 1 nm and a growth temperature of 850-1150° C.;

步骤6:在非有意掺杂氮化铝空间层50上生长非有意掺杂势垒层60,所述非有意掺杂势垒层60为Al0.25Ga0.75N和AlN的复合层,总生长厚度为21nm,生长温度为850-1150℃,铝镓氮的铝组分为0.25,氮化铝的厚度为1nm,数目为1层,具体生长结构如下:Al0.25Ga0.75N(15nm)/AlN(1nm)/Al0.25Ga0.75N(5nm);Step 6: growing an unintentionally doped barrier layer 60 on the unintentionally doped aluminum nitride space layer 50, the unintentionally doped barrier layer 60 is a composite layer of Al 0.25 Ga 0.75 N and AlN, with a total growth thickness of 21nm, the growth temperature is 850-1150℃, the aluminum component of aluminum gallium nitride is 0.25, the thickness of aluminum nitride is 1nm, and the number is 1 layer. The specific growth structure is as follows: Al 0.25 Ga 0.75 N(15nm)/AlN( 1nm)/Al 0.25 Ga 0.75 N(5nm);

步骤7:在非有意掺杂势垒层60上生长非有意掺杂氮化镓盖帽层70,生长厚度为3nm,生长温度为850-1150℃,完成制备。Step 7: growing an unintentionally doped gallium nitride cap layer 70 on the unintentionally doped barrier layer 60 with a thickness of 3 nm and a growth temperature of 850-1150° C. to complete the preparation.

图3(b)计算了实施例中具有新型势垒层的HEMT结构的能带和电子分布图,图3(a)为具有传统势垒层的GaN(3nm)/Al0.25Ga0.75N(20nm)/AlN(1nm)/GaN(30nm)HEMT结构的能带和电子分布图。比较这两个图,通过在传统的势垒层中插入1层1nm的氮化铝薄层,势垒高度提高了大约0.8eV,有望降低器件工作的栅电流;同时2DEG面密度从原来的1.13×1013cm-2增大到1.32×113cm-2,增大的幅度为16.8%。Figure 3 (b) calculates the energy band and electron distribution diagram of the HEMT structure with the new barrier layer in the embodiment, and Figure 3 (a) is GaN (3nm)/Al 0.25 Ga 0.75 N (20nm) with the traditional barrier layer )/AlN(1nm)/GaN(30nm) HEMT structure energy band and electron distribution diagram. Comparing these two figures, by inserting a layer of 1nm aluminum nitride thin layer in the traditional barrier layer, the barrier height is increased by about 0.8eV, which is expected to reduce the gate current of the device; at the same time, the 2DEG area density is changed from the original 1.13 ×10 13 cm -2 increases to 1.32×1 13 cm -2 , with an increase of 16.8%.

以上所述的具体实施例,对本发明的目的、技术方案和有益效果进行了进一步详细说明,所应理解的是,以上所述仅为本发明的具体实施例而已,并不用于限制本发明,凡在本发明的精神和原则之内,所做的任何修改、等同替换、改进等,均应包含在本发明的保护范围之内。The specific embodiments described above have further described the purpose, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above descriptions are only specific embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.

Claims (6)

1.一种具势垒层的氮化镓基高电子迁移率晶体管结构,包括:1. A GaN-based high electron mobility transistor structure with a potential barrier layer, comprising: 一衬底;a substrate; 一成核层,该成核层制作在衬底上面;a nucleation layer, the nucleation layer is fabricated on the substrate; 一非有意掺杂高阻层,该非有意掺杂高阻层制作在成核层上面;An unintentionally doped high-resistance layer formed on the nucleation layer; 一非有意掺杂高迁移率沟道层,该非有意掺杂高迁移率沟道层制作在非有意掺杂高阻层上面;An unintentionally doped high-mobility channel layer, the unintentionally doped high-mobility channel layer is fabricated on the unintentionally doped high-resistance layer; 一非有意掺杂氮化铝空间层,该非有意掺杂氮化铝空间层制作在非有意掺杂高迁移率沟道层上面;An unintentionally doped aluminum nitride spacer layer, the unintentionally doped aluminum nitride spacer layer is fabricated on the unintentionally doped high-mobility channel layer; 一非有意掺杂势垒层,该非有意掺杂势垒层制作在非有意掺杂氮化铝空间层上面,该非有意掺杂势垒层的材料为AlxGa1-xN和AlN的复合层,总厚度为10-30nm,铝镓氮的铝组分为0.10≤x≤0.35,氮化铝的厚度为0.7-3nm,氮化铝的数目至少为1层;An unintentionally doped barrier layer, the unintentionally doped barrier layer is fabricated on the unintentionally doped aluminum nitride space layer, and the materials of the unintentionally doped barrier layer are AlxGa1 - xN and AlN The composite layer has a total thickness of 10-30nm, the aluminum composition of aluminum gallium nitride is 0.10≤x≤0.35, the thickness of aluminum nitride is 0.7-3nm, and the number of aluminum nitride is at least 1 layer; 一非有意掺杂氮化镓盖帽层,该非有意掺杂氮化镓盖帽层制作在非有意掺杂势垒层上面。An unintentionally doped GaN cap layer is formed on the unintentionally doped barrier layer. 2.根据权利要求1所述的具势垒层的氮化镓基高电子迁移率晶体管结构,其中非有意掺杂高阻层的材料为AlyGa1-yN,铝组分为0≤y≤0.15,厚度为1-5μm。2. The gallium nitride-based high electron mobility transistor structure with a potential barrier layer according to claim 1, wherein the material of the non-intentionally doped high-resistance layer is Al y Ga 1-y N, and the aluminum composition is 0≤ y≤0.15, the thickness is 1-5μm. 3.根据权利要求1所述的具势垒层的氮化镓基高电子迁移率晶体管结构,其中非有意掺杂高迁移率沟道层的材料为氮化镓,厚度为10-100nm。3 . The gallium nitride-based high electron mobility transistor structure with a barrier layer according to claim 1 , wherein the material of the non-intentionally doped high mobility channel layer is gallium nitride, and the thickness is 10-100 nm. 4.一种具势垒层的氮化镓基高电子迁移率晶体管的制作方法,包括如下步骤:4. A method for manufacturing a gallium nitride-based high electron mobility transistor with a potential barrier layer, comprising the steps of: 步骤1:选择一衬底;Step 1: Select a substrate; 步骤2:在衬底上生长一层成核层,生长厚度为0.01-0.50μm;Step 2: growing a nucleation layer on the substrate with a growth thickness of 0.01-0.50 μm; 步骤3:在成核层上生长非有意掺杂高阻层;Step 3: growing a non-intentionally doped high-resistance layer on the nucleation layer; 步骤4:在非有意掺杂高阻层上生长非有意掺杂高迁移率沟道层;Step 4: growing an unintentionally doped high-mobility channel layer on the unintentionally doped high-resistance layer; 步骤5:在非有意掺杂高迁移率沟道层上生长非有意掺杂氮化铝空间层,生长厚度为0.73nm;Step 5: growing an unintentionally doped aluminum nitride spacer layer on the unintentionally doped high-mobility channel layer, with a growth thickness of 0.73 nm; 步骤6:在非有意掺杂氮化铝空间层上生长非有意掺杂势垒层,该非有意掺杂势垒层的材料为AlxGa1-xN和AlN的复合层,总厚度为10-30nm,铝镓氮的铝组分为0.10≤x≤0.35,氮化铝的厚度为0.7-3nm,氮化铝的数目至少为1层;Step 6: growing an unintentionally doped barrier layer on the unintentionally doped aluminum nitride spacer layer, the material of the unintentionally doped barrier layer is a composite layer of AlxGa1 - xN and AlN, with a total thickness of 10-30nm, the aluminum composition of aluminum gallium nitride is 0.10≤x≤0.35, the thickness of aluminum nitride is 0.7-3nm, and the number of aluminum nitride is at least 1 layer; 步骤7:在非有意掺杂势垒层上生长非有意掺杂氮化镓盖帽层,厚度为1-5nm,完成制备。Step 7: growing an unintentionally doped gallium nitride capping layer on the unintentionally doped barrier layer with a thickness of 1-5 nm to complete the preparation. 5.根据权利要求4所述的具势垒层的氮化镓基高电子迁移率晶体管的制作方法,其中非有意掺杂高阻层的材料为AlyGa1-yN,铝组分为0≤y≤0.15,厚度为1-5μm。5. the fabrication method of the GaN-based high electron mobility transistor with barrier layer according to claim 4, wherein the material of the non-intentionally doped high-resistance layer is Al y Ga 1-y N, and the aluminum composition is 0≤y≤0.15, the thickness is 1-5μm. 6.根据权利要求4所述的具势垒层的氮化镓基高电子迁移率晶体管的制作方法,其中非有意掺杂高迁移率沟道层的材料为氮化镓,厚度为10-100nm。6. The method for manufacturing a gallium nitride-based high electron mobility transistor with a potential barrier layer according to claim 4, wherein the material of the non-intentionally doped high mobility channel layer is gallium nitride, and the thickness is 10-100nm .
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