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CN103116080A - Circuit and method for measuring stray inductance of current conversion circuit of three-level converter - Google Patents

Circuit and method for measuring stray inductance of current conversion circuit of three-level converter Download PDF

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CN103116080A
CN103116080A CN2013100329866A CN201310032986A CN103116080A CN 103116080 A CN103116080 A CN 103116080A CN 2013100329866 A CN2013100329866 A CN 2013100329866A CN 201310032986 A CN201310032986 A CN 201310032986A CN 103116080 A CN103116080 A CN 103116080A
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igbt
busbar
commutation circuit
collector
clamp diode
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CN103116080B (en
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张鲁华
宋小亮
尹正兵
吴竞之
陈国栋
董祖毅
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Shanghai Electric Group Transmission And Distribution Equipment Co ltd
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Abstract

本发明公开了一种三电平变流器的换流回路杂感的测量电路及其测试方法,电路包括:第一IGBT、第二IGBT、第三IGBT、第四IGBT、第一钳位二极管、第二钳位二极管、第一谐振电容、第二谐振电容、第一直流支撑电容、第二直流支撑电容、叠层母排、直流电源以及续流电抗器。方法包括:通过续流电抗器构成不同的续流回路,对相应IGBT施加双脉冲,取开通和关断时刻谐振电流频率的平均值,利用谐振电容与回路杂散电感形成的LC并联谐振特性,精确地计算换流回路的杂感。本发明利于实际操作,可以精确地测量出三电平变流器的换流回路杂散电感,便于准确把握三电平变流器在不同电流等级下,功率器件的过电压水平,以指导系统控制策略的制定。

The invention discloses a measurement circuit and a test method for the miscellaneous inductance of a commutation circuit of a three-level converter. The circuit includes: a first IGBT, a second IGBT, a third IGBT, a fourth IGBT, a first clamping diode, The second clamping diode, the first resonant capacitor, the second resonant capacitor, the first DC support capacitor, the second DC support capacitor, laminated bus bars, DC power supply and freewheeling reactor. The method includes: forming different freewheeling circuits through freewheeling reactors, applying double pulses to the corresponding IGBTs, taking the average value of the resonant current frequency at the time of turning on and turning off, using the LC parallel resonance characteristics formed by the resonant capacitor and the stray inductance of the circuit, Accurately calculate the stray inductance of the commutation circuit. The invention is beneficial to practical operation, can accurately measure the stray inductance of the commutation circuit of the three-level converter, and is convenient for accurately grasping the overvoltage level of the power device under different current levels of the three-level converter, so as to guide the system Development of control strategies.

Description

三电平变流器的换流回路杂感的测量电路及其测量方法Measuring circuit and method for measuring stray inductance of commutation circuit of three-level converter

技术领域technical field

本发明涉及电力电子应用领域,尤其涉及一种三电平变流器的换流回路杂感的测量电路及其测量方法。The invention relates to the application field of power electronics, in particular to a measuring circuit and a measuring method for the stray inductance of a commutation circuit of a three-level converter.

背景技术Background technique

随着功率变换系统功率等级的提升以及电力电子技术的发展,IGBT(绝缘栅双极型晶体管)模块的功率密度越来越高,开通关断性能越来越好,这就意味着关断电流及其斜率越来越大。此时将在三电平变流器的换流回路的杂散电感上感生出电压,该电压连同直流母线电压直接附加在关断的IGBT两端,进而有可能超越IGBT的额定电压而导致器件的损坏。因此确切的掌握换流回路杂散电感的数值,可以有效推断不同功率等级下IGBT关断过电压的水平,有利于系统保护方案的设计以保证暂态过程中系统安全稳定的运行。With the improvement of the power level of the power conversion system and the development of power electronics technology, the power density of the IGBT (insulated gate bipolar transistor) module is getting higher and higher, and the turn-on and turn-off performance is getting better and better, which means that the turn-off current and its slope is getting bigger and bigger. At this time, a voltage will be induced on the stray inductance of the commutation circuit of the three-level converter, and the voltage, together with the DC bus voltage, will be directly added to both ends of the turned-off IGBT, which may exceed the rated voltage of the IGBT and cause the device damage. Therefore, accurately grasping the value of the stray inductance of the commutation circuit can effectively infer the level of IGBT turn-off overvoltage under different power levels, which is beneficial to the design of the system protection scheme to ensure the safe and stable operation of the system in the transient process.

三电平变流器存在两个大换流回路和两个小换流回路,由于换流回路中包含多个功率器件,且功率器件的等效杂感与叠层母排的杂感相差在一个数量级以内,因此仅仅依靠叠层母排的杂感数值,并不能精确地判断一定电流等级下IGBT的过电压水平。传统的叠层母排杂感测试方法依靠IGBT开通或者关断瞬间器件的压降,因此所测得的结果不包含该IGBT自身的等效杂感,并且测量过程中要求在压降保持稳定阶段内电流的变化率,测量的精确度与测试条件密切相关。There are two large commutation circuits and two small commutation circuits in the three-level converter. Since the commutation circuit contains multiple power devices, and the equivalent stray inductance of power devices is an order of magnitude different from that of laminated busbars Therefore, relying only on the stray inductance value of the laminated busbar, it is not possible to accurately judge the overvoltage level of the IGBT at a certain current level. The traditional stacked busbar stray inductance test method relies on the voltage drop of the device at the moment the IGBT is turned on or off, so the measured results do not include the equivalent stray inductance of the IGBT itself, and the measurement process requires the current to be stable during the voltage drop period. The rate of change, the accuracy of the measurement is closely related to the test conditions.

发明内容Contents of the invention

本发明的目的在于提供一种三电平变流器的换流回路杂感的测量电路及其测量方法,可以方便、精确地测量出三电平变流器的换流回路杂散电感。The object of the present invention is to provide a measuring circuit and method for measuring the stray inductance of the commutation circuit of the three-level converter, which can conveniently and accurately measure the stray inductance of the commutating circuit of the three-level converter.

实现上述目的的技术方案是:The technical scheme for realizing the above-mentioned purpose is:

本发明之一的一种三电平变流器的换流回路杂感的测量电路,包括第一IGBT、第二IGBT、第三IGBT、第四IGBT、第一钳位二极管、第二钳位二极管、第一谐振电容、第二谐振电容、第一直流支撑电容、第二直流支撑电容、叠层母排、直流电源以及续流电抗器,其中:A measurement circuit for the stray inductance of a commutation circuit of a three-level converter according to one of the present invention, comprising a first IGBT, a second IGBT, a third IGBT, a fourth IGBT, a first clamping diode, and a second clamping diode , the first resonant capacitor, the second resonant capacitor, the first DC support capacitor, the second DC support capacitor, laminated busbars, DC power supply and freewheeling reactor, wherein:

所述第一IGBT的发射极连接所述第二IGBT的集电极;所述第二IGBT的发射极连接所述第三IGBT的集电极;所述第三IGBT的发射极连接所述第四IGBT的集电极;The emitter of the first IGBT is connected to the collector of the second IGBT; the emitter of the second IGBT is connected to the collector of the third IGBT; the emitter of the third IGBT is connected to the fourth IGBT the collector;

所述叠层母排的正端分别连接所述第一IGBT的集电极、所述第一直流支撑电容的正极以及所述直流电源的正极;所述叠层母排的负端分别连接所述第四IGBT的发射极、所述第二直流支撑电容的负极以及所述直流电源的负极;The positive terminal of the laminated busbar is respectively connected to the collector of the first IGBT, the positive pole of the first DC support capacitor and the positive pole of the DC power supply; the negative terminal of the laminated busbar is respectively connected to the The emitter of the fourth IGBT, the negative pole of the second DC support capacitor and the negative pole of the DC power supply;

所述第一直流支撑电容的负极连接所述第二直流支撑电容的正极;The negative pole of the first DC support capacitor is connected to the positive pole of the second DC support capacitor;

所述第一谐振电容与所述第一直流支撑电容并联;The first resonant capacitor is connected in parallel with the first DC support capacitor;

所述第二谐振电容与所述第二直流支撑电容并联;The second resonant capacitor is connected in parallel with the second DC support capacitor;

所述第一钳位二极管的阴极连接所述第一IGBT的发射极;所述第一钳位二极管的阳极连接所述第二钳位二极管的阴极;所述第二钳位二极管的阳极连接所述第四IGBT的集电极;The cathode of the first clamping diode is connected to the emitter of the first IGBT; the anode of the first clamping diode is connected to the cathode of the second clamping diode; the anode of the second clamping diode is connected to the the collector of the fourth IGBT;

所述第一钳位二极管和第二钳位二极管的相接端连接所述第一直流支撑电容和第二直流支撑电容的相接端;The connecting ends of the first clamping diode and the second clamping diode are connected to the connecting ends of the first DC supporting capacitor and the second DC supporting capacitor;

所述续流电抗器连接在所述第一IGBT的集电极和第二IGBT的发射极之间,或者连接在所述第二钳位二极管的阴极和所述第四IGBT的集电极之间;The freewheeling reactor is connected between the collector of the first IGBT and the emitter of the second IGBT, or between the cathode of the second clamping diode and the collector of the fourth IGBT;

所述叠层母排包括:正母排、负母排、零母排、交流母排、第一连接母排和第二连接母排,其中:The laminated busbars include: positive busbars, negative busbars, zero busbars, AC busbars, first connecting busbars and second connecting busbars, wherein:

正母排连接第一IGBT的集电极和第一直流支撑电容的正极;The positive busbar is connected to the collector of the first IGBT and the positive pole of the first DC support capacitor;

负母排连接第四IGBT的发射极和第二直流支撑电容的负极;The negative busbar is connected to the emitter of the fourth IGBT and the negative pole of the second DC support capacitor;

零母排连接第一钳位二极管的阳极和第二钳位二极管的阴极;The zero busbar connects the anode of the first clamping diode and the cathode of the second clamping diode;

交流母排连接第二IGBT的发射极和第三IGBT的集电极;The AC busbar is connected to the emitter of the second IGBT and the collector of the third IGBT;

第一连接母排连接第一IGBT的发射极和第一钳位二极管的阴极;The first connecting busbar is connected to the emitter of the first IGBT and the cathode of the first clamping diode;

第二连接母排连接第四IGBT的集电极和第二钳位二极管的阳极。所述三电平变流器的换流回路包括第一换流回路和第二换流回路,其中:The second connecting busbar is connected to the collector of the fourth IGBT and the anode of the second clamping diode. The commutation circuit of the three-level converter includes a first commutation circuit and a second commutation circuit, wherein:

第一换流回路包括所述正母排、第一IGBT、第二IGBT、交流母排、第三IGBT、第二连接母排、第二钳位二极管、零母排和第一谐振电容;The first commutation circuit includes the positive busbar, the first IGBT, the second IGBT, the AC busbar, the third IGBT, the second connecting busbar, the second clamping diode, the zero busbar and the first resonant capacitor;

第二换流回路包括第二谐振电容、零母排、第二钳位二极管、第二连接母排、第四IGBT和负母排。The second commutation circuit includes a second resonant capacitor, a zero busbar, a second clamping diode, a second connecting busbar, a fourth IGBT and a negative busbar.

上述三电平变流器的换流回路杂感的测量电路,其中,The measurement circuit for the stray inductance of the commutation circuit of the above-mentioned three-level converter, wherein,

在对第一换流回路进行测试时,续流电抗器连接在第一IGBT的集电极和第二IGBT的发射极之间;When testing the first commutation circuit, the freewheeling reactor is connected between the collector of the first IGBT and the emitter of the second IGBT;

在对第二换流回路进行测试时,续流电抗器连接在第二钳位二极管的阴极和第四IGBT的集电极之间。When testing the second commutation circuit, the freewheeling reactor is connected between the cathode of the second clamping diode and the collector of the fourth IGBT.

本发明之二的基于本发明之一所述测量电路的三电平变流器的换流回路杂感的测量方法,包括下列步骤:The method for measuring the stray inductance of the commutation circuit of the three-level converter based on the measuring circuit described in the first aspect of the present invention according to the second aspect of the present invention comprises the following steps:

对第一换流回路进行测试:Test the first commutation loop:

步骤一,续流电抗器连接在第一IGBT的集电极和第二IGBT的发射极之间;使第一IGBT和第四IGBT保持关断,第二IGBT保持开通,第三IGBT在t0时刻开通,t1时刻关断,t2时刻再次开通,t3时刻再次关断;Step 1, the freewheeling reactor is connected between the collector of the first IGBT and the emitter of the second IGBT; keep the first IGBT and the fourth IGBT off, keep the second IGBT on, and turn on the third IGBT at time t0 , turn off at time t1, turn on again at time t2, and turn off again at time t3;

步骤二,通过t2至t3时刻的开通过程,求得第一谐振电容与第一换流回路的杂散电感形成的并联谐振电流的频率f,并根据LC并联谐振的特性,获得第一换流回路的杂散电感L1=1/(4Cs1π2f2);其中,Cs1表示第一谐振电容的电容值;Step 2: Obtain the frequency f of the parallel resonance current formed by the first resonance capacitor and the stray inductance of the first commutation circuit through the turn-on process from t2 to t3, and obtain the first commutation current according to the characteristics of LC parallel resonance The stray inductance L 1 of the loop =1/(4Cs1π 2 f 2 ); where, Cs1 represents the capacitance value of the first resonant capacitor;

对第二换流回路进行测试:Test the second commutation circuit:

步骤三,续流电抗器连接在第二钳位二极管的阴极和第四IGBT的集电极之间;使得第一、第二和第三IGBT均保持关断,第四IGBT S4在t0’时刻开通,t1’时刻关断,t2’时刻再次开通,t3’时刻再次关断;Step 3, the freewheeling reactor is connected between the cathode of the second clamping diode and the collector of the fourth IGBT; so that the first, second and third IGBTs are all kept off, and the fourth IGBT S4 is turned on at time t0' , turn off at time t1', turn on again at time t2', and turn off again at time t3';

步骤四,通过t2’至t3’时刻的开通过程,求得第二谐振电容与第二换流回路的杂散电感形成的并联谐振电流的频率f’,并根据LC并联谐振的特性,获得第二换流回路的杂散电感L2=1/(4Cs2π2f2);其中,Cs2表示第二谐振电容的电容值。Step 4: Obtain the frequency f' of the parallel resonant current formed by the second resonant capacitor and the stray inductance of the second commutation circuit through the turn-on process from t2' to t3', and obtain the first The stray inductance L 2 of the second commutation circuit =1/(4Cs2π 2 f 2 ); wherein, Cs2 represents the capacitance value of the second resonant capacitor.

本发明的有益效果是:本发明利用LC并联谐振测试三电平变流器换流回路杂感,不依靠IGBT开通或关断瞬间的电压和电流,而是利用器件开通的整个过程,且只使用集电极电流的频率值,从而使得测试结果包含回路中所有的功率器件的等效杂感以及叠层母排的杂感,更加精确、可信。同时,本发明只需要测量器件的电流,变量少,有利于实际操作,便于准确把握三电平变流器在不同电流等级下,功率器件的过电压水平,以指导系统控制策略的制定。The beneficial effects of the present invention are: the present invention utilizes LC parallel resonance to test the commutation circuit miscellaneous inductance of the three-level converter, does not rely on the voltage and current at the moment of IGBT turn-on or turn-off, but utilizes the whole process of device turn-on, and only uses The frequency value of the collector current, so that the test results include the equivalent stray inductance of all power devices in the circuit and the stray inductance of the laminated busbar, which is more accurate and reliable. At the same time, the present invention only needs to measure the current of the device, has few variables, is beneficial to practical operation, and is convenient to accurately grasp the overvoltage level of the power device under different current levels of the three-level converter, so as to guide the formulation of the system control strategy.

附图说明Description of drawings

图1为本发明的测试电路示意图;Fig. 1 is a test circuit schematic diagram of the present invention;

图2为本发明的第一换流回路实验波形图;Fig. 2 is the waveform diagram of the first commutation circuit experiment of the present invention;

图3为传统测试方法第一换流回路的实验波形图;Fig. 3 is the experimental waveform diagram of the first commutation circuit of the traditional test method;

图4为本发明的第二换流回路实验波形图。Fig. 4 is an experimental waveform diagram of the second commutation circuit of the present invention.

具体实施方式Detailed ways

下面将结合附图对本发明作进一步说明。The present invention will be further described below in conjunction with accompanying drawing.

请参阅图1,本发明之一的三电平变流器的换流回路杂感的测量电路,包括第一IGBT S1、第二IGBT S2、第三IGBT S3、第四IGBT S4、第一钳位二极管D1、第二钳位二极管D2、第一谐振电容C s1、第二谐振电容Cs2、第一直流支撑电容C1、第二直流支撑电容C2、叠层母排(图中未示)、直流电源DCs以及续流电抗器L,其中:Please refer to Fig. 1, the measuring circuit of the stray inductance of the commutation circuit of one of the three-level converters of the present invention, including the first IGBT S1, the second IGBT S2, the third IGBT S3, the fourth IGBT S4, the first clamp Diode D1, second clamping diode D2, first resonant capacitor Cs1, second resonant capacitor Cs2, first DC support capacitor C1, second DC support capacitor C2, laminated busbar (not shown in the figure), DC Power supply DCs and freewheeling reactor L, where:

第一IGBT、第二IGBT、第三IGBT和第四IGBT同向串联,即:第一IGBTS1的发射极连接第二IGBT S2的集电极;第二IGBT S2的发射极连接第三IGBT S3的集电极;第三IGBT S3的发射极连接第四IGBT S4的集电极;The first IGBT, the second IGBT, the third IGBT and the fourth IGBT are connected in series in the same direction, that is, the emitter of the first IGBTTS1 is connected to the collector of the second IGBT S2; the emitter of the second IGBT S2 is connected to the collector of the third IGBT S3 electrode; the emitter of the third IGBT S3 is connected to the collector of the fourth IGBT S4;

叠层母排的正端DC+分别连接第一IGBT S1的集电极、第一直流支撑电容C1的正极以及直流电源DCs的正极;叠层母排的负端DC-分别连接第四IGBT S4的发射极、第二直流支撑电容C2的负极以及直流电源DCs的负极;The positive terminal DC+ of the laminated busbar is respectively connected to the collector of the first IGBT S1, the positive pole of the first DC support capacitor C1 and the positive pole of the DC power supply DCs; the negative terminal DC- of the laminated busbar is respectively connected to the fourth IGBT S4 The emitter, the negative pole of the second DC support capacitor C2 and the negative pole of the DC power supply DCs;

第一直流支撑电容C1的负极连接第二直流支撑电容C2的正极;The negative pole of the first DC support capacitor C1 is connected to the positive pole of the second DC support capacitor C2;

第一谐振电容Cs1与第一直流支撑电容C1并联;The first resonant capacitor Cs1 is connected in parallel with the first DC support capacitor C1;

第二谐振电容Cs2与第二直流支撑电容C2并联;The second resonant capacitor Cs2 is connected in parallel with the second DC support capacitor C2;

第一钳位二极管D1的阴极连接第一IGBT S1的发射极;第一钳位二极管D1的阳极连接第二钳位二极管D2的阴极;第二钳位二极管D2的阳极连接第四IGBTS4的集电极;The cathode of the first clamping diode D1 is connected to the emitter of the first IGBT S1; the anode of the first clamping diode D1 is connected to the cathode of the second clamping diode D2; the anode of the second clamping diode D2 is connected to the collector of the fourth IGBTS4 ;

第一钳位二极管D1和第二钳位二极管D2的相接端连接第一直流支撑电容C1和第二直流支撑电容C2的相接端;The connecting ends of the first clamping diode D1 and the second clamping diode D2 are connected to the connecting ends of the first DC supporting capacitor C1 and the second DC supporting capacitor C2;

续流电抗器L连接在第一IGBT S1的集电极和第二IGBT S2的发射极之间,或者连接在第二钳位二极管D2的阴极和第四IGBT S4的集电极之间;The freewheeling reactor L is connected between the collector of the first IGBT S1 and the emitter of the second IGBT S2, or between the cathode of the second clamping diode D2 and the collector of the fourth IGBT S4;

第一IGBT S1、第二IGBT S2、第三IGBT S3、第四IGBT S4、第一钳位二极管D1和第二钳位二极管D2组成单相三电平电路;The first IGBT S1, the second IGBT S2, the third IGBT S3, the fourth IGBT S4, the first clamping diode D1 and the second clamping diode D2 form a single-phase three-level circuit;

叠层母排包括:正母排、负母排、零母排、交流母排、第一连接母排和第二连接母排,其中:Laminated busbars include: positive busbar, negative busbar, zero busbar, AC busbar, first connecting busbar and second connecting busbar, among which:

正母排连接第一IGBT S1的集电极和第一直流支撑电容C1的正极;The positive busbar is connected to the collector of the first IGBT S1 and the positive pole of the first DC support capacitor C1;

负母排连接第四IGBT S4的发射极和第二直流支撑电容C2的负极;The negative busbar is connected to the emitter of the fourth IGBT S4 and the negative pole of the second DC support capacitor C2;

零母排连接第一钳位二极管D1的阳极和第二钳位二极管D2的阴极;The zero busbar is connected to the anode of the first clamping diode D1 and the cathode of the second clamping diode D2;

交流母排连接第二IGBT S2的发射极和第三IGBT S3的集电极;The AC busbar is connected to the emitter of the second IGBT S2 and the collector of the third IGBT S3;

第一连接母排连接第一IGBT S1的发射极和第一钳位二极管D1的阴极;The first connecting busbar is connected to the emitter of the first IGBT S1 and the cathode of the first clamping diode D1;

第二连接母排连接第四IGBT S4的集电极和第二钳位二极管D2的阳极;三电平变流器的换流回路包括第一换流回路、第二换流回路、第三换流回路和第四换流回路,其中:The second connecting busbar connects the collector of the fourth IGBT S4 and the anode of the second clamping diode D2; the commutation circuit of the three-level converter includes the first commutation circuit, the second commutation circuit, and the third commutation circuit loop and the fourth commutation loop, wherein:

第一换流回路由正母排、第一IGBT S1、第二IGBT S2、交流母排、第三IGBT S3、第二连接母排、第二钳位二极管D2、零母排和第一谐振电容Cs1构成;The first commutation circuit consists of positive busbar, first IGBT S1, second IGBT S2, AC busbar, third IGBT S3, second connecting busbar, second clamping diode D2, zero busbar and first resonant capacitor Cs1 composition;

第二换流回路包括第二谐振电容Cs2、零母排、第二钳位二极管D2、第二连接母排、第四IGBT S4和负母排构成;The second commutation circuit consists of a second resonant capacitor Cs2, a zero busbar, a second clamping diode D2, a second connecting busbar, a fourth IGBT S4 and a negative busbar;

第三换流回路由第二谐振电容Cs2、零母排、第一箝位二极管D1、第一连接母排、第二IGBT S2、交流母排、第三IGBT S3、第四IGBT S4和负母排构成;The third commutation circuit consists of the second resonant capacitor Cs2, the zero busbar, the first clamping diode D1, the first connecting busbar, the second IGBT S2, the AC busbar, the third IGBT S3, the fourth IGBT S4 and the negative busbar row composition;

第四换流回路由第一谐振电容C s1、正母排、第一IGBT S1、第一连接母排、第一钳位二极管D1和零母排构成;The fourth commutation circuit is composed of the first resonant capacitor C s1, the positive busbar, the first IGBT S1, the first connecting busbar, the first clamping diode D1 and the zero busbar;

两个大换流回路(第一换流回路和第三换流回路)在结构上对称,等效杂感相等;两个小换流回路(第二换流回路和第四换流回路)在结构上也是对称分布,其等效杂感相等;因此,分别测试其中的一个大换流回路和小换流回路即可,本发明测试其中的第一换流回路和第二换流回路。The two large commutation circuits (the first commutation circuit and the third commutation circuit) are symmetrical in structure, and the equivalent noise is equal; the two small commutation circuits (the second commutation circuit and the fourth commutation circuit) are structurally The distribution is also symmetrical, and the equivalent noise is equal; therefore, it is enough to test one of the large commutation loops and one of the small commutation loops, and the present invention tests the first commutation loop and the second commutation loop.

在对第一换流回路(大换流回路)进行测试时,续流电抗器L连接在第一IGBTS1的集电极和第二IGBT S2的发射极之间;在对第二换流回路(小换流回路)进行测试时,续流电抗器L连接在第二钳位二极管D2的阴极和第四IGBT S4的集电极之间,即第一直流支撑电容C1和第二直流支撑电容C2的相接端与第三IGBTS3和第四IGBT S4的相接端之间。When testing the first commutation circuit (large commutation circuit), the freewheeling reactor L is connected between the collector of the first IGBT S1 and the emitter of the second IGBT S2; commutation circuit) for testing, the freewheeling reactor L is connected between the cathode of the second clamping diode D2 and the collector of the fourth IGBT S4, that is, the first DC support capacitor C1 and the second DC support capacitor C2 Between the connecting terminal and the connecting terminal of the third IGBT S3 and the fourth IGBT S4.

另外,图1中,Lσ1、Lσ2、Lσ3、Lσ4、Lσ5、Lσ6分别为正母排、负母排、零母排、交流母排、上连接母排和下连接母排的等效杂散电感;Ls1、Ls2、Ls3、Ls4分别为第一IGBT S1、第二IGBT S2、第三IGBT S3、第四IGBT S4的等效杂散电感;Ld1、Ld2分别为第一、第二钳位二极管D1、D2的等效杂感;直流电源DCs施加于叠层母排的正端DC+和负端DC-;其中,DC0表示第一直流支撑电容C1和第二直流支撑电容C2的相交点,即直流中线端;AC表示输出交流。In addition, in Figure 1, L σ1 , L σ2 , L σ3 , L σ4 , L σ5 , and L σ6 are respectively positive busbar, negative busbar, zero busbar, AC busbar, upper connection busbar and lower connection busbar The equivalent stray inductance of L s1 , L s2 , L s3 , and L s4 are the equivalent stray inductance of the first IGBT S1, the second IGBT S2, the third IGBT S3, and the fourth IGBT S4 respectively; L d1 , L d2 is the equivalent stray inductance of the first and second clamping diodes D1 and D2 respectively; the DC power supply DCs is applied to the positive terminal DC+ and the negative terminal DC- of the laminated busbar; where DC0 represents the first DC support capacitor C1 and The intersection point of the second DC support capacitor C2 is the DC neutral line terminal; AC means the output AC.

本发明之一的测试电路的工作原理,即本发明之二的三电平变流器的换流回路杂感的测试方法(基于本发明之一),如下:The working principle of the test circuit of the present invention, that is, the test method of the commutation circuit spurious inductance of the three-level converter of the present invention (based on the present invention), is as follows:

对第一换流回路进行测试时:When testing the first commutation circuit:

续流电抗器L连接在第一IGBT S1的集电极和第二IGBT S2的发射极之间;此时,使得第一IGBT S1和第四IGBT S4保持关断,第二IGBT S2保持开通,对第三IGBT S3施加双脉冲,即:使得第三IGBT S3在t0时刻开通,t1时刻关断,t2时刻再次开通,t3时刻再次关断;如图2所示,为本发明的第一换流回路实验波形图;图2中Vpulse为第三IGBT S3的驱动电压,Ic为流过第三IGBTS3集电极的电流;Vce表示第三IGBT S3集电极和发射极之间的电压,即第三IGBT S3的端电压;The freewheeling reactor L is connected between the collector of the first IGBT S1 and the emitter of the second IGBT S2; at this time, the first IGBT S1 and the fourth IGBT S4 are kept off, and the second IGBT S2 is kept on. The third IGBT S3 applies double pulses, that is, the third IGBT S3 is turned on at t0, turned off at t1, turned on again at t2, and turned off again at t3; as shown in Figure 2, it is the first commutation of the present invention Circuit experiment waveform diagram; in Figure 2, Vpulse is the driving voltage of the third IGBT S3, Ic is the current flowing through the collector of the third IGBT S3; Vce represents the voltage between the collector and the emitter of the third IGBT S3, that is, the third IGBT The terminal voltage of S3;

t0时刻第三IGBT S3开通,叠层母排的正端DC+通过续流电抗器L向端点DC0放电,Ic线性上升;由图1可以看出,此时Cs1与Lσ1+L+Lσ4+Ls3+Lσ6+Ld2+Lσ3组成LC并联谐振,在Ic上表现为衰减振荡。t1和t3时刻第三IGBT S3关断,流经续流电抗器L的电流通过第一、第二IGBT S1、S2的反并联二极管续流,Ic为杂散电感中的储能与第一谐振电容Cs1谐振,并最终衰减至0。t2时刻第三IGBT S3再次开通,续流电抗器L中的电流通过第三IGBT S3流向端点DC0,第一IGBT S1的反并联二极管进入反向恢复过程,此时第一IGBT S1等效为开通;由此可得LC谐振电路中的杂感L1=Lσ1+[L//(Ls1+Ls2)]+Lσ4+Ls3+Lσ6+Ld2+Lσ3,式中L//(Ls1+Ls2)表示第一、第二IGBT S1、S2的等效杂感串联后再与L并联,通常Ls1+Ls2与L相差在三个数量级左右,因此L//(Ls1+Ls2)=Ls1+Ls2,即L1=Lσ1+Ls1+Ls2+Lσ4+Ls3+Lσ6+Ld2+Lσ3,说明在此过程中第一换流回路内所有杂感都包含在内:正母排、第一IGBT S1、第二IGBT S2、交流母排、第三IGBT S3、第二连接母排、第二钳位二极管D2和零母排各自的杂感。At time t0, the third IGBT S3 is turned on, the positive terminal DC+ of the laminated busbar discharges to the terminal DC0 through the freewheeling reactor L, and Ic rises linearly; it can be seen from Figure 1 that at this time Cs1 and L σ1 + L + L σ4 + L s3 + L σ6 + L d2 + L σ3 form the LC parallel resonance, which shows damped oscillation on Ic. At t1 and t3, the third IGBT S3 is turned off, and the current flowing through the freewheeling reactor L is freewheeling through the antiparallel diodes of the first and second IGBTs S1 and S2. Ic is the energy storage in the stray inductance and the first resonance Capacitor Cs1 resonates and eventually decays to zero. At t2, the third IGBT S3 is turned on again, the current in the freewheeling reactor L flows to the terminal DC0 through the third IGBT S3, and the anti-parallel diode of the first IGBT S1 enters the reverse recovery process, at this time, the first IGBT S1 is equivalent to turning on ; From this we can get the stray inductance L 1 =L σ1 +[L//(L s1 +L s2 )]+L σ4 +L s3 +L σ6 +L d2 +L σ3 in the LC resonant circuit, where L// (L s1 +L s2 ) means that the equivalent stray inductance of the first and second IGBTs S1 and S2 are connected in series and then connected in parallel with L. Generally, the difference between L s1 +L s2 and L is about three orders of magnitude, so L//(L s1 +L s2 )=L s1 +L s2 , that is, L 1 =L σ1 +L s1 +L s2 +L σ4 +L s3 +L σ6 +L d2 +L σ3 All stray inductances are included: the respective stray inductances of positive busbar, first IGBT S1, second IGBT S2, AC busbar, third IGBT S3, second connecting busbar, second clamping diode D2 and zero busbar.

由图2可得,Ic电流在Δt时间内的频率为,f=4.5/Δt=730kHz,Δt表示图中所示4.5个周波的时长;f即为第一谐振电容Cs1与第一换流回路的杂散电感形成的并联谐振电流的频率;已知第一谐振电容Cs1=0.22uF,根据LC并联谐振的特性

Figure BDA00002788605300071
则得到整个第一换流回路的杂散电感L1=1/(4Cs1π2f2)=216nH。It can be obtained from Figure 2 that the frequency of the Ic current within the time period Δt is, f=4.5/Δt=730kHz, Δt represents the duration of 4.5 cycles shown in the figure; f is the first resonant capacitor Cs1 and the first commutation circuit The frequency of the parallel resonance current formed by the stray inductance; the known first resonance capacitance Cs1=0.22uF, according to the characteristics of LC parallel resonance
Figure BDA00002788605300071
Then the stray inductance L 1 of the entire first commutation circuit is obtained =1/(4Cs1π 2 f 2 )=216nH.

请参阅图3,为传统测试方法第一换流回路的实验波形图,即图2中t2时刻第三IGBT S3开通时的波形,图3中Vge为第三IGBT S3的门极电压;ΔVce为S3发射极与集电极电压的变化值;ΔIc为S3集电极电流的变化值;Δt’表示Vce保持稳定的时间长度。根据楞次定律,叠层母排的等效杂散电感中Lσ1、Lσ6会感生出左正右负的电压,Ls1、Ls2、Lσ4、Ls3、Ld2、Lσ3会感应出上正下负的电压。此时第三IGBT S3的端电压Vce表现为较直流母线电压DCs会有所降低,该电压差为第一换流回路中Lσ1、Ls1、Ls2、Lσ4、Lσ6、Ld2、Lσ3的压降,并不包括Ls3自身的杂感引起的压降。同时为了测得精确的杂感数值,应保证Vce有一个稳定、明显的电压阶梯。必须保证t20至t21时间内Vce获得一个稳定的电压,就要求续流电抗器L中的电流足够大,势必要提高直流电源DCs的供电电压或者大幅度减小续流电抗器L的电感数值,这就要求IGBT在测试过程中需要承受过高的电压和电流,进而有可能造成测试器件的损坏。根据电感的动态特性得出杂感数值,L1=ΔVce/(ΔIc/Δt’)=300V/(297A/198ns)=199nH。与本发明的方法,两者之间的差值17nH为第三IGBT S3自身的杂散电感,与所使用IGBT ABB 5SNA 1200G450300数据手册中18nH的杂感值吻合。Please refer to Figure 3, which is the experimental waveform diagram of the first commutation circuit of the traditional test method, that is, the waveform when the third IGBT S3 is turned on at time t2 in Figure 2, and Vge in Figure 3 is the gate voltage of the third IGBT S3; ΔV ce is the change value of S3 emitter and collector voltage; ΔI c is the change value of S3 collector current; Δt' indicates the length of time that V ce remains stable. According to Lenz's law, L σ1 and L σ6 in the equivalent stray inductance of laminated busbars will induce left positive and right negative voltages, and L s1 , L s2 , L σ4 , L s3 , L d2 , and L σ3 will induce Out of the positive and negative voltage. At this time, the terminal voltage Vce of the third IGBT S3 is lower than the DC bus voltage DCs, and the voltage difference is L σ1 , L s1 , L s2 , L σ4 , L σ6 , L d2 , The pressure drop of L σ3 does not include the pressure drop caused by the stray inductance of L s3 itself. At the same time, in order to measure the accurate value of stray inductance, it should be ensured that Vce has a stable and obvious voltage ladder. It is necessary to ensure that Vce obtains a stable voltage within the period from t20 to t21, which requires the current in the freewheeling reactor L to be large enough, which is bound to increase the supply voltage of the DC power supply DCs or greatly reduce the inductance value of the freewheeling reactor L. This requires the IGBT to withstand excessive voltage and current during the test, which may cause damage to the test device. According to the dynamic characteristics of the inductor, the value of the stray inductance is obtained, L1=ΔV ce /(ΔI c /Δt')=300V/(297A/198ns)=199nH. Compared with the method of the present invention, the difference of 17nH between the two is the stray inductance of the third IGBT S3 itself, which is consistent with the stray inductance value of 18nH in the data sheet of the used IGBT ABB 5SNA 1200G450300.

对第二换流回路进行测试时:When testing the second commutation circuit:

续流电抗器L连接在第二钳位二极管D2的阴极和第四IGBT S4的集电极之间;此时,使得第一、第二、第三IGBT S1、S2、S3保持关断,对第四IGBT S4施加双脉冲,即:使得第四IGBT S4在t0’时刻开通,t1’时刻关断,t2’时刻再次开通,t3’时刻再次关断。如图4所示,为本发明的第二换流回路实验波形图;图4中,Vpulse’为第四IGBT S4的驱动电压,Ic’为流过第四IGBT S4集电极的电流;Vce’表示第四IGBT S4集电极和发射极之间的电压,即第四IGBT S4的端电压;Vge’表示第四IGBT S4的门极电压:The freewheeling reactor L is connected between the cathode of the second clamping diode D2 and the collector of the fourth IGBT S4; at this time, the first, second, and third IGBTs S1, S2, and S3 are kept turned off, and the second The four IGBTs S4 apply double pulses, that is, the fourth IGBT S4 is turned on at t0', turned off at t1', turned on again at t2', and turned off again at t3'. As shown in Figure 4, it is the second commutation circuit experiment waveform diagram of the present invention; Among Fig. 4, Vpulse' is the drive voltage of the 4th IGBT S4, and Ic' is the electric current flowing through the collector of the 4th IGBT S4; Vce' Indicates the voltage between the collector and emitter of the fourth IGBT S4, that is, the terminal voltage of the fourth IGBT S4; Vge' indicates the gate voltage of the fourth IGBT S4:

t0’时刻第四IGBT S4开通,端点DC0通过续流电抗器L向叠层母排的负端DC-放电,Ic’线性上升。由图1可以看出,此时Cs2与L+Ls4+Lσ2组成LC并联谐振,在Ic’上表现为衰减振荡。t1’和t3’时刻第四IGBT S4关断,流经续流电抗器L的电流通过第二钳位二极管D2续流,Ic’为杂散电感中的储能与第二谐振电容Cs2谐振,并最终衰减至0。t2’时刻第四IGBT S4再次开通,流电抗器L中的电流通过第四IGBT S4流向叠层母排的负端DC-,第二钳位二极管D2进入反向恢复过程,此时第二钳位二极管D2等效为开通。由此可得LC谐振电路中的杂感L2=Lσ3+[L//(Ld2+Lσ6)]+Ls4+Lσ2,式中L//(Ld2+Lσ6)表示第二钳位二极管D2、第二连接母排的等效杂感串联后再与L并联,通常Ld2+Lσ6与L相差在三个数量级左右,因此L//(Ld2+Lσ6)=Ld2+Lσ6,即L2=Lσ3+Ld2+Lσ6+Ls4+Lσ2,说明在此过程中第二换流回路内所有杂感都包含在内:零母排、第二钳位二极管D2、第二连接母排、第四IGBT S4和负母排各自的杂感。At time t0', the fourth IGBT S4 is turned on, the terminal DC0 discharges to the negative terminal DC- of the laminated busbar through the freewheeling reactor L, and Ic' rises linearly. It can be seen from Fig. 1 that Cs2 and L+L s4 +L σ2 form LC parallel resonance at this time, which shows damped oscillation on Ic'. At t1' and t3', the fourth IGBT S4 is turned off, and the current flowing through the freewheeling reactor L is freewheeling through the second clamping diode D2. Ic' is the energy storage in the stray inductance and resonates with the second resonant capacitor Cs2. and eventually decays to 0. At t2', the fourth IGBT S4 is turned on again, and the current in the flow reactor L flows through the fourth IGBT S4 to the negative terminal DC- of the laminated busbar, and the second clamping diode D2 enters the reverse recovery process. At this time, the second clamping diode D2 Bit diode D2 is equivalent to open. From this we can get the stray inductance L 2 =L σ3 +[L//(L d2 +L σ6 )]+L s4 +L σ2 in the LC resonant circuit, where L//(L d2 +L σ6 ) represents the second The clamping diode D2 and the equivalent stray inductance of the second connected busbar are connected in series and then connected in parallel with L. Generally, the difference between L d2 + L σ6 and L is about three orders of magnitude, so L//(L d2 + L σ6 ) = L d2 +L σ6 , that is, L 2 =L σ3 +L d2 +L σ6 +L s4 +L σ2 , indicating that all stray inductances in the second commutation circuit are included in this process: zero busbar, second clamping diode D2, the noise inductance of the second connecting busbar, the fourth IGBT S4 and the negative busbar.

由图4可得,Ic’电流在Δt”时间内的频率为,f’=7/Δt”=801kHz,Δt”表示图中所示7个周波的时长;f’即为第二谐振电容Cs2与第二换流回路的杂散电感形成的并联谐振电流的频率;已知第一谐振电容Cs2=0.22uF,根据LC并联谐振的特性

Figure BDA00002788605300081
则整个第二换流回路的杂散电感L2=1/(4Cs2π2f2)=177nH。对比第一换流回路的杂感有39nH的差值,主要是因为第一换流回路比第二换流回路多包含2只IGBT和交流母排的杂感,其中2只IGBT大约为36nH(由IGBTABB 5SNA 1200G450300数据手册得出),进一步说明了本发明所公开方法的准确性。It can be obtained from Figure 4 that the frequency of Ic' current within Δt" is f'=7/Δt"=801kHz, Δt" represents the duration of 7 cycles shown in the figure; f' is the second resonant capacitor Cs2 The frequency of the parallel resonance current formed with the stray inductance of the second commutation circuit; the known first resonance capacitance Cs2=0.22uF, according to the characteristics of LC parallel resonance
Figure BDA00002788605300081
Then the stray inductance L 2 of the whole second commutation circuit =1/(4Cs2π 2 f 2 )=177nH. Compared with the noise inductance of the first commutation circuit, there is a difference of 39nH, mainly because the first commutation circuit contains two more IGBTs and the noise inductance of the AC busbar than the second commutation circuit, and the two IGBTs are about 36nH (by IGBTABB 5SNA 1200G450300 data book), which further illustrates the accuracy of the method disclosed in the present invention.

以上实施例仅供说明本发明之用,而非对本发明的限制,有关技术领域的技术人员,在不脱离本发明的精神和范围的情况下,还可以做出各种变换或变型,因此所有等同的技术方案也应该属于本发明的范畴,应由各权利要求所限定。The above embodiments are only for the purpose of illustrating the present invention, rather than limiting the present invention. Those skilled in the relevant technical fields can also make various changes or modifications without departing from the spirit and scope of the present invention. Therefore, all Equivalent technical solutions should also belong to the scope of the present invention and should be defined by each claim.

Claims (3)

1. the metering circuit of the commutation circuit random thoughts of a three-level current transformer, it is characterized in that, comprise an IGBT, the 2nd IGBT, the 3rd IGBT, the 4th IGBT, the first clamp diode, the second clamp diode, the first resonant capacitance, the second resonant capacitance, the first DC support electric capacity, the second DC support electric capacity, stack bus bar, direct supply and afterflow reactor, wherein:
The emitter of a described IGBT connects the collector of described the 2nd IGBT; The emitter of described the 2nd IGBT connects the collector of described the 3rd IGBT; The emitter of described the 3rd IGBT connects the collector of described the 4th IGBT;
The anode of described stack bus bar connects respectively the positive pole of the anodal and described direct supply of the collector of a described IGBT, described the first DC support electric capacity; The negative terminal of described stack bus bar connects respectively the negative pole of the emitter of described the 4th IGBT, described the second DC support electric capacity and the negative pole of described direct supply;
The negative pole of described the first DC support electric capacity connects the positive pole of described the second DC support electric capacity;
Described the first resonant capacitance and described the first DC support Capacitance parallel connection;
Described the second resonant capacitance and described the second DC support Capacitance parallel connection;
The negative electrode of described the first clamp diode connects the emitter of a described IGBT; The negative electrode of described the second clamp diode of the anodic bonding of described the first clamp diode; The collector of described the 4th IGBT of the anodic bonding of described the second clamp diode;
Described the first clamp diode is held the end that joins that connects described the first DC support electric capacity and the second DC support electric capacity with being connected joining of clamp diode;
Described afterflow reactor is connected between the emitter of the collector of a described IGBT and the 2nd IGBT, perhaps is connected between the collector of the negative electrode of described the second clamp diode and described the 4th IGBT;
Described stack bus bar comprises: positive busbar, negative busbar, zero busbar, alternating current bus bar, first connect busbar and connect busbar with being connected, wherein:
Positive busbar connects the collector of an IGBT and the positive pole of the first DC support electric capacity;
Negative busbar connects the emitter of the 4th IGBT and the negative pole of the second DC support electric capacity;
Zero busbar connects the anode of the first clamp diode and the negative electrode of the second clamp diode;
Alternating current bus bar connects the emitter of the 2nd IGBT and the collector of the 3rd IGBT;
First connects busbar connects the emitter of an IGBT and the negative electrode of the first clamp diode;
Second connects busbar connects the collector of the 4th IGBT and the anode of the second clamp diode.The commutation circuit of described three-level current transformer comprises the first commutation circuit and the second commutation circuit, wherein:
The first commutation circuit comprises that described positive busbar, an IGBT, the 2nd IGBT, alternating current bus bar, the 3rd IGBT, second connect busbar, the second clamp diode, zero busbar and the first resonant capacitance;
The second commutation circuit comprises that the second resonant capacitance, zero busbar, the second clamp diode, second connect busbar, the 4th IGBT and negative busbar.
2. the metering circuit of the commutation circuit random thoughts of described three-level current transformer according to claim 1 is characterized in that,
When the first commutation circuit was tested, the afterflow reactor was connected between the emitter of the collector of an IGBT and the 2nd IGBT;
When the second commutation circuit was tested, the afterflow reactor was connected between the collector of the negative electrode of the second clamp diode and the 4th IGBT.
3. the measuring method based on the commutation circuit random thoughts of the three-level current transformer of the described metering circuit of claim 1 is characterized in that, comprises the following steps:
The first commutation circuit is tested:
Step 1, afterflow reactor are connected between the emitter of the collector of an IGBT and the 2nd IGBT; Make an IGBT and the 4th IGBT keep turn-offing, it is open-minded that the 2nd IGBT keeps, and the 3rd IGBT is constantly open-minded at t0, and t1 turn-offs constantly, and t2 is constantly again open-minded, and t3 turn-offs constantly again;
Step 2 by t2 to t3 opening process constantly, is tried to achieve the frequency f of parallel resonance electric current of the stray inductance formation of the first resonant capacitance and the first commutation circuit, and according to the characteristic of LC parallel resonance, obtains the stray inductance L of the first commutation circuit 1=1/(4Cs1 π 2f 2); Wherein, Cs1 represents the capacitance of the first resonant capacitance;
The second commutation circuit is tested:
Step 3, afterflow reactor are connected between the collector of the negative electrode of the second clamp diode and the 4th IGBT; So that first, second, and third IGBT all keeps turn-offing, the 4th IGBT S4 is constantly open-minded at t0 ', and t1 ' turn-offs constantly, and t2 ' is constantly again open-minded, and t3 ' turn-offs constantly again;
Step 4 is passed through t2 ' to t3 ' opening process constantly, tries to achieve the frequency f of parallel resonance electric current of the stray inductance formation of the second resonant capacitance and the second commutation circuit ', and according to the characteristic of LC parallel resonance, obtain the stray inductance L of the second commutation circuit 2=1/(4Cs2 π 2f 2); Wherein, Cs2 represents the capacitance of the second resonant capacitance.
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