CN103107068A

CN103107068A - Nickel (Ni) film annealing side gate graphene transistor preparation method based on reaction of silicon carbide (SiC) and chlorine gas

Info

Publication number: CN103107068A
Application number: CN2013100398211A
Authority: CN
Inventors: 郭辉; 张晨旭; 张玉明; 张克基; 雷天民; 胡彦飞
Original assignee: Xidian University
Current assignee: Xidian University
Priority date: 2013-01-31
Filing date: 2013-01-31
Publication date: 2013-05-15

Abstract

The invention discloses a method for preparing a Ni film annealed side-gate graphene transistor based on the reaction of SiC and chlorine gas, which mainly solves the problem that the gate dielectric of the graphene transistor prepared by the prior art reduces the channel carrier mobility and cannot effectively control the current transmission problem of characteristics. The realization process is: (1) cleaning the SiC sample; (2) depositing a _SiO2 mask on the cleaned SiC sample, and photoetching the side gate transistor pattern on the _SiO2 ; (3) taking the photoetched sample Place in a quartz tube and react with Cl to form a carbon film; (4) remove _the SiO mask; (5) deposit a layer of Ni film on the carbon film sample by electron beam; (6) place the carbon film sample in Ar gas , annealing to generate side-gate graphene; (7) Deposit a metal Pd/Au layer on the graphene sample and etch to form the metal contact of the side-gate transistor. The carrier mobility of the side-gate graphene transistor produced by the invention is extremely high, the channel current of a single transistor can be precisely controlled, and the scattering effect of the top-gate dielectric of the top-gate graphene field effect transistor can be avoided.

Description

Ni film annealing side grid Graphene transistor preparation method based on SiC and chlorine reaction

Technical field

The invention belongs to microelectronics technology, relate to the semiconductor device preparation method, specifically be based on the Ni film annealing side grid Graphene transistor preparation method of SiC and chlorine reaction.

Technical background

Along with people to high-performance, high reliability, the raising of low power consumption equipment demand becomes more to device property on integrated circuit and pays close attention to.Graphene, this material that is formed by two-dimensional hexagonal carbon lattice, after the Lip river husband that disappeared by two scientist An Delie Jim of Univ Manchester UK and Ke Siteyanuowo from 2004 due to its outstanding electricity structure characteristic finds to obtain, namely by as the candidate materials of making high performance device.

The preparation method of existing Graphene, it is " method of process for preparing graphenes by chemical vapour deposition " patent of 200810113596.0 as application number, disclosed method is: Kaolinite Preparation of Catalyst at first, then carry out high temperature chemical vapor deposition, to put into anoxic reactor with the substrate of catalyst, make substrate reach 500-1200 ℃, passing into the carbon containing source of the gas carries out chemical deposition and obtains Graphene again, then Graphene is purified, namely use acid treatment or evaporate under low pressure, high temperature, to remove catalyst.The major defect of the method is: complex process, need the special catalyst of removing, and energy resource consumption is large, and production cost is high.

Geim seminar in 2005 and Kim seminar find, under room temperature, Graphene has 10 times to the high carrier mobility of commercial silicon chip approximately 2 * 10 ⁵cm ²/ Vs, and be subjected to the impact of temperature and doping effect very little, show the ballistic transport characteristic of room temperature submicron-scale, this be Graphene as the most outstanding advantage of nanometer electronic device, make the room temperature trajectory field effect transistor of electronic engineering field very attractive become possibility.Larger carrier mobility and low contact resistance help further to reduce the devices switch time, and the operation response characteristic of ultra-high frequency is another significant advantage of graphene-based electronic device.In addition, different from the silicon that uses in present electronic device and metal material, Graphene is reduced to same good stability and the electric property of keeping of nanoscale, makes the exploration single-electron device become possibility.Recently, Geim seminar utilizes the method for electron beam lithography and dry etching that same Graphene is processed into quantum dot, lead-in wire and grid, obtain manipulable graphene-based single electron field effect transistor under room temperature, solved the limited problem of operating temperature that present single electron field effect brings due to the nanoscale instability of material and structure.The Holland scientist has reported first graphene-based superconducting field-effect pipe, finds still can transmit certain electric current in the situation that charge density is zero Graphene, may be low energy consumption, and switching time, fast nanoscale superconductive electronic device brought breakthrough.

Recently the document about the device of Graphene emerges in multitude, and about Graphene, a lot of reports is being arranged aspect electric capacity, solar cell, transparency electrode.Being on the scene effect transistor FET application facet also has a lot of reports, as back of the body grid graphene field effect transistor BG-GFET, top grid graphene field effect transistor TG-GFET, double grid graphene field effect transistor DG-GFET etc.They have certain shortcoming, need the improvement in a nearly step, but this can not affect the prospect of nearly half application in Graphene being on the scene effect pipe aspect.In the preparation technology of existing GFET, Graphene need to deposit or transfer to as on Si or SiC substrate, substrate has played the effect of the back of the body grid that are similar in traditional double-gate structure, because the introducing of the top gate medium of top grid GFET can be introduced more scattering source, simultaneously, in the grid manufacturing process of top, graphene film also is easy to be damaged, and makes the mobility of top grid GFET significantly descend.

Summary of the invention

The object of the invention is to for above-mentioned the deficiencies in the prior art, a kind of Ni film annealing side grid Graphene transistor preparation method based on SiC and chlorine reaction is proposed, to improve the electron mobility of Graphene, can realize the single transistor electric current is accurately controlled by changing the side gate voltage, avoid the scattering effect of top grid graphene field effect pipe top gate medium.

For achieving the above object, preparation method of the present invention comprises the following steps:

(1) the SiC print is cleaned, to remove surface contaminant;

(2) the SiC print surface after cleaning utilizes plasma enhanced CVD PECVD method, the thick SiO of deposit one deck 0.5-1.0 μ m ₂, as mask;

(3) photoetching side gate figure:

Be made into reticle according to the transistorized side grid G of side grid Graphene, source S, drain D, conducting channel position;

Be 3% acrylic resin PMMA solution in mask surface spin coating concentration, and put into baking oven, baking is 60 seconds under 180 ℃, and itself and mask are closely linked;

With electron beam, PMMA is exposed again, the figure on reticle is transferred to SiO ₂On mask, and use buffered hydrofluoric acid to SiO ₂Mask layer corrodes, and exposes SiC, forms the identical window of side gate transistor shape;

The print that (4) will form after window is placed in quartz ampoule, is heated to 700-1100 ℃;

(5) pass into Ar gas and Cl in quartz ampoule ₂The mist of gas makes Cl ₂SiC reaction 3-8min with exposed generates carbon film;

(6) the carbon film print that generates is placed in buffered hydrofluoric acid solution to remove the SiO outside window ₂

(7) the thick Ni film of electron beam evaporation deposit 300-500nm on the carbon film print;

(8) will be deposited with the carbon film print of Ni film, and be placed in Ar gas, be the 10-30min that anneals under 1000-1200 ℃ in temperature, make carbon film reconstitute Graphene at the window's position, form simultaneously the transistorized side grid of side grid Graphene, source electrode, drain electrode and conducting channel;

(9) the Graphene print is placed in HCl and CuSO ₄In mixed solution to remove the Ni film;

(10) the method depositing metal Pd/Au contact layer of deposited by electron beam evaporation on the Graphene print;

(11) photoetching metal electrode:

11a) according to side grid, source, leakage metal electrode position making reticle;

11b) with concentration be 7% PMMA solution spin coating metal Pd/Au contact layer on, then put into baking oven, baking is 80 seconds under 200 ℃, makes itself and metal level close contact;

11c) use electron beam exposure PMMA, the figure on reticle is transferred on metal contact layer, and use oxygen to carry out reactive ion etching RIE to metal contact layer, form side grid, source, the drain metal contact of side gate transistor;

(12) sample that uses acetone soln to soak to make took out post-drying to remove residual PMMA in 10 minutes, obtained side grid Graphene transistor.

The present invention compared with prior art has following advantage:

1. the present invention is owing to adopting side grid structure to produce the Graphene transistor, thereby can realize accurate control to the single transistor channel resistance by changing the side gate voltage, avoid the scattering effect of top grid graphene field effect pipe top gate medium.

2. the present invention is due to the Graphene of optionally having grown, and need not Graphene is carried out etching when making device on this Graphene, thereby the electron mobility in Graphene can not reduce, and guaranteed the device performance of making.

3. the present invention is owing to utilizing SiC and Cl ₂Solid/liquid/gas reactions, thereby can react under lower temperature and normal pressure, and reaction rate is fast, the Graphene smooth surface of generation, and voidage is low, and thickness is easily controlled.

4. the method technique of the present invention's use is simple, and energy savings is safe.

Description of drawings

Fig. 1 is the device schematic diagram that the present invention prepares Graphene;

Fig. 2 is that the present invention manufactures the transistorized flow chart of connecting-type side grid Graphene;

Fig. 3 is the transistorized domain schematic diagram of connecting-type side grid Graphene of the present invention;

Fig. 4 is that the present invention manufactures the transistorized flow chart of disconnected type side grid Graphene;

Fig. 5 is the transistorized domain schematic diagram of the disconnected type side of the present invention grid Graphene.

Embodiment

With reference to Fig. 1, Preparation equipment of the present invention mainly is comprised of quartz ampoule 1 and resistance furnace 2, and wherein quartz ampoule 1 is provided with air inlet 3 and gas outlet 4, and resistance furnace is 2 for the annular hollow structure, and quartz ampoule 1 is inserted in resistance furnace 2.

Also used etching system in the present invention, electron beam evaporation system, the plasma enhanced CVD PECVD of system, and the ripe microelectronic technique system such as reactive ion etching RIE.

Embodiment 1

With reference to Fig. 2, the transistorized step of making connecting-type side grid Graphene of the present invention is as follows:

Step 1: clean the 6H-SiC print, to remove surface contaminant, as Fig. 2 (a).

(1.1) the 6H-SiC substrate base is used NH ₄OH+H ₂O ₂Reagent soaked sample 10 minutes, took out post-drying, to remove the sample surfaces organic remains;

(1.2) the 6H-SiC print that will remove after surperficial organic remains re-uses HCl+H ₂O ₂Reagent soaked sample 10 minutes, took out post-drying, to remove ionic contamination.

Step 2: at 6H-SiC print surface deposition one deck SiO ₂, as Fig. 2 (b).

(2.1) the 6H-SiC print after cleaning is put into the PECVD system, and internal system pressure is adjusted to 3.0Pa, and radio-frequency power is adjusted to 100W, and temperature is adjusted to 150 ℃;

(2.2) pass into the SiH that flow velocity is respectively 30sccm, 60sccm and 200sccm in system ₄, N ₂O and N ₂, the duration is 30min, makes SiH ₄And N ₂The O reaction is at 6H-SiC print surface deposition one deck 0.5 thick SiO of μ m ₂Mask layer.

Step 3: at SiO ₂Carve graphical window on mask layer, as Fig. 2 (c).

(3.1) at SiO ₂Mask layer spin coating concentration is 3% PMMA solution, and puts into baking oven and toast 60s under 180 ℃;

(3.2) make reticle according to the figure of side gate transistor as shown in Figure 3, with electron beam, PMMA is exposed, electron accelerating voltage is 100kV, and exposure intensity is 8000 μ C/cm ², figure on reticle is transferred to SiO ₂On mask;

(3.3) with buffered hydrofluoric acid to SiO ₂Mask layer corrodes, and figure on reticle is transferred to SiO ₂On mask layer, expose 6H-SiC, at the transistorized side grid of side grid Graphene, source, leakage and raceway groove position formation window.

Step 4: the print that will make window by lithography pack into quartz ampoule and exhaust heating.

The print that (4.1) will make window by lithography is put into quartz ampoule 1, and quartz ampoule is placed in resistance furnace 2;

(4.2) passing into flow velocity from air inlet 3 to quartz ampoule is the Ar gas of 80sccm, to quartz ampoule carry out 10 minutes emptying, air 4 is discharged from the gas outlet;

(4.3) open the resistance furnace mains switch, quartz ampoule is heated to 700 ℃.

Step 5: reaction generates carbon film, as Fig. 2 (d).

Pass into to quartz ampoule Ar gas and the Cl that flow velocity is respectively 98sccm and 2sccm ₂Gas, the time is 8 minutes, makes Cl ₂6H-SiC reaction with exposed generates carbon film.

Step 6: remove remaining SiO ₂

The carbon film print that generates is taken out and is placed in from quartz ampoule the buffered hydrofluoric acid solution that proportioning is 1:10, to remove the SiO outside window ₂

Step 7: deposit Ni film on the carbon film print, as Fig. 2 (e).

The carbon film print is put on the slide of electron beam evaporation deposition machine, the adjustment slide is 50cm to the distance of target, and reative cell pressure is evacuated to 5 * 10 ^-4Pa, the adjusting line is 40mA, evaporation 10min, the thick Ni film of deposition one deck 300nm on the Si print.

Step 8: reconstitute Graphene.

The carbon film print that deposits the Ni film is placed in the Ar gas that flow velocity is 100sccm, be to anneal 30 minutes under 1000 ℃ in temperature, make carbon film reconstitute continuous side grid structure Graphene at the window's position, form the transistorized side grid of side grid Graphene, source electrode, drain electrode and conducting channel.

Step 9: the Graphene print is placed in HCl and CuSO ₄In mixed solution to remove the Ni film, as Fig. 2 (f).

Step 10: the depositing metal contact layer, as Fig. 2 (g).

(10.1) the method depositing metal Pd of deposited by electron beam evaporation on the Graphene print of removing the Ni film, thickness is 5nm;

(10.2) utilize the method depositing metal Au of electron beam evaporation on the metal Pd layer, thickness is 100nm.

Step 11: photoetching forms Metal Contact, as Fig. 2 (h).

(11.1) spin coating concentration is 7% PMMA solution on metal level, and puts into baking oven, toasts 80s under 200 ℃;

(11.2) according to side grid, source, leakage metal electrode position making reticle, use electron beam that PMMA is exposed, figure on reticle is transferred on metal contact layer;

(11.3) use oxygen to carry out reactive ion etching RIE to metal contact layer, form the transistorized side grid of side grid Graphene, source, drain metal contact.

Step 12: the sample that the immersion of use acetone soln is made took out post-drying to remove residual PMMA in 10 minutes, obtained side grid Graphene transistor.

Embodiment 2

With reference to Fig. 4, it is as follows that the present invention makes the transistorized step of disconnected type side grid Graphene:

Step 1: clean the 4H-SiC print, to remove surface contaminant, as Fig. 4 (a).

(1.1) the 4H-SiC substrate base is used NH ₄OH+H ₂O ₂Reagent soaked sample 10 minutes, took out post-drying, to remove the sample surfaces organic remains;

(1.2) the 4H-SiC print that will remove after surperficial organic remains re-uses HCl+H ₂O ₂Reagent soaked sample 10 minutes, took out post-drying, to remove ionic contamination.

Step 2: at 4H-SiC print surface deposition one deck SiO ₂, as Fig. 4 (b).

(2.1) the 4H-SiC print after cleaning is put into the PECVD system, and internal system pressure is adjusted to 3.0Pa, and radio-frequency power is adjusted to 100W, and temperature is adjusted to 150 ℃;

(2.2) pass into the SiH that flow velocity is respectively 30sccm, 60sccm and 200sccm in system ₄, N ₂O and N ₂, the duration is 100min, makes SiH ₄And N ₂The O reaction is at 4H-SiC print surface deposition one deck 1.0 thick SiO of μ m ₂Mask layer.

Step 3: at SiO ₂Carve graphical window on mask layer, as Fig. 4 (c).

(3.2) make reticle according to the figure of side gate transistor as shown in Figure 5, with electron beam, PMMA is exposed, electron accelerating voltage is 100kV, and dosage is 9000 μ C/cm ², figure on reticle is transferred to SiO ₂On mask layer;

(3.3) with buffered hydrofluoric acid to SiO ₂Mask layer corrodes, and exposes 4H-SiC, at the transistorized side grid of side grid Graphene, source, leakage and raceway groove position formation window.

(4.3) open the resistance furnace mains switch, quartz ampoule is heated to 1100 ℃.

Step 5: reaction generates carbon film, as Fig. 4 (d).

Pass into to quartz ampoule Ar gas and the Cl that flow velocity is respectively 95sccm and 5sccm ₂Gas, the time is 3 minutes, makes Cl ₂4H-SiC reaction with exposed generates carbon film.

Step 6: remove remaining SiO ₂

The carbon film print that generates is taken out and is placed in the buffered hydrofluoric acid solution of 1:10 from quartz ampoule, with the SiO outside the removal window ₂

Step 7: deposit Ni film on the carbon film print, as Fig. 4 (e).

The carbon film print is put on the slide of electron beam evaporation deposition machine, the adjustment slide is 50cm to the distance of target, and reative cell pressure is evacuated to 5 * 10 ^-4Pa, the adjusting line is 40mA, evaporation 20min, the thick Ni film of deposition one deck 500nm on the Si print.

Step 8: reconstitute Graphene.

The carbon film print that deposits the Ni film is placed in the Ar gas that flow velocity is 25sccm, be to anneal 10 minutes under 1200 ℃ in temperature, make carbon film reconstitute continuous side grid structure Graphene at the window's position, form the transistorized side grid of side grid Graphene, source electrode, drain electrode and conducting channel.

Step 9: the Graphene print is placed in HCl and CuSO ₄In mixed solution to remove the Ni film, as Fig. 4 (f).

Step 10: the depositing metal contact layer, as Fig. 4 (g).

(10.1) in the method for removing deposited by electron beam evaporation on the Graphene print of Ni film, deposition thickness is the Pd metal of 5nm;

(10.2) utilize the method for electron beam evaporation on the metal Pd layer, deposition thickness is the metal A u of 100nm.

Step 11: photoetching forms Metal Contact, as Fig. 4 (h).

(11.3) re-use oxygen metal contact layer is carried out reactive ion etching RIE, form the transistorized side grid of side grid Graphene, source, drain metal contact.

Embodiment 3

With reference to Fig. 4, the transistorized step of the disconnected type side of making of the present invention grid Graphene is as follows:

Steps A: the 6H-SiC substrate base is used NH ₄OH+H ₂O ₂Reagent soaked sample 10 minutes, took out post-drying, to remove the sample surfaces organic remains; 6H-SiC print after the surperficial organic remains of removal is re-used HCl+H ₂O ₂Reagent soaked sample 10 minutes, took out post-drying, to remove ionic contamination, as Fig. 4 (a).

Step B: the 6H-SiC print after cleaning is put into the PECVD system, and internal system pressure is adjusted to 3.0Pa, and radio-frequency power is adjusted to 100W, and temperature is adjusted to 150 ℃; Pass into the SiH that flow velocity is respectively 30sccm, 60sccm and 200sccm in system ₄, N ₂O and N ₂, the duration is 60min, makes SiH ₄And N ₂The O reaction is at 6H-SiC print surface deposition one deck 0.8 thick SiO of μ m ₂Mask layer is as Fig. 4 (b).

Step C: at SiO ₂Mask layer spin coating concentration is 3% PMMA solution, and puts into baking oven and toast 60s under 180 ℃; Make reticle according to the figure of side gate transistor as shown in Figure 5, with electron beam, PMMA is exposed, electron accelerating voltage is 100kV, and exposure intensity is 8500 μ C/cm ², figure on reticle is transferred on metal contact layer; With buffered hydrofluoric acid to SiO ₂Mask layer corrodes, and exposes 6H-SiC, at the transistorized side grid of side grid Graphene, source, leakage and raceway groove position formation window, as Fig. 4 (c).

Step D: the print that will make window by lithography is put into quartz ampoule 1, and quartz ampoule is placed in resistance furnace 2; Passing into flow velocity from air inlet 3 to quartz ampoule is the Ar gas of 80sccm, to quartz ampoule carry out 10 minutes emptying, air 4 is discharged from the gas outlet; Open the resistance furnace mains switch, quartz ampoule is heated to 1000 ℃.

Step e: pass into Ar gas and the Cl that flow velocity is respectively 96sccm and 4sccm to quartz ampoule ₂Gas, the time is 5 minutes, makes Cl ₂6H-SiC reaction with exposed generates carbon film, as Fig. 4 (d).

Step F: the carbon film print that generates is taken out and be placed in from quartz ampoule the buffered hydrofluoric acid solution that proportioning is 1:10, to remove the SiO outside window ₂

Step G: the carbon film print is put on the slide of electron beam evaporation deposition machine, the adjustment slide is 50cm to the distance of target, and reative cell pressure is evacuated to 5 * 10 ^-4Pa, the adjusting line is 40mA, evaporation 15min, the thick Ni film of deposition one deck 400nm on the Si print is as Fig. 4 (e).

Step H: the carbon film print that will deposit the Ni film is placed in the Ar gas that flow velocity is 60sccm, be to anneal 20 minutes under 1100 ℃ in temperature, make carbon film reconstitute continuous side grid structure Graphene at the window's position, form the transistorized side grid of side grid Graphene, source electrode, drain electrode and conducting channel.

Step I: the Graphene print is placed in HCl and CuSO ₄In mixed solution to remove the Ni film, as Fig. 4 (f).

Step J: the method deposition thickness of deposited by electron beam evaporation is the Pd metal of 5nm on the Graphene print that etches side gate transistor shape; The method deposition thickness of recycling electron beam evaporation is the metal A u of 100nm on the Pd metal level, as Fig. 4 (g).

Step K: spin coating concentration is 7% PMMA solution on metal level, and puts into baking oven, toasts 80s under 200 ℃; According to side grid, source, leakage metal electrode position making reticle, use electron beam that PMMA is exposed, the reticle figure is transferred on metal contact layer; Re-use oxygen metal contact layer is carried out reactive ion etching RIE, form the transistorized side grid of side grid Graphene, source, drain metal contact, as Fig. 4 (h).

Step L: the sample that the immersion of use acetone soln is made took out post-drying to remove residual PMMA in 10 minutes, obtained side grid Graphene transistor.

Claims

1. a Ni film annealing side gate graphene transistor preparation method based on SiC and chlorine reaction, comprises the following steps:

(1) Clean the SiC sample to remove surface pollutants;

(2) Deposit a layer of SiO ₂ with a thickness of 0.5-1.0 μm on the surface of the cleaned SiC sample using the plasma enhanced chemical vapor deposition PECVD method as a mask;

(3) Lithographic side gate pattern:

Make a photolithographic plate according to the position of the side gate G, source S, drain D, and conductive channel of the side gate graphene transistor;

Spin-coat an acrylic resin PMMA solution with a concentration of 3% on the surface of the mask, put it in an oven, and bake it at 180°C for 60 seconds to make it tightly bonded to the mask;

Then use an electron beam to expose PMMA, transfer the pattern on the photolithography plate to the SiO ₂ mask, and use buffered hydrofluoric acid to etch the SiO ₂ mask layer to expose SiC and form a window with the same shape as the side gate transistor;

(4) Place the sample with the window formed in a quartz tube and heat it to 700-1100°C;

(5) Introduce a mixed gas of Ar gas and Cl ₂ gas into the quartz tube to make Cl ₂ react with the exposed SiC for 3-8 minutes to form a carbon film;

(6) Place the generated carbon film sample in buffered hydrofluoric acid solution to remove SiO ₂ outside the window;

(7) Electron beam evaporation deposits a 300-500nm thick Ni film on the carbon film sample;

(8) Place the carbon film sample with the Ni film deposited in Ar gas, and anneal at a temperature of 1000-1200°C for 10-30 minutes, so that the carbon film can be restructured into graphene at the window position, and at the same time form side gate graphite side gate, source, drain and conduction channel of the ene transistor;

(9) Place the graphene sample in a mixed solution of HCl and CuSO ₄ to remove the Ni film;

(10) Deposit a metal Pd/Au contact layer on the graphene sample by electron beam evaporation;

(11) Photolithographic metal electrodes:

11a) Make a photolithography plate according to the positions of the side gate, source and drain metal electrodes;

11b) Spin-coat the PMMA solution with a concentration of 7% on the metal Pd/Au contact layer, then put it into an oven, and bake it at 200° C. for 80 seconds to make it closely contact with the metal layer;

11c) Expose the PMMA with an electron beam, transfer the pattern on the photolithography plate to the metal contact layer, and use oxygen to perform reactive ion etching RIE on the metal contact layer to form the side gate, source and drain metal contacts of the side gate transistor ;

(12) Soak the prepared sample in acetone solution for 10 minutes to remove residual PMMA, take it out and dry it to obtain a side-gate graphene transistor.

2. The method for preparing Ni film annealed side-gate graphene transistor based on the reaction of SiC and chlorine gas according to claim 1, characterized in that the step (1) to clean the SiC sample is first using NH ₄ OH+H ₂ Soak the SiC sample with O ₂ reagent for 10 minutes, take it out and dry it to remove the organic residue on the surface of the sample; then use HCl+H ₂ O ₂ reagent to soak the sample for 10 minutes, take it out and dry it to remove ionic pollutants.

3. The method for preparing Ni film annealed side-gate graphene transistor based on the reaction of SiC and chlorine gas according to claim 1, characterized in that in the step (2), SiO ₂ is deposited by PECVD, and the process conditions are:

SiH ₄ flow rate is 30 sccm, N ₂ O flow rate is 60 sccm, N ₂ flow rate is 200 sccm,

The pressure in the cavity is 3.0Pa,

RF power is 100W,

The deposition temperature is 150°C,

The deposition time is 30-100min.

4. the Ni film annealing side gate graphene transistor preparation method based on SiC and chlorine reaction according to claim 1 is characterized in that electron beam is exposed to PMMA in described step (3), and its processing condition is:

Electron acceleration voltage: 100kV,

Exposure intensity: 8000-9000μC/cm ² .

5. The Ni film annealing side-gate graphene transistor preparation method based on the reaction of SiC and chlorine gas according to claim 1, characterized in that the Ar gas and Cl _gas introduced in the step (5) have a flow rate of 95-98sccm and 5-2sccm.

6. the Ni film annealing side-gate graphene transistor preparation method based on SiC and chlorine reaction according to claim 1 is characterized in that electron beam deposition in the described step (7) is carried out according to the following process conditions:

The distance from substrate to target is 50cm,

The reaction chamber pressure is 5×10 ^-4 Pa,

The beam current is 40mA,

Evaporation time is 10-20min.

7. The method for preparing Ni film annealed side-gate graphene transistor based on the reaction of SiC and chlorine gas according to claim 1, characterized in that the flow rate of Ar gas during the annealing in the step (8) is 25-100 sccm.

8. The Ni film annealing side-gate graphene transistor preparation method based on the reaction of SiC and chlorine gas according to claim 1, characterized in that the step (10) deposits a metal Pd/Au layer by electron beam evaporation, and the Pd layer The thickness of the Au layer is 5 nm, and the thickness of the Au layer is 100 nm.

9. The method for preparing graphene transistors with side gate structures on SiC substrates based on Ni film annealing according to claim 1, characterized in that in step (11), RIE etches the metal contact layer, and the process conditions are:

The power is 100W,

Oxygen flow rate is 20sccm,

The etching time is 60s.

10. The Ni film annealing side-gate graphene transistor preparation method based on the reaction of SiC and chlorine gas according to claim 1, characterized in that the crystal form of the SiC sample adopts 4H-SiC or 6H-SiC.