[go: up one dir, main page]

CN103063942A - Cycle detection method of HB 6096 bus interface - Google Patents

Cycle detection method of HB 6096 bus interface Download PDF

Info

Publication number
CN103063942A
CN103063942A CN2012104584351A CN201210458435A CN103063942A CN 103063942 A CN103063942 A CN 103063942A CN 2012104584351 A CN2012104584351 A CN 2012104584351A CN 201210458435 A CN201210458435 A CN 201210458435A CN 103063942 A CN103063942 A CN 103063942A
Authority
CN
China
Prior art keywords
bus
bus transceiver
analog switch
transceiver
cpu
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN2012104584351A
Other languages
Chinese (zh)
Other versions
CN103063942B (en
Inventor
贾宏兵
李晓明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Aviation Electric Co Ltd
Original Assignee
Shanghai Aviation Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Aviation Electric Co Ltd filed Critical Shanghai Aviation Electric Co Ltd
Priority to CN201210458435.1A priority Critical patent/CN103063942B/en
Publication of CN103063942A publication Critical patent/CN103063942A/en
Application granted granted Critical
Publication of CN103063942B publication Critical patent/CN103063942B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Small-Scale Networks (AREA)
  • Debugging And Monitoring (AREA)

Abstract

本发明涉及HB6096总线接口的周期检测方法。本发明通过在外部交联设备与总线收发器之间设置模拟开关,从而控制总线收发器的总线接收端与外部断开,另一方面,将发送驱动模块输出的总线发送信号反馈至总线收发器的接收端,实现对发送驱动模块的检测。本发明的优点在于在设备上电阶段或周期检测阶段,断开与外部交联设备的连接,因而,提高了总线收发器检测数据的可靠性,同时本发明还增加了对发送驱动模块的检测。

Figure 201210458435

The invention relates to a cycle detection method of an HB6096 bus interface. The present invention sets an analog switch between the external cross-linking device and the bus transceiver, thereby controlling the bus receiving end of the bus transceiver to be disconnected from the outside, and on the other hand, feeding back the bus transmission signal output by the transmission drive module to the bus transceiver The receiving end realizes the detection of the sending drive module. The advantage of the present invention is that it disconnects the connection with the external cross-linking device during the power-on stage or period detection stage of the device, thus improving the reliability of the data detected by the bus transceiver. .

Figure 201210458435

Description

The cycle detection method of HB6096 bus interface
Technical field
The present invention relates to a kind of embedded type bus interface and detect control technology, be particularly related to a kind of HB6096 bus interface cycle detection method for Aircraft electric system comprehensive warning equipment, be widely used in each airborne equipment of Aircraft electric system, the equipment of non-avionics system, avionics system is crosslinked by the HB6096 bus on the machine, transmits all kinds of flight control informations, atmosphere data information, Electromechanical Control information, warning information, status information and maintenance information etc.
Background technology
Along with the aircraft airborne functions of the equipments are more and more, complexity is more and more higher, the exchanges data amount is increasing, the discrete signal that in the past used is crosslinked can not to satisfy request for utilization, the crosslinked interface of all kinds of buses begins playing the part of more and more important effect, as: 1553B bus, HB6096 bus, IEEE1394 bus, CAN bus etc.The HB6096 bus interface is used widely in airborne equipment, for the exchanges data that realizes all kinds of airborne equipments and crosslinked.Cycle detection for the HB6096 bus becomes more and more important.
The functional block diagram of HB6096 bus transceiver (DEI1016, DEI0429 protocol chip) is seen Fig. 1.Described bus transceiver comprises two received code modules that are connected with host interface, a transmission coding module and a control register.Based on this functional block diagram, its testing process is as follows: write self check survey control word by " host interface " in " control register ", bus transceiver can automatic data with " transmission coding module " rear end be passed to two " received code module " front ends, one of them " received code module " input end has carried out complement arithmetic to data, so two " received code module " received data complements." the transmitting-receiving control signal " of processor by " host interface " reaches and compares after " data bus " reads, thereby judges the state of transceiver.
There are following two shortcomings in this detection:
The first, the communication data between " HB6096 accepts 0 " and " HB6096 accepts 1 " and the outside cross-linking apparatus can affect the certainly detection data of two " received code " modules, thereby affects normal self-checking detection process;
The second, self-checking detection process can't detect " send and drive ".
Summary of the invention
The object of the invention is to propose a kind of cycle detection method of HB6096 bus interface, by writing to DEI1016 from detecting order, control DEI1016 is connected to respectively two with output channel and accepts passage, two data complements of accepting passage, thus judge whether the HB6096 bus interface exists fault.
To achieve these goals, technical scheme of the present invention is as follows: a kind of cycle detection method of HB6096 bus interface, described HB6096 bus interface is connected with outside cross-linking apparatus, described HB6096 bus interface comprises bus transceiver, the transmission driver module that is connected with bus transceiver, described bus transceiver is connected with CPU by interface device, be provided with level switch module between described bus transceiver and the interface device, it is characterized in that between described bus transceiver and outside cross-linking apparatus, analog switch being set, the control end of described analog switch is connected with CPU by control line, the output terminal of described transmission driver module is connected with the feedback receiving end of analog switch, this detection method may further comprise the steps: A, the disconnection of control simulation switch is connected with outside cross-linking apparatus, survey control word by in bus transceiver, writing self check, the data that bus transceiver will send the coding module rear end are passed to the port of accepting of receipt decoding module, after CPU reads received data, compare with predetermined value, thus the state of judgement bus transceiver; B, by the control simulation switch connection, the bus transmitted signal that sends the driver module output terminal feedback receiving end by analog switch is fed back to bus transceiver, compare with predetermined value after process CPU receives, thereby judge the duty that sends driver module; C, control simulation switch connection are connected with outside cross-linking apparatus, and equipment enters normal operating conditions.
According to a particular embodiment of the invention, described bus transceiver is DEI1016, and described transmission driver module is DEI0429.
The present invention is in device power stage or cycle detection stage, disconnection is connected with outside cross-linking apparatus, thereby, improve bus transceiver and detected the reliability of the data, stability, simultaneously, the present invention has increased sending the detection of driver module, has overcome the shortcoming that DEI1016 can not detect sending driver module, has realized detecting from the full isl cycle that is input to output.The invention has the advantages that and improved the reliability that detects, comprehensive.
Description of drawings
Fig. 1 is bus transceiver protocol chip functional block diagram.
Fig. 2 is HB6096 bus interface cycle detection know-why block diagram.
Embodiment
By shown in Figure 2, the present invention is by externally arranging analog switch 3 between cross-linking apparatus 1 and the bus transceiver 2, thereby the bus receiving end of control bus transceiver disconnects with outside, on the other hand, the bus transmitted signal that sends driver module output is fed back to the receiving end of bus transceiver, realize sending the detection of driver module.
Described HB6096 bus interface comprises bus transceiver 2, the transmission driver module 4 that is connected with bus transceiver 2, and described bus transceiver 2 is connected with CPU by interface device, is provided with level switch module between described bus transceiver 2 and the interface device.Bus transceiver adopts the DEI1016 device, sends driver module and adopts BD429; Level switch module is realized the level conversion between bus transceiver and the interface device; Interface device is realized the data transmit-receive between accessing time sequence, interrupt control logic, interrupt mask and the CPU of control DEI1016 chip etc. by internal logic.CPU realizes bus data is received and dispatched control.Above-mentioned modules is prior art, does not repeat them here.
The present invention arranges analog switch 3 between bus transceiver 2 and outside cross-linking apparatus 1, the control end of described analog switch 3 is connected with CPU by control line, realizes the switching that analog switch is switched on and off by CPU.The output terminal of described transmission driver module is connected with the feedback receiving end of analog switch, the airborne equipment bus data input end of analog switch is connected with outside cross-linking apparatus, is provided with the first bus between the output terminal of analog switch and the bus transceiver and receives line and the second bus reception line.
This detection method may further comprise the steps: A, the disconnection of control simulation switch are connected with outside cross-linking apparatus, CPU surveys control word by write self check in the control register of bus transceiver, the data that bus transceiver will send the coding rear end are delivered to the port of accepting of receipt decoding module front end, after CPU reads received data, compare with predetermined value, thus the state of judgement bus transceiver; B, by the control simulation switch connection, the bus transmitted signal that sends the driver module output terminal feedback receiving end by analog switch is fed back to bus transceiver, compare with predetermined value after process CPU receives, thereby judge the duty that sends driver module; If above-mentioned two steps of C all are judged as normally, then being connected of control simulation switch connection and outside cross-linking apparatus, equipment enters normal operating conditions.Steps A, B are whether normal processes of judgment device hardware, as judgment device output believable foundation whether.If normal, equipment enters normal operation, if undesired, general its result that just do not accept and believe.
Analog switch is to adopt " single-pole double-throw (SPDT) " switch, namely, one end of switch is connected with outside cross-linking apparatus, the other end of switch is connected with the output terminal that sends driver module, the stiff end of switch is connected with bus transceiver, by default, switch is to link to each other with the interface of outside cross-linking apparatus, in the steps A, the switch disconnection is connected with outside cross-linking apparatus, be that switch mediates, be not connected with both sides, among the step B, switch is thrown to another side, make its output signal that will send driver module feed back to receiving terminal, step C is after detection is finished, and equipment is returned to default conditions.
When device power, acquiescence " analog switch " is in the "off" state with outside cross-linking apparatus, after " CPU " finishes and power on, HB6096 is carried out from detecting.In normal operating conditions, every 1s equipment is carried out a cycle from detecting.When detecting beginning, the line traffic control analog switch disconnects with outside cross-linking apparatus, and then two steps when powering on are tested, and after test was finished, control " analog switch " connection was connected with outside cross-linking apparatus, enters normal operating conditions.

Claims (3)

1.一种HB6096总线接口的周期检测方法,所述HB6096总线接口与外部交联设备连接,所述HB6096总线接口包括总线收发器,与总线收发器连接的发送驱动模块,所述总线收发器通过接口器件与CPU连接,其特征在于在所述总线收发器和外部交联设备之间设置模拟开关,所述模拟开关的控制端通过控制线与CPU连接,所述发送驱动模块的输出端与模拟开关的反馈接收端连接,该检测方法包括以下步骤:A、控制模拟开关断开与外部交联设备的连接,通过向总线收发器中写入自检测控制字,总线收发器将发送编码模块后端的数据传递至接收解码模块的接受端口,CPU读取所接收到的数据后,与预定值进行比较,从而判断总线收发器的状态;B、通过控制模拟开关接通,将发送驱动模块输出端的总线发送信号通过模拟开关的反馈接收端反馈至总线收发器,经过CPU接收后与预定值进行比较,从而判断发送驱动模块的工作状态;C、控制模拟开关接通与外部交联设备的连接,设备进入正常工作状态。 1. a kind of period detection method of HB6096 bus interface, described HB6096 bus interface is connected with external cross-linking equipment, described HB6096 bus interface comprises bus transceiver, sends the driving module connected with bus transceiver, and described bus transceiver passes The interface device is connected to the CPU, and it is characterized in that an analog switch is set between the bus transceiver and the external cross-linking device, the control end of the analog switch is connected to the CPU through a control line, and the output end of the sending drive module is connected to the analog The feedback receiving end of the switch is connected, and the detection method includes the following steps: A. Control the analog switch to disconnect the connection with the external cross-linking device, and write the self-detection control word to the bus transceiver, and the bus transceiver will send the coding module. The data at the terminal is transmitted to the receiving port of the receiving decoding module. After the CPU reads the received data, it compares it with the predetermined value to judge the state of the bus transceiver; The bus sending signal is fed back to the bus transceiver through the feedback receiving end of the analog switch, and compared with the predetermined value after being received by the CPU, so as to judge the working status of the sending drive module; C. Control the analog switch to connect to the external cross-linking device, The device enters the normal working state. 2.如权利要求1所述的检测方法,其特征在于所述总线收发器为DEI1016,所述发送驱动模块为DEI0429。 2. The detection method according to claim 1, characterized in that the bus transceiver is DEI1016, and the sending driver module is DEI0429. 3.如权利要求1所述的检测方法,其特征在于在设备上电时,默认模拟开关与外部交联设备处于断开状态, CPU完成上电后,对HB6096总线接口进行检测,在正常工作状态,每隔1s对HB6096总线接口进行一次周期检测。 3. The detection method according to claim 1, wherein when the device is powered on, the default analog switch is disconnected from the external cross-linking device, and after the CPU completes the power-on, the HB6096 bus interface is detected. state, and perform a periodic detection on the HB6096 bus interface every 1s.
CN201210458435.1A 2012-11-15 2012-11-15 The periodicity detection methods of HB6096 EBIs Expired - Fee Related CN103063942B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201210458435.1A CN103063942B (en) 2012-11-15 2012-11-15 The periodicity detection methods of HB6096 EBIs

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201210458435.1A CN103063942B (en) 2012-11-15 2012-11-15 The periodicity detection methods of HB6096 EBIs

Publications (2)

Publication Number Publication Date
CN103063942A true CN103063942A (en) 2013-04-24
CN103063942B CN103063942B (en) 2017-08-22

Family

ID=48106648

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201210458435.1A Expired - Fee Related CN103063942B (en) 2012-11-15 2012-11-15 The periodicity detection methods of HB6096 EBIs

Country Status (1)

Country Link
CN (1) CN103063942B (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104407279A (en) * 2014-10-28 2015-03-11 深圳市芯海科技有限公司 Code type data, apparatus and test method for automatically testing chip MDIO bus protocol
CN109031091A (en) * 2018-07-16 2018-12-18 深圳市广和通无线股份有限公司 Interface test method, test macro and test fixture
CN110806549A (en) * 2018-08-03 2020-02-18 中车大连电力牵引研发中心有限公司 Cable detection system and method

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050277386A1 (en) * 2004-06-15 2005-12-15 Sharp Kabushiki Kaisha PLL circuit and high-frequency receiving device
CN101937031A (en) * 2010-07-01 2011-01-05 哈尔滨工业大学 An electrical simulator of a star sensor
CN201886122U (en) * 2010-11-19 2011-06-29 中国电子科技集团公司第十四研究所 PXI (PCI extension for instrumentation) bus-based digital testing module
CN201897522U (en) * 2010-11-04 2011-07-13 北京卫星制造厂 Low-frequency square-wave cycle detecting system
CN202383251U (en) * 2011-12-29 2012-08-15 中国航空工业集团公司第六三一研究所 Automatic testing circuit of 1553B bus interface module
CN202486237U (en) * 2012-03-02 2012-10-10 昌河飞机工业(集团)有限责任公司 Testing system based on PXI (PCI eXtensions for Instrumentation) platform

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050277386A1 (en) * 2004-06-15 2005-12-15 Sharp Kabushiki Kaisha PLL circuit and high-frequency receiving device
CN101937031A (en) * 2010-07-01 2011-01-05 哈尔滨工业大学 An electrical simulator of a star sensor
CN201897522U (en) * 2010-11-04 2011-07-13 北京卫星制造厂 Low-frequency square-wave cycle detecting system
CN201886122U (en) * 2010-11-19 2011-06-29 中国电子科技集团公司第十四研究所 PXI (PCI extension for instrumentation) bus-based digital testing module
CN202383251U (en) * 2011-12-29 2012-08-15 中国航空工业集团公司第六三一研究所 Automatic testing circuit of 1553B bus interface module
CN202486237U (en) * 2012-03-02 2012-10-10 昌河飞机工业(集团)有限责任公司 Testing system based on PXI (PCI eXtensions for Instrumentation) platform

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104407279A (en) * 2014-10-28 2015-03-11 深圳市芯海科技有限公司 Code type data, apparatus and test method for automatically testing chip MDIO bus protocol
CN109031091A (en) * 2018-07-16 2018-12-18 深圳市广和通无线股份有限公司 Interface test method, test macro and test fixture
CN109031091B (en) * 2018-07-16 2021-08-17 深圳市广和通无线股份有限公司 Interface test method, test system and test fixture
CN110806549A (en) * 2018-08-03 2020-02-18 中车大连电力牵引研发中心有限公司 Cable detection system and method

Also Published As

Publication number Publication date
CN103063942B (en) 2017-08-22

Similar Documents

Publication Publication Date Title
CN102130669B (en) Method, system, device and network equipment for detecting state of hot-plug module
US8355837B2 (en) System and method for testing the integrity of a vehicle testing/diagnostic system
CN102984059B (en) Gigabit Ethernet redundancy network interface card and link switching condition criterion output control method thereof
CN102566564B (en) Vehicle-mounted controller testing system
WO2015000278A1 (en) Method and server for diagnosing vehicle
CN204536901U (en) The device of automatic test engine of heavy-duty car ECU software version
CN104050061A (en) Multi-main-control-panel redundant backup system based on PCIe bus
CN110032533B (en) C-type universal serial bus interface circuit and pin bypass method thereof
CN106100939A (en) The network equipment starts time test method and test console
CN103186440B (en) Detect subcard method, apparatus and system in place
CN103063942A (en) Cycle detection method of HB 6096 bus interface
CN102394734B (en) RS 485 communication system with nonpolarized connection and control method thereof
US8786424B2 (en) Error signal handling unit, device and method for outputting an error condition signal
CN102609339A (en) Embedded main board testing device
CN106610885A (en) Server failure detection system and method
US20240248865A1 (en) Bus-based communication system, system-on-chip and method therefor
CN101894056A (en) Bus and working node isolation device and fault recovery system and method thereof
CN203535935U (en) Control circuit and control system of liquid crystal display module
CN203012038U (en) Circuit for periodic detection of HB6096 bus interface
CN101582548B (en) Back plate and a method for preventing virtual insertion of single plate
CN101397020A (en) Intelligent acquisition driving device
CN111142504A (en) Bus detection device and method
CN111625491A (en) Multi-machine serial communication device and method
CN105573869A (en) I2C bus based fault tolerant control method for system controller
CN103914362A (en) Serial port self-detection method, circuit and device

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20170822

CF01 Termination of patent right due to non-payment of annual fee