CN103001503B - The circuit used to discharge the X capacitor - Google Patents

Abstract

The invention discloses a circuit for discharging an X capacitor. The circuit comprises an alternating current level detection unit, a reset unit, a counter and a discharge unit. The AC level detecting unit is coupled to two ends of the X capacitor through a pin. The AC level detection unit is provided with a plurality of reference levels and is used for detecting the level of the DC voltage according to the reference levels and outputting a detection signal; the reset unit is coupled with the AC level detection unit and used for generating a reset signal according to the detection signal; the counter is coupled to the reset unit and is used for resetting according to the reset signal. When the counter does not receive the reset signal within a first preset time, the counter generates an opening signal; the discharge unit is coupled to the counter and used for discharging the X capacitor according to the starting signal. Therefore, the invention can improve the condition that the AC level detection unit misjudges the AC power supply to be closed.

Description

The circuit used to discharge the X capacitor

technical field

The invention relates to a circuit for discharging an X capacitor, in particular to a circuit for discharging the X capacitor by judging whether the AC power is off according to a plurality of reference levels.

Background technique

In order to prevent the user from accidentally touching the electronic device and suffering an electric shock, the safety specification of the circuit stipulates that the X-cap must be connected in parallel with a discharge resistor (discharge resistor), so that the voltage on the X-cap can be discharged within 1 second when the electronic device is turned off. Put it under a safe voltage. However, in normal operation of the electronic device, the bleeder resistor still forms a fixed loss. Taking the X capacitor 0.47μF and the bleed resistor 2MΩ as an example, when the AC input voltage is 264V, the loss of the bleed resistor is 35mW. Therefore, when the electronic device is in standby mode for a long time (such as an inverter for a mobile phone or an adapter for a notebook), the loss of the bleeder resistor is wasted.

In the prior art, the detection circuit for discharging the X capacitor uses the voltage level to detect the DC voltage to determine whether the AC power is off. However, when the detection terminal of the detection circuit has a DC component, the detection circuit may misjudge that the AC power is off. Therefore, in the prior art, the detection circuit cannot be used in the full-wave rectification circuit.

Contents of the invention

An embodiment of the invention provides a circuit for discharging an X capacitor. The circuit includes an AC level detection unit, a reset unit, a counter and a discharge unit. The AC level detection unit is used to couple to the two ends of the X capacitor through pins, wherein the AC level detection unit has a plurality of reference levels, and is used to detect The level of the DC voltage, and output a detection signal; the reset unit is coupled to the AC level detection unit for generating a reset signal according to the detection signal; the counter is coupled to the reset The unit is used to reset according to the reset signal, wherein when the counter does not receive the reset signal within the first predetermined time, the counter generates a start signal; the discharge unit is coupled to the counter, used for according to The turn-on signal discharges the X capacitor.

Yet another embodiment of the present invention provides a circuit for discharging an X capacitor. The circuit includes an AC level detection unit, a counter and a discharge unit. The AC level detection unit is used to couple to the two ends of the X capacitor through pins, wherein the AC level detection unit has a plurality of reference levels, and is used to detect level of the DC voltage, and output a detection signal; the counter is coupled to the AC level detection unit for resetting according to the detection signal, wherein when the counter does not receive the level within the first predetermined time When the signal is detected, the counter generates a start signal; the discharge unit is coupled to the counter, and is used for discharging the X capacitor according to the start signal.

The invention provides a circuit for discharging an X capacitor. The circuit uses an AC level detection unit to detect the level of the DC voltage at one end of the X capacitor according to multiple reference levels to generate a detection signal. Then, the counter can be reset according to the detection signal or a reset signal generated by the reset unit according to the detection signal. When the counter does not receive the reset signal or the detection signal within the first predetermined time, the counter generates a start signal to the discharge unit. Therefore, the discharge unit can discharge the X capacitor to a predetermined voltage within a second predetermined time according to the turn-on signal. Compared with the prior art, because the AC level detection unit detects the level of the DC voltage at one end of the X capacitor according to the multiple reference levels, the present invention can improve the error of the AC level detection unit. Judgment of the AC power off situation.

Description of drawings

FIG. 1 is a schematic diagram illustrating a circuit for discharging an X capacitor according to an embodiment of the present invention. FIG. 2 is a schematic diagram illustrating the timing of voltage division, detection signal and activation signal.

FIG. 3 is a schematic diagram illustrating a circuit for discharging an X capacitor according to yet another embodiment of the present invention.

FIG. 4 is a schematic diagram illustrating the timing sequence of voltage division, detection signal, signal, reset signal and open signal.

Wherein, the reference signs are explained as follows:

100, 300 circuits

102 AC level detection unit

104 counters

106 discharge unit

108X capacitance

110 full wave rectifier

112 voltage divider circuit

114 Other circuits

316 reset unit

1062 current source

1064 first transistor

1066 reverse circuit

1068 second transistor

3162 delay unit

3164 pulse generation unit

AC power supply

DS detection signal

GND ground terminal

HV, VCC pin

OS shutdown signal

RL1-RL4 reference level

RS reset signal

S signal

TS open signal

VAC AC voltage

V1 DC voltage

V2 divider

detailed description

Please refer to FIG. 1 . FIG. 1 is a schematic diagram illustrating a circuit 100 for discharging an X capacitor according to an embodiment of the present invention. The circuit 100 includes an AC level detection unit 102 , a counter 104 and a discharge unit 106 . The AC level detection unit 102 is used to couple to the two ends of the X capacitor 108 through the pin HV, wherein the AC level detection unit 102 has 4 reference levels RF1-RF4, which are used to RF1-RF4 detect the level of the DC voltage V1 at one end of the X capacitor 108 through the voltage divider circuit 112, and output the detection signal DS, wherein the voltage divider circuit 112 is coupled between the pin HV and the ground terminal GND, The divided voltage V2 for providing the DC voltage V1 to the AC level detection unit 102 . In addition, in yet another embodiment of the present invention, the circuit 100 further includes a voltage dividing circuit 112 . As shown in FIG. 1 , the AC voltage VAC provided by the AC power source AC is rectified by a full-wave rectifier 110 to generate a DC voltage V1. However, the present invention is not limited to four reference levels RF1-RF4, as long as the AC level detection unit 102 has multiple reference levels, it falls within the scope of the present invention. The counter 104 is coupled to the AC level detection unit 102 for resetting according to the detection signal DS, wherein when the counter 104 does not receive the detection signal DS within the first predetermined time T1 (for example, 40 ms), the counter 104 A turn-on signal TS is generated. The discharge unit 106 is coupled to the counter 104, and the discharge unit 106 includes a current source 1062 and a first transistor 1064 (such as a metal oxide semiconductor transistor). The first transistor 1064 is used to turn on according to the turn-on signal TS, wherein when the first transistor 1064 is turned on, the current source 1062 and the first transistor 1064 form a discharge path to the ground terminal GND to discharge the X capacitor 108 . Therefore, the discharge unit 106 can discharge the voltage on the X capacitor 108 to a predetermined voltage within a second predetermined time (1 second) according to the turn-on signal TS. In addition, the discharge unit 106 further includes an inverting circuit 1066 and a second transistor 1068 (such as a metal oxide semiconductor transistor). The reverse circuit 1066 is used to invert the turn-on signal TS to generate the turn-off signal OS; the second transistor 1068 is turned off according to the turn-off signal OS, wherein the first transistor 1064 and the second transistor 1068 are not turned on and off at the same time. Therefore, when the first transistor 1064 is turned off and the second transistor 1068 is turned on, the current provided by the current source 1062 flows through the second transistor 1068 and the pin VCC to other circuits 114 .

Please refer to FIG. 2 . FIG. 2 is a schematic diagram illustrating the timing of the divided voltage V2 , the detection signal DS and the turn-on signal TS . As shown in FIG. 2 , when the AC power supply AC normally supplies the AC voltage VAC, the divided voltage V2 has a rising slope and a falling slope between each period of the divided voltage V2. In addition, because the AC level detection unit 102 has 4 reference levels RF1-RF4, when the AC power source AC shifts, causing the voltage divider V2 to also shift, the AC level detection unit 102 can still be based on the 4 reference levels. At least one reference level among the levels RF1-RF4 generates and outputs a detection signal DS. For example, at the dotted line in FIG. 2 , the divided voltage V2 has an offset, but the AC level detection unit 102 can still generate and output the detection signal DS according to the reference level RF4 . Therefore, when the AC power supply AC normally supplies the AC voltage VAC, since the counter 104 will continue to be reset according to the detection signal DS, the counter 104 will not generate the start signal TS. In addition, when the AC power source AC is turned off at the peak of the AC voltage VAC or the valley of the AC voltage VAC, the divided voltage V2 no longer has a rising slope or a falling slope. Therefore, if the counter 104 does not receive the detection signal DS within the first predetermined time T1 , the counter 104 generates a turn-on signal TS to the discharge unit 106 . Then, the discharge unit 106 can discharge the voltage on the X capacitor 108 to a predetermined voltage within a second predetermined time according to the turn-on signal TS.

Please refer to FIG. 3 . FIG. 3 is a schematic diagram illustrating a circuit 300 for discharging the X capacitor according to another embodiment of the present invention. The difference between the circuit 300 and the circuit 100 is that the circuit 300 further includes a reset unit 316 . The reset unit 316 is coupled between the AC level detection unit 102 and the counter 104 . The reset unit 316 includes a delay unit 3162 and a pulse generation unit 3164 . The delay unit 3162 is used to generate the signal S according to the detection signal DS, wherein the delay unit 3162 has a delay time (for example, 160 μs) to prevent the delay unit 3162 from generating the signal S according to noise; the pulse generation unit 3164 is used to generate the signal S according to the signal S, generating a reset signal RS. The counter 104 is coupled to the reset unit 316 for resetting according to the reset signal RS, wherein when the counter 104 does not receive the reset signal RS within the first predetermined time T1, the counter 104 generates a start signal TS to the discharge unit 106. In addition, the rest of the operating principles of the circuit 300 are the same as those of the circuit 100 , and will not be repeated here.

Please refer to FIG. 4 . FIG. 4 is a schematic diagram illustrating the timing of the divided voltage V2 , the detection signal DS , the signal S , the reset signal RS and the turn-on signal TS . As shown in FIG. 4 , when the AC power source AC normally supplies the AC voltage VAC, the divided voltage V2 has a rising slope and a falling slope between each period of the divided voltage V2. When the AC power supply AC normally supplies the AC voltage VAC, since the counter 104 is continuously reset according to the reset signal RS, the counter 104 does not generate the start signal TS. In addition, when the AC power source AC is turned off, the divided voltage V2 no longer has a rising slope and a falling slope. If the counter 104 does not receive the reset signal RS within the first predetermined time T1 , the counter 104 generates the start signal TS to the discharge unit 106 . Then, the discharge unit 106 can discharge the voltage on the X capacitor 108 to a predetermined voltage within a second predetermined time according to the turn-on signal TS.

In summary, the circuit for discharging the X capacitor provided by the present invention uses the AC level detection unit to detect the level of the DC voltage at one end of the X capacitor according to a plurality of reference levels to generate a detection signal . Then, the counter can be reset according to the detection signal or a reset signal generated by the reset unit according to the detection signal. When the counter does not receive a reset signal or a detection signal within the first predetermined time, the counter generates a start signal to the discharge unit. Therefore, the discharge unit can discharge the X capacitor to a predetermined voltage within the second predetermined time according to the turn-on signal. Compared with the prior art, because the AC level detection unit detects the level of the DC voltage at one end of the X capacitor based on multiple reference levels, the present invention can improve the misjudgment that the AC power is off by the AC level detection unit Case.

The above descriptions are only preferred embodiments of the present invention, and all equivalent changes and modifications made according to the claims of the present invention shall fall within the scope of the present invention.

Claims (7)

1. A circuit for discharging the X capacitor, the circuit is characterized in that it comprises: The AC level detection unit is used to couple to the two ends of the X capacitor through pins, wherein the AC level detection unit has a plurality of reference levels, and is used to detect DC according to the plurality of reference levels Voltage level, and output detection signal; a reset unit, coupled to the AC level detection unit, for generating a reset signal according to the detection signal; a counter, coupled to the reset unit, for resetting according to the reset signal, wherein when the counter does not receive the reset signal within a first predetermined time, the counter generates a start signal; and a discharge unit, coupled to the counter, for discharging the X capacitor according to the start signal, Wherein the discharge unit includes: current source; and The first transistor is used to turn on according to the turn-on signal, wherein when the first transistor is turned on, the current source and the first transistor form a discharge path to the ground terminal to discharge the X capacitor, wherein the discharge path and the AC standard The bit detection unit is irrelevant. 2. A circuit for discharging the X capacitor, the circuit is characterized in that it comprises: The AC level detection unit is used to couple to the two ends of the X capacitor through pins, wherein the AC level detection unit has a plurality of reference levels, and is used to detect DC according to the plurality of reference levels Voltage level, and output detection signal; a counter, coupled to the AC level detection unit, for resetting according to the detection signal, wherein when the counter does not receive the detection signal within a first predetermined time, the counter generates a start signal; and a discharge unit, coupled to the counter, for discharging the X capacitor according to the start signal, Wherein the discharge unit includes: current source; and The first transistor is used to turn on according to the turn-on signal, wherein when the first transistor is turned on, the current source and the first transistor form a discharge path to the ground terminal to discharge the X capacitor, wherein the discharge path and the AC standard The bit detection unit is irrelevant. 3. The circuit according to claim 1 or 2, wherein the discharge unit further comprises: an inverting circuit for inverting the opening signal to generate a closing signal; and The second transistor is used to turn off according to the off signal, wherein the first transistor and the second transistor will not be turned on and off at the same time. 4. The circuit according to claim 1 or 2, further comprising: The voltage divider circuit is coupled between the pin and the ground terminal, and is used for providing the divided voltage of the DC voltage to the AC level detection unit. 5. The circuit according to claim 1 or 2, wherein the discharge unit discharges the voltage on the X capacitor to a predetermined voltage within a second predetermined time according to the turn-on signal. 6. The circuit as claimed in claim 5, wherein the second predetermined time is one second. 7. The circuit according to claim 1, wherein the reset unit comprises: A delay unit is used to generate a signal according to the detection signal, wherein the delay unit has a delay time, so that the delay unit does not generate the signal within the delay time to avoid noise interference; and The pulse generating unit is used for generating the reset signal according to the signal.