CN102982841A - Programming system and method of phase change memory - Google Patents
Programming system and method of phase change memory Download PDFInfo
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- CN102982841A CN102982841A CN2012105495459A CN201210549545A CN102982841A CN 102982841 A CN102982841 A CN 102982841A CN 2012105495459 A CN2012105495459 A CN 2012105495459A CN 201210549545 A CN201210549545 A CN 201210549545A CN 102982841 A CN102982841 A CN 102982841A
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- 230000008859 change Effects 0.000 title claims abstract description 19
- 230000007704 transition Effects 0.000 description 56
- 238000010586 diagram Methods 0.000 description 6
- 239000012782 phase change material Substances 0.000 description 6
- 238000006243 chemical reaction Methods 0.000 description 5
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- 238000005516 engineering process Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 230000006870 function Effects 0.000 description 2
- 239000000155 melt Substances 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- -1 chalcogenide compound Chemical class 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000004927 fusion Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
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Abstract
本发明提供一种相变存储器的编程系统及方法，该编程系统至少包括：擦操作控制模块，用于产生擦操作驱动通道的控制信号；擦操作使能模块，与所述擦操作控制模块相连接，用于产生擦操作的使能信号；擦操作驱动模块，与所述擦操作使能模块相连接，用于产生擦操作脉冲，所述擦操作驱动模块在所述对应的擦操作控制模块产生的控制信号的控制下，根据擦操作使能信号是否有效依次产生擦操作脉冲。本发明提供的相变存储器的编程方法，将相变存储器的驱动通道分为若干组，在相变存储器进行编程操作时，相变存储器需要进行擦操作的位按照分组依次进行，这样可以在不降低写操作性能的基础上降低相变存储器芯片的擦操作瞬时峰值功耗。
The present invention provides a programming system and method for a phase change memory, the programming system at least includes: an erasing operation control module, used to generate a control signal for the erasing operation drive channel; an erasing operation enabling module, corresponding to the erasing operation control module connected to generate an enabling signal for the wiping operation; the wiping operation driving module is connected to the wiping operation enabling module for generating a wiping operation pulse, and the wiping operation driving module is connected to the corresponding wiping operation control module Under the control of the generated control signal, erase operation pulses are sequentially generated according to whether the erase operation enable signal is valid or not. The programming method of the phase-change memory provided by the present invention divides the driving channel of the phase-change memory into several groups, and when the phase-change memory is programmed, the bits that need to be erased in the phase-change memory are performed in sequence according to the groups, so that the The instantaneous peak power consumption of the erasing operation of the phase change memory chip is reduced on the basis of reducing the performance of the writing operation.
Description
Technical field
The invention belongs to technical field of semiconductor memory, relate to a kind of programing system and method for phase transition storage.
Background technology
Phase transition storage (PCRAM) is based on the conception that phase-change thin film that Ovshinsky proposes at beginning of the seventies late 1960s can be applied to the phase change memory medium and sets up a kind of novel resistive formula nonvolatile semiconductor memory, it is compared with present existing multiple semiconductor memory technologies, has low-power consumption, non-volatile, high density, anti-irradiation, non-volatile, read at a high speed, have extended cycle life, device size contractibility (nanoscale), high-low temperature resistant (55 ℃ to 125 ℃), anti-vibration, the advantages such as anti-electronic interferences and manufacturing process simple (energy and existing integrated circuit technology are complementary), be at present by the extensive the strongest rival in the good storer of future generation of industry member, have wide market outlook.
Phase transition storage is take the chalcogenide compound material as storage medium, its ultimate principle is to utilize electric impulse signal to act on the device cell, make phase-change storage material between amorphous state (material is high-impedance state) and crystalline state (material is low resistive state), reversible transition occur and realize writing and wiping of data, data read then when differentiating amorphous state and the resistance states during the polycrystalline attitude is realized.
The reading and writing of phase transition storage, wiping operation are exactly voltage or the current pulse signal that applies different in width and height at device cell: wipe and operate (RESET), after phase-change material temperature in adding a weak point and strong pulse enable signal device cell is elevated to more than the melt temperature, thereby realize that through quick cooling phase-change material is from the polycrystalline attitude to amorphous conversion again; It is the conversion that one state arrives " 0 " attitude; Write operation (SET), a pulse enable signal phase-change material temperature long and medium tenacity is raised under the temperature of fusion when applying, on the Tc after, and keep a period of time to impel nucleus growth, thus realize amorphous state to the conversion of polycrystalline attitude, namely " 0 " attitude is to the conversion of one state; Read operation (READ) after applying a very weak pulse signal that can not exert an influence to the state of phase-change material, is read its state by the resistance value of measuring element unit.
Because the conversion of the state of storage unit is that thermal effect by electric pulse realizes that when particularly carrying out the RESET operation, phase-change material need to be melted, therefore, the write operation of phase transition storage need to consume a large amount of energy in the phase transition storage.When especially all carrying out the RESET operation for each of the phase transition storage with multidigit bandwidth, the power consumption of memory chip will reach maximal value.Be illustrated in figure 1 as the programming synoptic diagram of traditional phase transition storage.In this system, it is 4 that RESET drives passage, is respectively passage 0, passage 1, passage 2 and passage 3, and it is 4 that RESET enables, and is respectively En0, En1, En2 and En3 among Fig. 1, and the RESET control module is 1.
When storer carries out write operation, if four passages of storer all need to carry out the RESET operation, described 4 RESET enable all to export the RESET useful signal, being 4 of storer drives passages and all will produce simultaneously 4 RESET operating impulses respectively 4 storage unit of destination address are carried out the RESET operation under the control of RESET control module, if the peak power during each passage RESET is P, the instantaneous peak value power consumption that then storer needs in programing system shown in Figure 1 is 4P, storer will consume maximum power consumption this moment, so large moment power consumption peaks may cause the unstable of supply voltage, and then may cause the unstable of whole system, therefore, be necessary the programming process of storer is optimized, to reduce above-mentioned impact.Simultaneously, since SET cycle of phase transition storage greater than the RESET cycle, so the instantaneous peak value power consumption in the time of can being distributed to by the instantaneous peak value power consumption that RESET is needed whole write cycle time and reducing the RESET operation.
Summary of the invention
The shortcoming of prior art in view of the above the object of the present invention is to provide a kind of programing system and method for phase transition storage, to reduce the peak power of phase transition storage.
Reach for achieving the above object other relevant purposes, the invention provides a kind of programmed method of phase transition storage, described programmed method may further comprise the steps at least:
1) arranging n of phase transition storage, to wipe the sub-enable module of operation effective, wipes corresponding n of the sub-enable module of operation with described n and wipe operation driving passage and be divided into m and organize;
2) first group of wiping operation drives passage and produce simultaneously at least one wiping operating impulse under the control of the sub-control module of first wiping operation, and this operating impulse is wiped operation to the first object address of phase transition storage respectively;
3) second group of wiping operation drives passage and produce simultaneously at least one wiping operating impulse under the control of second sub-control module of wiping operation, and this operating impulse is wiped operation to the second destination address of phase transition storage respectively;
4) the like, under the control of m the sub-control module of wiping operation, producing simultaneously at least one wiping operating impulse until finish m group wiping operation driving passage, this operating impulse is wiped operation to the m destination address of phase transition storage respectively.
Preferably, the span of described m is 1＜m≤T
SET/ T
RESET, wherein, T
SETBe write cycles, T
RESETFor wiping the operating cycle.
The present invention also provides a kind of programing system of phase transition storage, and described programing system comprises at least:
Wipe the operation control module, for generation of the control signal of wiping the operation driving;
Wipe the operation enable module, be connected with described wiping operation control module, for generation of the enable signal of wiping operation;
Wipe the operation driver module, be connected with described wiping operation enable module, for generation of wiping operating impulse, whether described wiping operation driver module produces effectively successively and wipes operating impulse according to wiping the operation enable signal under the control of the control signal that the wiping operation control module of described correspondence produces.
Preferably, described wiping operation driver module has n wiping operation driving passage.
Preferably, described n wiping operation driving passage is divided into m group, 1＜m≤T
SET/ T
RESET, wherein, T
SETBe write cycles, T
RESETFor wiping the operating cycle.
Preferably, described wiping operation control module comprises that m is wiped the sub-control module of operation, and described each group wiping operation drives passage and wipes the sub-control module of operation corresponding to one.
Preferably, described each wipe the sub-control module of operation and be a group of self correspondence and wipe operation and drive passage and produce one and wipe operating control signal.
Preferably, described m group is wiped operation and is driven passage by the control of a wiping operation control module, and described wiping operation control module comprises logical circuit.
Preferably, described wiping operating impulse comprises current impulse or potential pulse.
As mentioned above, the programing system of phase transition storage of the present invention and method, have following beneficial effect: this invention by in the phase transition storage that will have the multidigit bandwidth not the wiping of coordination operation be distributed in the write cycle time, thereby reach the purpose that under the prerequisite that does not reduce phase transition storage write operation performance, reduces the instantaneous peak value power consumption of phase transition storage.
Description of drawings
Fig. 1 is the programming synoptic diagram of traditional phase transition storage.
Fig. 2 is the programming synoptic diagram of phase transition storage of the present invention.
Fig. 3 is the instantaneous peak value power consumption contrast synoptic diagram of traditional phase transition storage and phase transition storage of the present invention.
The element numbers explanation
Embodiment
Below by specific instantiation explanation embodiments of the present invention, those skilled in the art can understand other advantages of the present invention and effect easily by the disclosed content of this instructions.The present invention can also be implemented or be used by other different embodiment, and the every details in this instructions also can be based on different viewpoints and application, carries out various modifications or change under the spirit of the present invention not deviating from.
See also accompanying drawing 2 to Fig. 3.Need to prove, the diagram that provides in the present embodiment only illustrates basic conception of the present invention in a schematic way, satisfy only show in graphic with the present invention in relevant assembly but not component count, shape and size drafting when implementing according to reality, kenel, quantity and the ratio of each assembly can be a kind of random change during its actual enforcement, and its assembly layout kenel also may be more complicated.
The invention provides a kind of programmed method of phase transition storage, this programmed method comprises the steps: at least
(1) arranging n of phase transition storage, to wipe operation (RESET) sub-enable module effective, corresponding n RESET driving of the sub-enable module of described n RESET passage is divided into m organizes.
For having the wide phase-changing memory unit of n bit strip, the RESET driver module for generation of the RESET pulse in the phase transition storage also has n RESET driving passage.In the present embodiment, the n value is 4, and namely described RESET driver module has 4 RESET driving passages, is respectively passage 0, passage 1, passage 2 and passage 3, as shown in Figure 2.Corresponding with n RESET driving passage, the enable module of phase transition storage has n sub-enable module, is respectively En0, En1, En2 and En3.The position that the sub-enable module of described RESET operates as required can produce 4 corresponding enable signals, and phase transition storage could be according to program work when effective when 4 sub-enable module are set, otherwise phase transition storage can not be unlocked.
4 RESET in the RESET driver module drive passages and are divided into the m group, and the value of m is based on that the instantaneous peak value power consumption of phase transition storage requires to select, 1＜m≤T
SET/ T
RESET, wherein, T
SETBe write cycles, T
RESETFor wiping the operating cycle.For example, if T
SETBe 4, T
RESETBe 1, but m value 2,3 or 4 then.M can not get 1, is traditional phase transition storage programmed method if get 1.In the present embodiment, the m value is 2, and as shown in Figure 2, namely corresponding 4 the RESET passages of described 4 sub-enable module of RESET are divided into 2 groups, and each group has 2 RESET passages, and wherein, passage 0 and passage 1 are one group, and passage 2 and passage 3 are another group.
As a kind of preferred mode, the RESET of described grouping operation all is positioned at the SET cycle.
Wipe operation (RESET) driving passage for (2) first groups and produce simultaneously at least one RESET pulse under the control of the sub-control module of first RESET, this operating impulse carries out the RESET operation to the first object address of phase transition storage respectively.
Described RESET control module comprises the sub-control module of several RESET, the quantity of the sub-control module of RESET is decided according to the group number of RESET passage, and the RESET passage is 2 groups in the described step 1), therefore, in the present embodiment, the RESET control module comprises 2 sub-control modules of RESET.Described each group RESET drives passage corresponding to a sub-control module of RESET, and one group of RESET that the sub-control module of described each RESET is self correspondence drives passage and produces a RESET control signal.For example, first group of RESET passage (passage 0 and passage 1) produces 2 RESET pulses simultaneously under the control of the sub-control module of first RESET, and these 2 RESET pulses are carried out the RESET operation to the first object address of transition storage respectively.In the present embodiment, described first object address is the 0th and the 1st storage unit, Bit0 as shown in Figure 2 and Bit1.
Described operating impulse comprises current impulse or potential pulse, utilizes the thermal effect of current impulse or potential pulse can realize the state of storage unit in the phase transition storage is changed.Present embodiment is preferably current impulse, is carrying out RESET when operation, and the thermal effect of utilizing current impulse melts the phase-change material of phase-changing memory unit.
(3) second groups of RESET drive passage and produce simultaneously at least one wiping operating impulse under the controls of second sub-control module of RESET, and this operating impulse carries out the RESET operation to the second destination address of phase transition storage respectively.
For example, second corresponding second group of RESET of the sub-control module of RESET drives passage (passage 2 and passage 3), second group of RESET drives passage and produce simultaneously 2 RESET pulses under the control of second sub-control module of RESET, and these 2 RESET pulses are carried out the RESET operation to the second destination address of transition storage respectively.In the present embodiment, described the second destination address is the 2nd and the 3rd storage unit, Bi2 as shown in Figure 2 and Bit3.
(4) the like, under the control of m the sub-control module of RESET, producing simultaneously at least one wiping operating impulse until finish m group RESET driving passage, this operating impulse carries out the RESET operation to the m destination address of phase transition storage respectively.
The value of m described in the present embodiment is 2, therefore at completing steps 2) after just finished RESET operation to 4 bit strip wide memory unit, if grouping is greater than 2, then can the like, produce simultaneously at least one RESET pulse until finish m group RESET driving passage under the control of m the sub-control module of RESET, this operating impulse carries out the RESET operation to the m destination address of phase transition storage respectively.
Seeing also Fig. 3, is in 2 the situation in the m value again, if the peak power of each passage is P, the instantaneous peak value power consumption that then phase transition storage carries out the RESET operation in the present embodiment is 2P.And utilize the programmed method of Fig. 1, and the instantaneous peak value power consumption of phase transition storage is 4P, therefore, with respect to traditional programmed method, the instantaneous peak value power consumption of programmed method of the present invention has lowered half.
Need to prove, the sub-control module of described RESET can only be one also, that is to say that described m group RESET drives passage and can control (diagram) by a sub-control module of RESET, this moment, described RESET control module was except having the function that produces pulse control signal, also should comprise logical circuit, so that the RESET control module produces the pulse control signal that needs in the different time.
The present invention also provides a kind of programing system of phase transition storage, and this system can realize the programmed method of above-mentioned phase transition storage, and the programing system of this phase transition storage comprises at least: RESET control module, RESET enable module, and RESET driver module.
The control signal that described RESET control module drives for generation of RESET, this RESET control module comprises m the sub-control module of RESET.As shown in Figure 2, described RESET control module comprises 2 sub-control modules of RESET.Certainly, it also can only be a RESET control submodule, the sub-control module of described RESET this moment also should comprise logical circuit except having the function that produces pulse control signal, so that the sub-control module of RESET produces the pulse control signal that needs in the different time.The sub-control module of RESET is preferably 2 in the present embodiment.
Described RESET enable module is connected with the RESET control module, for generation of the RESET enable signal.This RESET enable module comprises n sub-enable module.In this enforcement, described RESET enable module comprises 4 sub-enable module, is respectively En0, En1, En2, En3 among Fig. 2.
Described RESET driver module is connected with the RESET enable module, for generation of the RESET pulse, described RESET driver module is under the control of the control signal that the RESET of described correspondence control module produces, and whether produces effectively successively the RESET pulse according to the RESET enable signal.This RESET driver module has n RESET and drives passage.In the present embodiment, the RESET driver module has 4 RESET and drives passage, as shown in Figure 2, is respectively passage 0, passage 1, passage 2, passage 3.These 4 RESET drive passage and are divided into the m group, and the span of m is 1＜m≤T
SET/ T
RESET, wherein, T
SETBe write cycles, T
RESETFor wiping the operating cycle.Present embodiment m value is 2, and namely passage 0, passage 1 are one group, and passage 2, passage 3 are another group.Described each group RESET drives passage corresponding to a sub-control module of RESET.One group of RESET that the sub-control module of described each RESET is self correspondence drives passage and produces a RESET control signal.
Further, described RESET pulse comprises current impulse or potential pulse, and present embodiment is preferably current impulse.
Need to prove, in phase transition storage of the present invention system, the priority of all operational modules have grade minute.Wherein, wiping operation control module priority is the highest, and enable module and driver module all are to work under its control; Enable module priority is inferior high, the control of controlled module; The priority of driver module is minimum, only all just works effectively the time in control module and enable module.
In sum, the invention provides a kind of programing system and method for phase transition storage, this phase transition storage has the multidigit bandwidth, its programmed method is that the bandwidth with phase transition storage is divided into some groups, when phase transition storage carried out programming operation, phase transition storage need to carry out the position of RESET operation according to grouping successively operation, the instantaneous peak value power consumption in the time of can reducing like this phase transition storage programming, improve the stability of supply voltage, and then improve the stability of whole system.Because the RESET running time of phase transition storage is much smaller than the SET running time, so the RESET operating current is much larger than the SET operating current, therefore the programmed method of the phase transition storage that proposes of the present invention is the not RESET scatter operation of coordination, can not only guarantee the write operation performance but also reduce the instantaneous peak value power consumption of phase change memory chip.
So the present invention has effectively overcome various shortcoming of the prior art and the tool high industrial utilization.
Above-described embodiment is illustrative principle of the present invention and effect thereof only, but not is used for restriction the present invention.Any person skilled in the art scholar all can be under spirit of the present invention and category, and above-described embodiment is modified or changed.Therefore, have in the technical field under such as and know that usually the knowledgeable modifies or changes not breaking away from all equivalences of finishing under disclosed spirit and the technological thought, must be contained by claim of the present invention.
Claims (9)
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060007729A1 (en) * | 2004-07-09 | 2006-01-12 | Beak-Hyung Cho | Phase change memories and/or methods of programming phase change memories using sequential reset control |
| CN101727982A (en) * | 2008-10-17 | 2010-06-09 | 三星电子株式会社 | Resistance variable memory device performing program and verification operation |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060007729A1 (en) * | 2004-07-09 | 2006-01-12 | Beak-Hyung Cho | Phase change memories and/or methods of programming phase change memories using sequential reset control |
| CN1734671A (en) * | 2004-07-09 | 2006-02-15 | 三星电子株式会社 | The method of phase transition storage and use continuous reset control programming phase transition storage |
| CN101727982A (en) * | 2008-10-17 | 2010-06-09 | 三星电子株式会社 | Resistance variable memory device performing program and verification operation |
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Application publication date: 20130320 |