CN102969028A - Method, system, and flash memory of ECC dynamic adjustment - Google Patents
Method, system, and flash memory of ECC dynamic adjustment Download PDFInfo
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Abstract
The invention is suitable for the technical field of flash memory storage, and provides a method, a system, and a flash memory of an ECC dynamic adjustment. The method comprises configuring a plurality of ECC algorithms with different error correction capability for the flash memory; grading error bits with different data in the flash memory into different error grades, and grading the error correction capability of the ECC algorithms and the ECC check bits, with the ECC algorithms and the ECC check bits of different error correction grades being corresponding to different error grades; and updating to corresponding ECC algorithms and the ECC check bits when maximum error bit of the data in the flash memory reaches different error grades. Therefore, the method dynamically adjusts ECC bits at different stages in the life cycle for an NAND Flash, thereby realizing balance of an access rate and a service life of NAND Flash.
Description
Technical field
The present invention relates to the flash memory technology field, relate in particular to a kind of ECC dynamic adjusting method, system and flash memory.
Background technology
Because material and the technological reason of NAND Flash (NAND type flash memory), use and deposit in the read-write of NAND Flash and be easy to produce bad piece in the process, so use ECC (Error Correcting Code, bug check and correction) to guarantee data integrity.Namely preserve the ECC data at each page of NAND Flash with extra storage space, when data writing, calculate the ECC data of fixed-length data section, and upgrade; When data read, also can read the ECC code, check the data that read whether correct, when incorrect such as reading out data, come correction data by the ECC code.It is relevant with ECC algorithm correction intensity and ECC figure place that how many bit data ECC can proofread and correct.In general, can correction data more, the ECC algorithm that needs be more complicated, needs the ECC figure place of storage also can be more, thereby has strengthened data integrity, has remedied the hardware deficiency of Flash NAND by correction data, prolongs the serviceable life of Flash NAND; Yet the ECC algorithm is complicated and the more meeting of ECC figure place causes that power consumption penalty, access rate reduce.
In its life cycle of NAND Flash, all adopt the ECC check bit of same ECC algorithm and same length at present, and use the initial stage at Flash, because the Flash medium life-span is good, it is less wrong probability to occur; And after Flash used a period of time, the Flash medium was impaired, and wrong probability occurring increases gradually.Therefore in the Flash life cycle, different time is different to the error correcting capability requirement of ECC algorithm, and prior art is difficult to reach the balance in NAND Flash access rate and serviceable life.
In summary, the ECC algorithm of existing flash memory obviously exists inconvenience and defective, in actual use so be necessary to be improved.
Summary of the invention
For above-mentioned defective, the object of the present invention is to provide a kind of ECC dynamic adjusting method, system and flash memory, its can be in NAND Flash life cycle different phase, ECC algorithm and ECC verification figure place are dynamically adjusted, thereby reached the balance in NAND Flash access rate and serviceable life.
To achieve these goals, the invention provides a kind of ECC dynamic adjusting method, the method comprises:
Be the different ECC algorithm of a plurality of error correcting capabilities of flash configuration;
The wrong figure places that data in the described flash memory are different are classified as different errorlevels, and carry out classification, the errorlevel that the ECC algorithm of different error-correction level is corresponding different with ECC verification figure place for the error correcting capability of described ECC algorithm and ECC verification figure place;
When the maximum wrong figure place of the data in the described flash memory reaches different errorlevel, be updated to corresponding ECC algorithm and ECC verification figure place.
According to ECC dynamic adjusting method of the present invention, in the step of " for the different ECC algorithm of a plurality of error correcting capabilities of flash configuration ": described ECC algorithm comprises: Simple Hamming error correction algorithm, Reed-Solomon error correction algorithm and BCH error correction algorithm.
According to ECC dynamic adjusting method of the present invention, described method also comprises: when described flash memory moves for the first time, initial ECC algorithm and ECC verification figure place are set, and the maximum wrong figure place of record flash memory.
According to ECC dynamic adjusting method of the present invention, in the step of " carrying out classification for described ECC algorithm with the error correcting capability of ECC verification figure place ": the error-correction level that different ECC algorithms are corresponding different, error-correction level corresponding to different ECC verification figure places in the same ECC algorithm.
According to ECC dynamic adjusting method of the present invention, the step of " the wrong figure places that the data in the described flash memory are different are classified as different errorlevels " comprising: the threshold value that the lowest error figure place is set for described different errorlevels; The step of " when the maximum wrong figure place of the data in the described flash memory reaches different errorlevel; be updated to corresponding ECC algorithm and ECC verification figure place " comprising: when the maximum wrong figure place of the data in the described flash memory during more than or equal to the threshold value of lowest error figure place corresponding to certain errorlevel, the ECC algorithm of described flash memory and ECC verification figure place be updated to error-correction level corresponding to this errorlevel.
The present invention is corresponding to provide a kind of ECC dynamic debugging system, and this system comprises:
ECC algorithm configuration unit is used to the different ECC algorithm of a plurality of error correcting capabilities of flash configuration;
The errorlevel stage unit is used for the wrong figure place that the data of described flash memory are different and is classified as different errorlevels;
The error correcting capability stage unit is used to the error correcting capability of described ECC algorithm and ECC verification figure place to carry out classification, the errorlevel that the ECC algorithm of different error-correction level is corresponding different with described ECC verification figure place;
The error-correction level updating block when the maximum wrong figure place of the data in the described flash memory reaches different errorlevel, is updated to corresponding ECC algorithm and ECC verification figure place.
According to system of the present invention, described ECC algorithm comprises: Simple Hamming error correction algorithm, Reed-Solomon error correction algorithm and BCH error correction algorithm.
According to system of the present invention, described system also comprises the initial setting up unit, be used for when described flash memory moves for the first time, initial ECC algorithm and ECC verification figure place being set, and the maximum wrong figure place of record flash memory.
According to system of the present invention, described error correcting capability stage unit also is used for the error-correction level that different ECC algorithms are corresponding different, with error-correction level corresponding to different ECC verification figure places in the same ECC algorithm; Described errorlevel stage unit also is used to described different errorlevel that the threshold value of lowest error figure place is set; Described error-correction level updating block also is used for when the maximum wrong figure place of the data of described flash memory during more than or equal to the threshold value of lowest error figure place corresponding to certain errorlevel, and the ECC algorithm of described flash memory and ECC verification figure place be updated to error-correction level corresponding to this errorlevel.
The present invention also provides a kind of flash memory that comprises said system.
The present invention is by being the different ECC algorithm of a plurality of error correcting capabilities of flash configuration, and the wrong figure place that the data in the flash memory are different is classified as different errorlevels, for the error correcting capability of ECC algorithm and ECC verification figure place is carried out classification, the errorlevel that the ECC algorithm of different error-correction level is corresponding different with ECC verification figure place, when the maximum wrong figure place of the data in the flash memory reaches different errorlevel, upgrade described ECC algorithm and verification figure place.Thereby use the initial stage at Flash, because the Flash medium life-span is good, it is less wrong probability to occur, and the present invention can be the comparatively simple ECC algorithm of flash configuration and less ECC check bit, in earlier stage reduce ECC at Flash and calculate power consumption and volume of transmitted data, thereby improve access rate; And after Flash used a period of time, the Flash medium was impaired, and wrong probability occurring increases gradually, and the present invention can be the complicated ECC algorithm of flash configuration and more ECC check bit, the serviceable life of improving flash memory.Whereby, the present invention is directed to the different phase of NAND Flash in life cycle, the ECC figure place is dynamically adjusted, thereby reach the balance in access rate and NAND Flash serviceable life.
Description of drawings
Fig. 1 is the structural representation of a kind of embodiment of ECC dynamic debugging system of the present invention;
Fig. 2 is the process flow diagram of a kind of embodiment of ECC dynamic adjusting method of the present invention.
Embodiment
In order to make purpose of the present invention, technical scheme and advantage clearer, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the present invention, is not intended to limit the present invention.
As shown in Figure 1, a kind of ECC dynamic debugging system 100 of the present invention, be used for flash memory, system 100 comprises: ECC algorithm configuration unit 10, errorlevel stage unit 20, error correcting capability stage unit 30 and error-correction level updating block 40, this system can be the software unit that is built in flash memory, hardware cell or software and hardware combining unit.
ECC algorithm configuration unit 10 is used to the different ECC algorithm of a plurality of error correcting capabilities of flash configuration.Wherein, described ECC algorithm comprises: Simple Hamming error correction algorithm, Reed-Solomon error correction algorithm and BCH error correction algorithm.The ECC algorithm has simple and easy dividing, and can realize by hardware and software, and the Hamming that for example Simple Hamming error correction algorithm is corresponding (Simple Hamming) code can only be proofreaied and correct the single dislocation mistake; The Rui Desuoluomen that the Reed-Solomon error correction algorithm is corresponding (Reed-Solomon) code can provide powerful error correcting capability; The error correction efficient of BCH (Bose, Ray-Chaudhuri with Hocquenghem the abbreviation) BCH code that error correction algorithm is corresponding is higher, but algorithm complex is also higher.In addition, use same ECC algorithm, different ECC verification figure places also can be proofreaied and correct different maximum wrong figure places.
Error correcting capability stage unit 30 is used to the error correcting capability of ECC algorithm and ECC verification figure place to carry out classification, the errorlevel that the ECC algorithm of different error-correction level is corresponding different with ECC verification figure place.Preferably, the error-correction level that error correcting capability stage unit 30 is corresponding different with different ECC algorithms is with error-correction level corresponding to different ECC verification figure places in the same ECC algorithm.For example the error correcting capability with ECC algorithm and ECC verification figure place is divided into three grades, and the first order is Simple Hamming error correction algorithm; The second level is the Reed-Solomon error correction algorithm; The third level is the BCH error correction algorithm.Simultaneously, can carry out the error correcting capability classification to the different check figure place of same error correction algorithm again.
Error-correction level updating block 40 when the maximum wrong figure place of the data in the flash memory reaches different errorlevel, is updated to corresponding ECC algorithm and ECC verification figure place.Concrete, when the maximum wrong figure place of the data in the flash memory during more than or equal to the threshold value of lowest error figure place corresponding to certain errorlevel, error-correction level updating block 40 is updated to error-correction level corresponding to this errorlevel with the ECC algorithm of flash memory and ECC verification figure place.
Preferably, system 100 also comprises initial setting up unit 50, be used for when flash memory moves for the first time, initial ECC algorithm and ECC verification figure place being set, and the maximum wrong figure place of record flash memory.
The present invention is by being the different ECC algorithm of a plurality of error correcting capabilities of flash configuration, and the wrong figure place that the data in the flash memory are different is classified as different errorlevels, for the error correcting capability of ECC algorithm and ECC verification figure place is carried out classification, the errorlevel that the ECC algorithm of different error-correction level is corresponding different with ECC verification figure place, when the maximum wrong figure place of the data in the flash memory reaches different errorlevel, upgrade described ECC algorithm and verification figure place.Thereby use the initial stage at Flash, because the Flash medium life-span is good, it is less wrong probability to occur, and the present invention can be the comparatively simple ECC algorithm of flash configuration and less ECC check bit, in earlier stage reduce ECC at Flash and calculate power consumption and volume of transmitted data, thereby improve access rate; And after Flash used a period of time, the Flash medium was impaired, and wrong probability occurring increases gradually, and the present invention can be the complicated ECC algorithm of flash configuration and more ECC check bit, the serviceable life of improving flash memory.Whereby, the present invention is directed to the different phase of NAND Flash in life cycle, the ECC figure place is dynamically adjusted, thereby reach the balance in access rate and NAND Flash serviceable life.
According to one embodiment of present invention, as shown in table 1, wrong figure place threshold value can be divided into n rank (E from small to large
1... E
n), expression need to be carried out ECC algorithm and figure place and upgrade E when wrong figure place reaches different value among the NAND Flash
N+1Be the wrong figure place of the receptible maximum of NAND Flash.Corresponding, ECC algorithm and ECC verification figure place also are divided into n rank (L
1... L
n).N is larger, and the ECC algorithm that representative needs is more complicated, and ECC verification figure place is more, and the ECC calibration capability is stronger.
Table 1
| Mistake figure place threshold value | ECC algorithm and figure place |
| E 1 | L 1 ...... ...... |
| E n | L n |
| E n+1 |
To the NAND Flash of first use, deciding initial level according to chip quality is L
m(1＜=m＜=n), in operational process, such as wrong figure place at C
mAnd C
M+1Between (comprise C
m), then without any need for operation; Such as wrong figure place at C
iAnd C
I+1Between (comprising Ci), then need upgrade the ECC level and be clipped to L
i
As shown in Figure 2, the present invention also provides a kind of ECC dynamic adjusting method, and the method realizes that by system 100 as shown in Figure 1 the main flow process of the method comprises:
Step S201 is the different ECC algorithm of a plurality of error correcting capabilities of flash configuration.Preferably, the ECC algorithm comprises: Simple Hamming error correction algorithm, Reed-Solomon error correction algorithm and BCH error correction algorithm.This step realizes by ECC algorithm configuration unit 10.
Step S202, the wrong figure places that the data in the flash memory are different are classified as different errorlevels, and carry out classification, the errorlevel that the ECC algorithm of different error-correction level is corresponding different with ECC verification figure place for the error correcting capability of ECC algorithm and ECC verification figure place.Preferably, the error-correction level that different ECC algorithms are corresponding different, error-correction level corresponding to different ECC verification figure places in the same ECC algorithm.This step realizes jointly by errorlevel stage unit 20 and error correcting capability stage unit 30.
Step S203 when the maximum wrong figure place of the data in the flash memory reaches different errorlevel, is updated to corresponding ECC algorithm and ECC verification figure place.
Preferably, the method also comprises: when flash memory moves for the first time, initial ECC algorithm and ECC verification figure place are set, and the maximum wrong figure place of record flash memory.
Preferably, step S202 also comprises: the threshold value that the lowest error figure place is set for different errorlevels; Step S203 also comprises: when the maximum wrong figure place of the data in the flash memory during more than or equal to the threshold value of lowest error figure place corresponding to certain errorlevel, the ECC algorithm of flash memory and ECC verification figure place be updated to error-correction level corresponding to this errorlevel.
In sum, the present invention is by being the different ECC algorithm of a plurality of error correcting capabilities of flash configuration, and the wrong figure place that the data in the flash memory are different is classified as different errorlevels, for the error correcting capability of ECC algorithm and ECC verification figure place is carried out classification, the errorlevel that the ECC algorithm of different error-correction level is corresponding different with ECC verification figure place, when the maximum wrong figure place of the data in the flash memory reaches different errorlevel, upgrade described ECC algorithm and verification figure place.Thereby use the initial stage at Flash, because the Flash medium life-span is good, it is less wrong probability to occur, and the present invention can be the comparatively simple ECC algorithm of flash configuration and less ECC check bit, in earlier stage reduce ECC at Flash and calculate power consumption and volume of transmitted data, thereby improve access rate; And after Flash used a period of time, the Flash medium was impaired, and wrong probability occurring increases gradually, and the present invention can be the complicated ECC algorithm of flash configuration and more ECC check bit, the serviceable life of improving flash memory.Whereby, the present invention is directed to the different phase of NAND Flash in life cycle, the ECC figure place is dynamically adjusted, thereby reach the balance in access rate and NAND Flash serviceable life.
Certainly; the present invention also can have other various embodiments; in the situation that does not deviate from spirit of the present invention and essence thereof; those of ordinary skill in the art work as can make according to the present invention various corresponding changes and distortion, but these corresponding changes and distortion all should belong to the protection domain of the appended claim of the present invention.
Claims (10)
1. ECC dynamic adjusting method is characterized in that the method comprises:
Be the different ECC algorithm of a plurality of error correcting capabilities of flash configuration;
The wrong figure places that data in the described flash memory are different are classified as different errorlevels, and carry out classification, the errorlevel that the ECC algorithm of different error-correction level is corresponding different with ECC verification figure place for the error correcting capability of described ECC algorithm and ECC verification figure place;
When the maximum wrong figure place of the data in the described flash memory reaches different errorlevel, be updated to corresponding described ECC algorithm and ECC verification figure place.
2. ECC dynamic adjusting method according to claim 1, it is characterized in that in the step of " for the different ECC algorithm of a plurality of error correcting capabilities of flash configuration ": described ECC algorithm comprises: SimpleHamming error correction algorithm, Reed-Solomon error correction algorithm and BCH error correction algorithm.
3. ECC dynamic adjusting method according to claim 1 is characterized in that, described method also comprises: when described flash memory moves for the first time, initial ECC algorithm and ECC verification figure place are set, and the maximum wrong figure place of record flash memory.
4. ECC dynamic adjusting method according to claim 1 is characterized in that, in the step of " for the error correcting capability of described ECC algorithm and ECC verification figure place is carried out classification ":
Error-correction level corresponding to different ECC algorithms, error-correction level corresponding to different ECC verification figure places in the same ECC algorithm.
5. each described ECC dynamic adjusting method is characterized in that according to claim 1～4,
The step of " the wrong figure places that the data in the described flash memory are different are classified as different errorlevels " comprising: the threshold value that the lowest error figure place is set for described different errorlevels;
The step of " when the maximum wrong figure place of the data in the described flash memory reaches different errorlevel; be updated to corresponding ECC algorithm and ECC verification figure place " comprising: when the maximum wrong figure place of the data in the described flash memory during more than or equal to the threshold value of lowest error figure place corresponding to certain errorlevel, the ECC algorithm of described flash memory and ECC verification figure place be updated to error-correction level corresponding to this errorlevel.
6. an ECC dynamic debugging system is characterized in that, this system comprises:
ECC algorithm configuration unit is used to the different ECC algorithm of a plurality of error correcting capabilities of flash configuration;
The errorlevel stage unit is used for the wrong figure place that the data of described flash memory are different and is classified as different errorlevels;
The error correcting capability stage unit is used to the error correcting capability of described ECC algorithm and ECC verification figure place to carry out classification, the errorlevel that the ECC algorithm of different error-correction level is corresponding different with described ECC verification figure place;
The error-correction level updating block when the maximum wrong figure place of the data in the described flash memory reaches different errorlevel, is updated to corresponding ECC algorithm and ECC verification figure place.
7. system according to claim 6 is characterized in that, described ECC algorithm comprises: SimpleHamming error correction algorithm, Reed-Solomon error correction algorithm and BCH error correction algorithm.
8. system according to claim 6 is characterized in that, described system also comprises the initial setting up unit, be used for when described flash memory moves for the first time, initial ECC algorithm and ECC verification figure place being set, and the maximum wrong figure place of record flash memory.
9. system according to claim 6 is characterized in that, described error correcting capability stage unit also is used for the error-correction level that different ECC algorithms are corresponding different, with error-correction level corresponding to different ECC verification figure places in the same ECC algorithm;
Described errorlevel stage unit also is used to described different errorlevel that the threshold value of lowest error figure place is set;
Described error-correction level updating block also is used for when the maximum wrong figure place of the data of described flash memory during more than or equal to the threshold value of lowest error figure place corresponding to certain errorlevel, and the ECC algorithm of described flash memory and ECC verification figure place be updated to error-correction level corresponding to this errorlevel.
10. one kind comprises the flash memory such as claim 6～9 system as described in each.
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