CN102916029A - High-voltage light emitting diode - Google Patents
High-voltage light emitting diode Download PDFInfo
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- CN102916029A CN102916029A CN2012103975803A CN201210397580A CN102916029A CN 102916029 A CN102916029 A CN 102916029A CN 2012103975803 A CN2012103975803 A CN 2012103975803A CN 201210397580 A CN201210397580 A CN 201210397580A CN 102916029 A CN102916029 A CN 102916029A
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- isolation
- insulating
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- 239000010410 layer Substances 0.000 claims abstract description 67
- 238000002955 isolation Methods 0.000 claims abstract description 46
- 239000011241 protective layer Substances 0.000 claims abstract description 21
- 239000002184 metal Substances 0.000 claims abstract description 12
- 229910052751 metal Inorganic materials 0.000 claims abstract description 12
- 238000002360 preparation method Methods 0.000 claims abstract description 12
- 239000000758 substrate Substances 0.000 claims abstract description 10
- 239000004065 semiconductor Substances 0.000 claims abstract description 4
- 239000000463 material Substances 0.000 claims description 48
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 20
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 14
- 229910052681 coesite Inorganic materials 0.000 claims description 10
- 229910052906 cristobalite Inorganic materials 0.000 claims description 10
- 239000000377 silicon dioxide Substances 0.000 claims description 10
- 235000012239 silicon dioxide Nutrition 0.000 claims description 10
- 229910052682 stishovite Inorganic materials 0.000 claims description 10
- 229910052905 tridymite Inorganic materials 0.000 claims description 10
- 239000011248 coating agent Substances 0.000 claims description 7
- 238000000576 coating method Methods 0.000 claims description 7
- 239000011810 insulating material Substances 0.000 claims description 7
- 229910004205 SiNX Inorganic materials 0.000 claims description 5
- 150000001875 compounds Chemical class 0.000 claims description 2
- 238000000034 method Methods 0.000 abstract description 25
- 238000005530 etching Methods 0.000 abstract description 17
- 238000004544 sputter deposition Methods 0.000 abstract description 4
- 230000005693 optoelectronics Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 7
- 230000004888 barrier function Effects 0.000 description 5
- 229910002704 AlGaN Inorganic materials 0.000 description 4
- 239000011159 matrix material Substances 0.000 description 4
- 238000004140 cleaning Methods 0.000 description 3
- 238000000151 deposition Methods 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 2
- 229910052594 sapphire Inorganic materials 0.000 description 2
- 239000010980 sapphire Substances 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
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Abstract
一种高压发光二极管，属于半导体光电子器件领域。其高压发光二极管的主要结构依次包括：电极、第一接触层、有源区、第二接触层、隔离槽、绝缘保护层、缓冲层、衬底组成的LED结构。其采用外延生长法得到绝缘保护层；采用ICP干法刻蚀第一接触层，直至绝缘保护层，形成隔离槽，将LED独立绝缘开来；最后溅射金属进行串联，形成发光二极管阵列。本发明取代原有的刻蚀至衬底的方法，大大降低了隔离槽的深度，解决了绝缘保护层良好包覆在隔离槽侧壁的问题，使器件的制备不必采用深刻蚀工艺。
A high-voltage light-emitting diode belongs to the field of semiconductor optoelectronic devices. The main structure of its high-voltage light-emitting diode includes: electrode, first contact layer, active area, second contact layer, isolation groove, insulating protection layer, buffer layer, LED structure composed of substrate. It adopts the epitaxial growth method to obtain the insulating protective layer; uses ICP dry method to etch the first contact layer until reaching the insulating protective layer, forming isolation grooves, and independently insulating the LEDs; finally, sputtering metal in series to form a light-emitting diode array. The invention replaces the original method of etching to the substrate, greatly reduces the depth of the isolation groove, solves the problem that the insulating protection layer is well coated on the side wall of the isolation groove, and makes the preparation of the device unnecessary to use a deep etching process.
Description
Technical field
The present invention relates to a kind of high-voltage LED, belong to the semiconductor photoelectronic device field.
Technical background
Owing to the progress of technology and efficient, LED used more and more wider in recent years.Along with the upgrading that LED uses, market for the demand of LED towards more high-power and more high brightness, i.e. high-capacity LED future development.For realizing high-capacity LED, high-voltage LED is designed to one of solution at present.The key technology of high-voltage LED first is deep isolation trench, and the degree of depth of isolation channel is according to different epitaxial structures and different, but need to be etched to substrate, and purpose is the structure cell of plural number independent, therefore needs the process technique of exploitation deep etching.Second is insulating barrier, if insulating barrier does not possess good insulation characterisitic, to make whole the design unsuccessfully, its difficulty be must be on the sidewall of deep isolation trench the coating covering property good, membranous closely and the good mill layer of insulating properties, and the degree of depth of conventional high-voltage LED isolation channel has limited insulating barrier and can be good at being coated on the sidewall.For second difficult point, someone has proposed to increase at sidewall the method for a step, help like this insulating barrier better to coat, but this method has increased the complexity of technique simultaneously, need to increase on original basis by a step photoetching process, and may introduce other problems, whole device is impacted.Therefore, the method can not tackle the problem at its root, and solve above two difficult problems, also needs from solving the deep isolation trench aspects.
Summary of the invention
For solving the difficult point that exists in the conventional high-voltage LED process technique, the invention provides a kind of high-voltage LED and preparation method thereof, thereby reach the purpose that solves simultaneously above-mentioned two key technologies.
A kind of high-voltage LED, epitaxial wafer include successively the first contact layer 2, the first limiting layer 3, active area 4, the second limiting layer 5, the second contact layer 6, insulating protective layer 9,, resilient coating 11, substrate 12; Be etched with isolation channel 8 at above-mentioned epitaxial wafer; The deep end of isolation channel 8 is etched in the insulating protective layer 9, the shallow end of isolation channel 8 steps is etched in the second contact layer 6, consist of step between not doping current-limiting layer 9 in the isolation channel 8 and the second contact layer 6, be deposited with metal connecting layer 7 at described step, metal connecting layer 7 all is connected on the dielectric isolation layer 13 on first contact layer 2 adjacent with the deep end of this step; Be provided with dielectric isolation layer at the sidewall of described isolation channel 8 and the insulating protective layer 9 in the isolation channel 8.Be welded with the first electrode 1 on the first contact layer of described epitaxial wafer high order end; Be welded with the second electrode 10 on the second contact layer of described epitaxial wafer low order end.
The material of dielectric isolation layer 13 is SiO2 or SiNx.
Insulating protective layer 9 materials are intrinsic semiconductor, insulating material or other nonconducting compounds.
Making light emitting diode matrix with conventional light-emitting diode compares; the present invention adopts the epitaxial growth insulating protective layer; dry method ICP etching the first contact layer is to insulating protective layer; form the method for isolation channel, the greatly less degree of depth of ICP dry etching plays the effect of a plurality of independent LED of isolation; replace original method that is etched to substrate; greatly reduce the degree of depth of isolation channel, solved the problem that insulating barrier well is coated on ditch non-intercommunicating cells lateral wall, make the preparation of device needn't adopt deep etching technique.
Description of drawings
Fig. 1: be the high-voltage LED structural representation of routine.
Fig. 2: be high-voltage LED structural representation of the present invention.
Fig. 3: be the light emitting diode matrix isolation moat structure schematic diagram of routine.
Fig. 4: be light emitting diode matrix isolation moat structure schematic diagram of the present invention.
Fig. 5: the schematic diagram that is etched to the second contact layer for first step ICP of the present invention.
Fig. 6: the schematic diagram that is etched to insulating protective layer for second step ICP of the present invention.
Fig. 7: be the schematic diagram behind the deposit dielectric isolation layer of the present invention.
Fig. 8: a plurality of LED series connection of the present invention form the schematic diagram of high-voltage LED.
Fig. 9: the present invention prepares the schematic diagram after final technique forms behind the electrode.
Among the figure: 1, the first electrode; 2, the first contact layer; 3, the first limiting layer; 4, active area; 5, the second limiting layer; 6, the second contact layer; 7, metal connecting layer; 8, isolation channel; 9, insulating protective layer; 10, the second electrode; 11, resilient coating; 12, substrate; 13, dielectric isolation layer; 14, carrier transport limiting structure; 15, isolation channel degree of depth district; 16, LED.
Embodiment
Be described further for the present invention below in conjunction with the drawings and specific embodiments:
Embodiment 1
The preparation method is with reference to accompanying drawing 3-9, and as epitaxial film materials, conduction type is P/I/N with GaN, and SiO2 is example as insulating material, and this device is comprised of following each several part: p-GaN, p-AlGaN, InGaN, n-AlGaN, n-GaN, InGaN, InGaN/GaN, sapphire.
Structure shown in 2, wherein: 1 is the first electrode, and material is Ni/Au; 2 is first contact layers, and material is p-GaN; 3 is first limiting layers; Material is p-AlGaN; The 4th, active area, material are InGaN; 5 is second limiting layers, and material is n-AlGaN; 6 is second contact layers, and material is n-GaN; The 7th, metal connecting layer, material is Ti/Al/Ti/Au; The 8th, isolation channel; The 9th, insulating protective layer, material are InGaN; 10 second electrodes, material is Ti/Al; The 11st, resilient coating, material are InGaN/GaN; The 12nd, substrate, material are sapphires; The 13rd, dielectric isolation layer, material are SiO2; The 15th, isolation channel degree of depth district; The 16th, LED.
Its preparation process is as follows:
1. with the epitaxial loayer of epitaxial growth P-I-N-I type on the sapphire, and carry out surface cleaning processing
2. first step etching is utilized the method for ICP etching, is etched to the second contact layer (6), and n-GaN is with reference to Fig. 5
3. second step etching is utilized the method for ICP etching, is etched to insulating protective layer (9), and InGaN is with reference to Fig. 6
4. deposition insulating material SiO2 coats sidewall, with reference to Fig. 7
5. splash-proofing sputtering metal, p-GaN that will be adjacent with the deep end of step and the n-GaN of the shallow end of step are connected, with reference to Fig. 8
6. prepare P type electrode Ni/Au and N-type electrode Ti/Al, a plurality of independent LED series connection form high-voltage LED, and final process schematic representation is with reference to Fig. 9
The preparation method is with reference to accompanying drawing 3-9, as epitaxial film materials, conduction type is P/I/N with GaAs, and SiNx is example as the dielectric isolation layer material, this device is comprised of following each several part: p-AlGaInP(Mg), p-AlGaInP(Mg), AlGaInP, n-AlGaInP(Si), n-GaInP(Si), SiO2, GaAs buffer, GaAs.
Structure shown in 2, wherein, 1 is the first electrode, material is Ni/Au; 2 is first contact layers, and material is p-AlGaInP(Mg); 3 is first limiting layers; Material is p-AlGaInP(Mg); The 4th, active area, material are AlGaInP; 5 is second limiting layers, and material is n-AlGaInP(Si); 6 is second contact layers, and material is n-GaInP(Si); The 7th, metal connecting layer, material is Ti/Al/Ti/Au; The 8th, isolation channel; The 9th, insulating protective layer, material are SiO2; 10 is second electrodes, and material is Ti/Al; The 11st, resilient coating, material are GaAs; The 12nd, substrate, material are GaAs; The 13rd, dielectric isolation layer, material are SiNx; 15 is second electrodes, and material is isolation channel degree of depth district; The 16th, LED.
Its preparation process is as follows:
1. GaAs is gone up the epitaxial loayer of epitaxial growth P-I-N type, and carry out surface cleaning processing
2. first step etching is utilized the method for ICP etching, is etched to the second contact layer (6), n-GaInP(Si)
3. second step etching is utilized the method for ICP etching, is etched to insulating protective layer (9), AlGaInP
4. deposition insulating material SiNx coats sidewall
5. splash-proofing sputtering metal, p-AlGaInP(Mg that will be adjacent with the deep end of step) be connected with the n-AlGaInP (Si) of the shallow end of step
6. prepare P type electrode Ni/Au and N-type electrode Ti/Al,, a plurality of independent LED series connection form high-voltage LED
Embodiment 3:
The preparation method is with reference to accompanying drawing 3-9, as epitaxial film materials, conduction type is N-I-P with GaAs, and SiO2 is example as insulating material, this device is comprised of following each several part: n-GaInP (Si), n-AlGaInP (Si), AlGaInP, p-AlGaInP(Mg), p-AlGaInP(Mg), AlGaInP, GaAs buffer, GaAs.
Structure shown in 2, wherein, 1 is the first electrode, material is Ti/Au; 2 is first contact layers, and material is n-GaInP (Si); 3 is first limiting layers; Material is n-AlGaInP (Si); The 4th, active area, material are AlGaInP; 5 is second limiting layers, and material is p-AlGaInP(Mg); 6 is second contact layers, and material is p-AlGaInP(Mg); The 7th, metal connecting layer, material is Ti/Al/Ti/Au; The 8th, isolation channel; The 9th, insulating protective layer, material are AlGaInP; 10 is second electrodes, and material is Ni/Au; The 11st, resilient coating, material are GaAs; The 12nd, substrate, material are GaAs; The 13rd, dielectric isolation layer, material are SiO2; The 15th, isolation channel degree of depth district; The 16th, LED.
Its preparation process is as follows:
1. GaAs is gone up the epitaxial loayer of epitaxial growth N-I-P type, and carry out surface cleaning processing
2. first step etching is utilized the method for ICP etching, is etched to the second contact layer (6), p-AlGaInP (Mg)
3. second step etching is utilized the method for ICP etching, is etched to insulating protective layer (9), AlGaInP
4. deposition insulating material SiO2 coats sidewall
5. splash-proofing sputtering metal, n-AlGaInP (Si) that will be adjacent with the deep end of step and the p-AlGaInP(Mg of the shallow end of step) be connected
6. prepare N-shaped electrode Ti/Al and p-type electrode Ni/Au, a plurality of independent LED series connection form light emitting diode matrix
The above is preferred embodiment of the present invention only, is not to limit practical range of the present invention; Both all equivalents of doing according to claim scope of the present invention were protection scope of the present invention and covered.
Claims (4)
1. high-voltage LED, it is characterized in that: epitaxial wafer includes the first contact layer (2), the first limiting layer (3), active area (4), the second limiting layer (5), the second contact layer (6), insulating protective layer (9), resilient coating (11), substrate (12) successively; Be etched with isolation channel (8) at above-mentioned epitaxial wafer; The deep end of isolation channel (8) is etched in the insulating protective layer (9), the shallow end of isolation channel (8) step is etched in the second contact layer (6), consist of step between insulating protective layer (9) in the isolation channel (8) and the second contact layer (6), be deposited with metal connecting layer (7) at described step, metal connecting layer (7) all is connected on the dielectric isolation layer (13) on first contact layer (2) adjacent with the deep end of this step; Be provided with dielectric isolation layer (13) at the sidewall of described isolation channel (8) and the insulating protective layer (9) in the isolation channel (8); Be welded with the first electrode (1) on the first contact layer of described epitaxial wafer high order end; Be welded with the second electrode (14) on the second contact layer of described epitaxial wafer low order end.
2. a kind of high-voltage LED as claimed in claim 1 and preparation method thereof is characterized by, and described active area (4) material is GaN system or GaAs based material.
3. a kind of high-voltage LED as claimed in claim 1 and preparation method thereof is characterized by, and described insulating protective layer (9) is intrinsic semiconductor, insulating material or other nonconducting compounds.
4. a kind of high-voltage LED as claimed in claim 1 and preparation method thereof is characterized by, and the material of dielectric isolation layer (13) is SiO2 or SiNx.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012103975803A CN102916029A (en) | 2012-10-18 | 2012-10-18 | High-voltage light emitting diode |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012103975803A CN102916029A (en) | 2012-10-18 | 2012-10-18 | High-voltage light emitting diode |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103187494A (en) * | 2013-03-21 | 2013-07-03 | 中国科学院半导体研究所 | High voltage light-emitting diode and manufacturing method thereof |
| CN114725268A (en) * | 2022-04-13 | 2022-07-08 | 季华实验室 | Miniature light-emitting diode, preparation method and display screen |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6112373A (en) * | 1984-06-29 | 1986-01-20 | Tokyo Electric Co Ltd | printing machine |
| CN102709423A (en) * | 2012-05-15 | 2012-10-03 | 北京工业大学 | High-voltage light-emitting diode with charge transport limitation |
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2012
- 2012-10-18 CN CN2012103975803A patent/CN102916029A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6112373A (en) * | 1984-06-29 | 1986-01-20 | Tokyo Electric Co Ltd | printing machine |
| CN102709423A (en) * | 2012-05-15 | 2012-10-03 | 北京工业大学 | High-voltage light-emitting diode with charge transport limitation |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103187494A (en) * | 2013-03-21 | 2013-07-03 | 中国科学院半导体研究所 | High voltage light-emitting diode and manufacturing method thereof |
| CN114725268A (en) * | 2022-04-13 | 2022-07-08 | 季华实验室 | Miniature light-emitting diode, preparation method and display screen |
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Application publication date: 20130206 |