CN102890230A - Evaluating method of hot carrier injection degeneration performance - Google Patents
Evaluating method of hot carrier injection degeneration performance Download PDFInfo
- Publication number
- CN102890230A CN102890230A CN2012104053282A CN201210405328A CN102890230A CN 102890230 A CN102890230 A CN 102890230A CN 2012104053282 A CN2012104053282 A CN 2012104053282A CN 201210405328 A CN201210405328 A CN 201210405328A CN 102890230 A CN102890230 A CN 102890230A
- Authority
- CN
- China
- Prior art keywords
- electrical property
- voltage
- mos device
- semiconductor mos
- voltage signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 30
- 230000007850 degeneration Effects 0.000 title claims abstract description 29
- 238000002347 injection Methods 0.000 title claims abstract description 4
- 239000007924 injection Substances 0.000 title claims abstract description 4
- 239000004065 semiconductor Substances 0.000 claims abstract description 59
- 230000015556 catabolic process Effects 0.000 claims description 27
- 238000006731 degradation reaction Methods 0.000 claims description 27
- 230000015572 biosynthetic process Effects 0.000 claims description 6
- 238000012935 Averaging Methods 0.000 abstract 1
- 229910044991 metal oxide Inorganic materials 0.000 abstract 1
- 150000004706 metal oxides Chemical class 0.000 abstract 1
- 238000004364 calculation method Methods 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 5
- 230000008569 process Effects 0.000 description 3
- 238000012360 testing method Methods 0.000 description 3
- 230000008859 change Effects 0.000 description 2
- 238000000205 computational method Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000012423 maintenance Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000009471 action Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000000284 extract Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 230000002194 synthesizing effect Effects 0.000 description 1
- 238000010998 test method Methods 0.000 description 1
Images
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
The invention discloses an evaluating method of hot carrier injection degeneration performance. The method comprises the following steps of: respectively loading corresponding drain end voltage and source end voltage on the drain end and source end of a semiconductor MOS (Metal Oxide Semiconductor) device, selecting a part of alternating current voltage signal from a plurality parts of alternating current voltage signals formed by averaging an alternating current voltage signal, loading the part of alternating current voltage signal to the grid end of the semiconductor MOS device and maintaining for a preset loading time length to obtain the electric performance parameter degeneration component of each part of alternating current voltage signal; and selecting at least two another semiconductor MOS devices with the same model number as the semiconductor MOS device, and repeating the steps to calculate the electric performance degeneration quantity of the semiconductor MOS device with the model number. Compared with the existing scheme, the evaluating method has the characteristic that the alternating current voltage signal is used for calculating the electric performance degeneration quantity of the semiconductor MOS device.
Description
Technical field
The invention belongs to field of semiconductor devices, specifically, relate to the appraisal procedure that a kind of hot carrier is injected degraded performance.
Background technology
Along with the development of semiconductor fabrication process, entered the deep-submicron epoch, the reliability of semiconductor MOS device itself and IC chip performance and serviceable life concern more and more tightr.In the manufacture process of semiconductor devices, hot carrier is injected (hot carrier injection, HCI) be the key factor that affects the semiconductor MOS device performance, it can directly cause the degeneration of semiconductor MOS device performance, such as drift, the drain saturation current I of threshold voltage vt
DsatDecline, so hot carrier is injected into an important indicator for MOS device reliability test.
In the prior art, the computing method of hot carrier are carried out under direct current signal, its detailed process can summarize and be: grid and the drain terminal of device under test are loaded respectively a direct current signal that is higher than operating voltage, and measure at set intervals the electrical property of this device, such as drain saturation current I
Dsat, threshold voltage vt etc., calculate its amount of degradation, calculate the electrical property amount of degradation of this semiconductor MOS device, thereby obtain the hot carrier degradation performance of this device, as the calculating standard of semiconductor MOS device reliability.
But, because the semiconductor MOS device is to be under the ac voltage signal state in real work, and when usefulness hot carrier degradation performance given period reliability, but be based on the computing method of direct current signal, therefore cause obtaining accurately reaction semiconductor MOS device reliability of result of calculation.In addition, if when calculating, directly load the ac voltage signal that conforms to actual conditions at the semiconductor MOS device, then can cause a-c cycle too fast, the too little and situation about can't measure of electrical property amount of degradation.
Summary of the invention
Technical matters to be solved by this invention provides the appraisal procedure that a kind of hot carrier is injected degraded performance, in order to improve the reliability of prior art Computational Methods, and if avoid calculating the situation that can't measure degraded performance that causes based on ac voltage signal in the prior art.
In order to solve the problems of the technologies described above, the invention provides the appraisal procedure that a kind of hot carrier is injected degraded performance, the method comprises:
Step 2, predetermined load duration after, remove the grid terminal voltage that drain terminal, source, grid end load respectively corresponding drain terminal voltage, source voltage terminal and loading, measure the real-time unit for electrical property parameters of semiconductor MOS device;
Step 3, in described predetermined loading duration, traversal is divided equally every a ac voltage signal the many parts of ac voltage signals of formation from ac voltage signal, obtains unit for electrical property parameters degeneration component under every a ac voltage signal according to described real-time unit for electrical property parameters;
At least two other semiconductor MOS device of step 4, selection and described semiconductor MOS device same model, and in different described predetermined loading durations, repeat respectively above-mentioned steps 1-3 for each semiconductor MOS device, obtain at least unit for electrical property parameters degeneration component of two other semiconductor MOS device under every a ac voltage signal;
Compare with existing scheme, by using ac voltage signal, and ac voltage signal should be divided into some parts, record corresponding real-time unit for electrical property parameters and corresponding unit for electrical property parameters degeneration component at every a ac voltage signal, the different interior unit for electrical property parameters degeneration components of duration that load of statistics are to carry out match accordingly, obtain fitting result, thereby finish the electrical property amount of degradation that calculates the semiconductor MOS device, improved the reliability of prior art Computational Methods.
Description of drawings
Fig. 1 is the appraisal procedure that embodiment of the invention hot carrier is injected degraded performance;
Fig. 2 is the ac voltage signal that uses in the invention described above embodiment one concrete application scenarios;
Fig. 3 is the schematic diagram of three match power functions.
Embodiment
Below will cooperate graphic and embodiment describes embodiments of the present invention in detail, by this to the present invention how the application technology means implementation procedure that solves technical matters and reach the technology effect can fully understand and implement according to this.
Among the following embodiment of the present invention, by using ac voltage signal, and ac voltage signal should be divided into some parts, record corresponding real-time unit for electrical property parameters and corresponding unit for electrical property parameters degeneration component at every a ac voltage signal, unit for electrical property parameters degeneration component under the different loading of the statistics duration is to carry out match accordingly, obtain fitting result, thereby finish the electrical property amount of degradation that calculates the semiconductor MOS device.
Fig. 1 is the appraisal procedure that embodiment of the invention hot carrier is injected degraded performance, and as shown in Figure 1, computing method comprise:
In the present embodiment, the drain terminal voltage that described drain terminal loads can but be not limited to the drain terminal constant voltage.Particularly, described drain terminal constant voltage can be the operating voltage of semiconductor MOS device.The described drain terminal constant voltage of described drain terminal also can be the operating voltage of at least 1.1 times semiconductor MOS device.
In the present embodiment, the source voltage terminal that described source loads can but be not limited to 0V, such as realizing by ground connection.
In the present embodiment, described ac voltage signal can be trapezoidal wave, sine wave or triangular wave.This AC-AC voltage signal is not limited to this several forms, can select arbitrarily at the signal of actual working state needs according to device, and such as being a certain of above-mentioned these several waveforms, also can synthesizing arbitrarily for above-mentioned these several waveforms.
In the present embodiment, described predetermined loading duration can but be not limited to 10 seconds to 100 seconds.To those skilled in the art, property parameters that also can the semiconductor MOS device arranges other predetermined durations that loads flexibly.When loading duration and upgrade, the predetermined loading duration after the renewal can but be not limited to 10 seconds to 100 seconds.
In the present embodiment, described real-time unit for electrical property parameters can including, but not limited to: leak saturation current, leak any one or multiple combination in linear zone electric current, the threshold voltage.
In the present embodiment, in the described step 103, including, but not limited to: according to formula Δ M=(M-M
0)/M
0Calculate the electrical property degeneration component under every a ac voltage signal, M is real-time unit for electrical property parameters under every a ac voltage signal, and M0 is the initial electrical performance parameter.
At least two other semiconductor MOS device of step 104, selection and described semiconductor MOS device same model, and in different described predetermined loading durations, repeat respectively above-mentioned steps 101-103 for each semiconductor MOS device, obtain at least unit for electrical property parameters degeneration component of two other semiconductor MOS device under every a ac voltage signal;
In the present embodiment, so-called different predetermined loading duration, namely for different on the time of the ac voltage signal continuous action that loads between the different semiconductor MOS devices of the test of the participation under the same model, in detail can be referring to following concrete application example.
In the present embodiment, in the described step 105, specifically can but be not limited to comprise:
At first, add up the unit for electrical property parameters degeneration component that same predetermined loading duration obtains;
Secondly, the described unit for electrical property parameters amount of degradation of match and the predetermined funtcional relationship that loads duration, and utilize this funtcional relationship to calculate that described semiconductor MOS device is at the unit for electrical property parameters amount of degradation of actual operating frequency under the time.
In an other embodiment, in the described step 105, specifically also can but be not limited to comprise:
At first, add up the unit for electrical property parameters degeneration component that same predetermined loading duration obtains;
Secondly, the described unit for electrical property parameters amount of degradation of match and the predetermined funtcional relationship that loads duration, and utilize this funtcional relationship to calculate that described semiconductor MOS device is at any unit for electrical property parameters amount of degradation of frequency of operation under the time.
In order more accurately to carry out match, in the present embodiment, described funtcional relationship can but be not limited to power function relationship.
In the above-described embodiments, before step 105, can carry out: the initial electrical performance parameter of measuring the semiconductor MOS device.
Fig. 2 is the ac voltage signal that uses in the invention described above embodiment one concrete application scenarios, as shown in Figure 2, the grid terminal voltage that gets if prepare under 0.5um technique is that operating voltage is the nmos device of 5v, the working signal of its actual working state is triangular wave, the amplitude of this triangular wave is positioned at 0 ~ 6.6V, according to above-mentioned computing method, this triangular wave is divided into 28 equal portions, proportion by subtraction is V0 ~ V27, size between every a ac voltage signal is poor to be 0.5V, and namely rear a ac voltage signal is than front a ac voltage signal rising 0.5V.Select drain terminal constant voltage Vd=6.6v, from V0=0v loads 1s, record real-time unit for electrical property parameters, class figure successively, V1 ~ V27, load 1s, obtain altogether 28 parts of real-time unit for electrical property parameters and for the unit for electrical property parameters degeneration component of every part of ac voltage signal, as shown in table 1, Id, lin represents to leak the linear zone electric current, and Δ Idlin represents to leak linear zone current degradation amount, Vt(mV) the expression threshold voltage, Δ vth represents the threshold voltage amount of degradation, Id, sat represent to leak saturation current, and Δ Idsat represents to leak the saturation current amount of degradation.
28 parts of real-time unit for electrical property parameters of table 1 and for the electrical property amount of degradation of every part of ac voltage signal
Vi(v) | Id,lin(μA) | Vt(mV) | Id,sat(mA) | ΔIdlin(%) | Δvth(%) | ΔIdsat(%) |
0 | 404.198 | 888.713 | 4.78019 | 2.240 | 0.277 | 0.008 |
0.5 | 402.699 | 888.704 | 4.77984 | 2.602 | 0.278 | 0.015 |
1 | 384.258 | 887.45 | 4.77563 | 7.062 | 0.419 | 0.103 |
1.5 | 372.761 | 885.752 | 4.77271 | 9.843 | 0.609 | 0.164 |
2 | 369.639 | 886.1885 | 4.77092 | 10.598 | 0.560 | 0.202 |
2.5 | 367.71 | 885.346 | 4.77015 | 11.065 | 0.655 | 0.218 |
3 | 366.889 | 885.573 | 4.76965 | 11.263 | 0.629 | 0.228 |
3.5 | 366.213 | 885.9912 | 4.76948 | 11.427 | 0.582 | 0.232 |
4 | 366.191 | 885.3456 | 4.76937 | 11.432 | 0.655 | 0.234 |
4.5 | 365.026 | 885.1347 | 4.76881 | 11.714 | 0.678 | 0.246 |
5 | 363.73 | 884.2816 | 4.7682 | 12.027 | 0.774 | 0.259 |
5.5 | 363.269 | 884.232 | 4.76799 | 12.139 | 0.780 | 0.263 |
6 | 363.22 | 884.073 | 4.76767 | 12.151 | 0.797 | 0.270 |
6.5 | 363.053 | 884.5374 | 4.76759 | 12.191 | 0.745 | 0.271 |
6.5 | 363.06 | 885.002 | 4.76748 | 12.189 | 0.693 | 0.274 |
6 | 363.098 | 885.188 | 4.76757 | 12.180 | 0.672 | 0.272 |
5.5 | 362.997 | 885.2743 | 4.76746 | 12.205 | 0.663 | 0.274 |
5 | 362.778 | 884.5202 | 4.76729 | 12.258 | 0.747 | 0.278 |
4.5 | 362.595 | 884.1653 | 4.76727 | 12.302 | 0.787 | 0.278 |
4 | 362.273 | 884.831 | 4.76719 | 12.380 | 0.712 | 0.280 |
3.5 | 361.751 | 884.8708 | 4.76695 | 12.506 | 0.708 | 0.285 |
3 | 361.345 | 884.0474 | 4.7667 | 12.604 | 0.800 | 0.290 |
2.5 | 360.139 | 884.4483 | 4.76632 | 12.896 | 0.755 | 0.298 |
2 | 359.42 | 884.2522 | 4.76614 | 13.070 | 0.777 | 0.302 |
1.5 | 358.801 | 884.8977 | 4.76629 | 13.219 | 0.705 | 0.299 |
1 | 358.759 | 884.4928 | 4.76636 | 13.230 | 0.750 | 0.297 |
0.5 | 358.571 | 884.085 | 4.76623 | 13.275 | 0.796 | 0.300 |
0 | 358.547 | 884.1091 | 4.76625 | 13.281 | 0.793 | 0.299 |
The operating voltage of selecting other three same models is the nmos device of 5v, for these three nmos devices wherein, every part of duration that ac voltage signal loads, be respectively 100s, 30s and 10s, namely be similar to the loading duration of above-mentioned 1s, under the 100s duration, one of them nmos device measured 28 times, under the 30s duration, another one nmos device is measured 28 times, under the 10s duration last nmos device is measured 28 times, concrete measurement result is not describing in detail at this.Table 2 is three kinds of unit for electrical property parameters degeneration average magnitudes that load under the duration.
Table 2 is three kinds of unit for electrical property parameters degeneration average magnitudes that load under the duration
Load time (s) | △Id,lin | △Vt,ext | △Id,sat |
100 | 21.5703 | 1.670833 | 0.667464 |
30 | 19.28198 | 1.525575 | 0.553836 |
10 | 17.40436 | 1.171107 | 0.501461 |
1 | 13.28091 | 0.793409 | 0.299337 |
Adopt power function that above-mentioned data are carried out match, obtaining fitting formula is Δ Idlin=13.41x
0.1057, Δ Vt=0.8031x
0.1687, Δ Idsat=0.3107x
0.173Fig. 3 is the schematic diagram of these three match power functions.
The actual operating frequency of supposing this NMOS is 1GHz, the working time in so single cycle is 1ns, the working time of every part of operating voltage should be 36ps, should be worth the substitution fitting formula, obtain frequency of operation and be the device performance degeneration amount under the 1GHz: leaking linear zone current degradation amount Δ Idlin is 1.055%, Vth threshold voltage amount of degradation Δ vth0.0139% leaks saturation current amount of degradation Δ Idsat and degenerates 0.0048%.
Further, can obtain in the whole waveform degraded performance of device under arbitrary condition with the method.For example in whole real work waveform the amount of degradation of Idsat peaked be center at negative edge, be Vi=2v, same method of testing is the performance that extracts Vi=2v among 100s, 30s, 10s and the 1s in the load time respectively, and obtaining Idsat is 0.0055% at maximum amount of degradation.
Above-mentioned explanation illustrates and has described some preferred embodiments of the present invention, but as previously mentioned, be to be understood that the present invention is not limited to the disclosed form of this paper, should not regard the eliminating to other embodiment as, and can be used for various other combinations, modification and environment, and can in invention contemplated scope described herein, change by technology or the knowledge of above-mentioned instruction or association area.And the change that those skilled in the art carry out and variation do not break away from the spirit and scope of the present invention, then all should be in the protection domain of claims of the present invention.
Claims (13)
1. the appraisal procedure of a hot carrier injection degraded performance is characterized in that, comprising:
Step 1, load respectively corresponding drain terminal voltage, source voltage terminal in drain terminal, the source of semiconductor MOS device; And divided equally from ac voltage signal successively and select a ac voltage signal to be loaded into the grid end of semiconductor MOS device the many parts of ac voltage signals of formation and keep a predetermined duration that loads;
Step 2, predetermined load duration after, remove the grid terminal voltage that drain terminal, source, grid end load respectively corresponding drain terminal voltage, source voltage terminal and loading, measure the real-time unit for electrical property parameters of semiconductor MOS device;
Step 3, in described predetermined loading duration, traversal is divided equally every a ac voltage signal the many parts of ac voltage signals of formation from ac voltage signal, obtains unit for electrical property parameters degeneration component under every a ac voltage signal according to described real-time unit for electrical property parameters;
At least two other semiconductor MOS device of step 4, selection and described semiconductor MOS device same model, and in different described predetermined loading durations, repeat respectively above-mentioned steps 1-3 for each semiconductor MOS device, obtain at least unit for electrical property parameters degeneration component of two other semiconductor MOS device under every a ac voltage signal;
Step 5, basis are scheduled to load duration and the unit for electrical property parameters degeneration component of at least three semiconductor MOS devices under every a ac voltage signal, calculate the electrical property amount of degradation of described model semiconductor MOS device.
2. method according to claim 1 is characterized in that, the drain terminal voltage that described drain terminal loads is the drain terminal constant voltage.
3. method according to claim 2 is characterized in that, described drain terminal constant voltage is the operating voltage of semiconductor MOS device.
4. method according to claim 2 is characterized in that, described drain terminal constant voltage is the operating voltage of at least 1.1 times semiconductor MOS device.
5. method according to claim 1 is characterized in that, the source voltage terminal that described source loads is 0V.
6. method according to claim 1 is characterized in that, described ac voltage signal is any one or the multiple combination in trapezoidal wave, sine wave, the triangular wave.
7. method according to claim 1 is characterized in that, also comprises before step 1:
Measure the initial electrical performance parameter of semiconductor MOS device.
8. method according to claim 1 is characterized in that, described predetermined loading duration is 10 seconds to 100 seconds.
9. method according to claim 1 is characterized in that, described real-time unit for electrical property parameters comprises: any one in leakage saturation current, leakage linear zone electric current, the threshold voltage or multiple combination.
10. method according to claim 1 is characterized in that, in the described step 3, according to formula Δ M=(M-M
0)/M
0Calculate the electrical property degeneration component under every a ac voltage signal, M is real-time unit for electrical property parameters under every a ac voltage signal, and M0 is the initial electrical performance parameter.
11. method according to claim 1 is characterized in that, in the described step 5, also comprises:
Add up the unit for electrical property parameters degeneration component that same predetermined loading duration obtains;
The described unit for electrical property parameters amount of degradation of match and the predetermined funtcional relationship that loads duration, and utilize this funtcional relationship to calculate that described semiconductor MOS device is at the unit for electrical property parameters amount of degradation of actual operating frequency under the time.
12. method according to claim 1 is characterized in that, in the described step 5, also comprises:
Add up the unit for electrical property parameters degeneration component that same predetermined loading duration obtains;
The described unit for electrical property parameters amount of degradation of match and the predetermined funtcional relationship that loads duration, and utilize this funtcional relationship to calculate that described semiconductor MOS device is at any unit for electrical property parameters amount of degradation of frequency of operation under the time.
13. according to claim 11 or 12 described methods, it is characterized in that, described funtcional relationship is power function relationship.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2012104053282A CN102890230A (en) | 2012-10-22 | 2012-10-22 | Evaluating method of hot carrier injection degeneration performance |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2012104053282A CN102890230A (en) | 2012-10-22 | 2012-10-22 | Evaluating method of hot carrier injection degeneration performance |
Publications (1)
Publication Number | Publication Date |
---|---|
CN102890230A true CN102890230A (en) | 2013-01-23 |
Family
ID=47533793
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2012104053282A Pending CN102890230A (en) | 2012-10-22 | 2012-10-22 | Evaluating method of hot carrier injection degeneration performance |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN102890230A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106841972A (en) * | 2017-01-19 | 2017-06-13 | 深圳市量为科技有限公司 | A kind of lossless screening technique of GaN light emitting diodes Radiation hardness and device |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5999011A (en) * | 1998-03-26 | 1999-12-07 | Taiwan Semiconductor Manufacturing Company | Method of fast testing of hot carrier effects |
US20110279144A1 (en) * | 2010-05-13 | 2011-11-17 | Semiconductor Energy Laboratory Co., Ltd. | Method for evaluating semiconductor device |
CN102495345A (en) * | 2011-12-06 | 2012-06-13 | 上海集成电路研发中心有限公司 | Method for determining service life of hot carrier injection device |
CN102567560A (en) * | 2010-12-27 | 2012-07-11 | 北京圣涛平试验工程技术研究院有限责任公司 | Method and system for estimating service life of MOS (Metal Oxide Semiconductor) device |
CN102654557A (en) * | 2012-04-19 | 2012-09-05 | 中国航空综合技术研究所 | Performance degradation testing method of insulated gate bipolar transistor |
-
2012
- 2012-10-22 CN CN2012104053282A patent/CN102890230A/en active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5999011A (en) * | 1998-03-26 | 1999-12-07 | Taiwan Semiconductor Manufacturing Company | Method of fast testing of hot carrier effects |
US20110279144A1 (en) * | 2010-05-13 | 2011-11-17 | Semiconductor Energy Laboratory Co., Ltd. | Method for evaluating semiconductor device |
CN102567560A (en) * | 2010-12-27 | 2012-07-11 | 北京圣涛平试验工程技术研究院有限责任公司 | Method and system for estimating service life of MOS (Metal Oxide Semiconductor) device |
CN102495345A (en) * | 2011-12-06 | 2012-06-13 | 上海集成电路研发中心有限公司 | Method for determining service life of hot carrier injection device |
CN102654557A (en) * | 2012-04-19 | 2012-09-05 | 中国航空综合技术研究所 | Performance degradation testing method of insulated gate bipolar transistor |
Non-Patent Citations (1)
Title |
---|
王槐生: "N型金属诱导横向结晶TFT交直流应力下的器件退化研究", 《中国优秀硕士学位论文全文数据库信息科技辑》 * |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106841972A (en) * | 2017-01-19 | 2017-06-13 | 深圳市量为科技有限公司 | A kind of lossless screening technique of GaN light emitting diodes Radiation hardness and device |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Federspiel et al. | Interaction between BTI and HCI degradation in High-K devices | |
CN110488171A (en) | Use the device measuring of two source electrode measuring units | |
CN106646180B (en) | A kind of WAT threshold voltage test method and system | |
CN103165203A (en) | Detection method for nuclear power station circuit board component | |
Shen et al. | TVS devices transient behavior modeling framework and application to SEED | |
US9268743B2 (en) | Method for determining a mathematical model of the electric behavior of a PN junction diode, and corresponding device | |
CN109541321B (en) | MOS transistor gate minimum signal capacitance test method and system | |
Li et al. | Study of the impact of hot carrier injection to immunity of MOSFET to electromagnetic interferences | |
CN102890230A (en) | Evaluating method of hot carrier injection degeneration performance | |
Huang et al. | Prediction of aging impact on electromagnetic susceptibility of an operational amplifier | |
CN107942220B (en) | A test method for bias temperature instability applied to MOS devices | |
Federspiel et al. | Experimental characterization of the interactions between HCI, off-state and BTI degradation modes | |
CN103376395A (en) | Test structure of transistor alternating current hot carrier injection characteristics | |
Pieper | Aging simulation with variation of several model parameters | |
Dubois et al. | Characterization and model of temperature effect on the conducted immunity of Op-Amp | |
CN103852700B (en) | A kind of method of testing of LDMOS device hot carrier injection effect | |
Keane et al. | An on-chip monitor for statistically significant circuit aging characterization | |
Lange et al. | Challenges and solution approaches for simulation-based reliability assessment–degradation modeling | |
Aharoni et al. | Empirical ESD simulation flow for ESD protection circuits based on snapback devices | |
Santini et al. | Non-homogenous gamma process: Application to SiC MOSFET threshold voltage instability | |
Dilli et al. | An enhanced specialized SiC power MOSFET simulation system | |
CN106597062B (en) | Current detecting system and method during integrated circuit device power supply electrifying | |
Parthasarathy et al. | Characterization and modeling nbti for design-in reliability | |
Delle Femine et al. | Easy-to-implement measurement method for the energy dissipated on board train with uncertainty estimation | |
Shvetsov-Shilovskiy et al. | Advanced system for CMOS SOI test structures measurements |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20130123 |
|
WD01 | Invention patent application deemed withdrawn after publication |