CN102882413A - Three-level inverter dead-time compensation algorithm based on modulated wave correction - Google Patents

Abstract

The invention discloses a three-level inverter dead zone compensation algorithm based on modulation wave correction, which includes a three-level inverter, the three-level inverter is a diode-clamped three-level inverter, and the diode clamp The bit-type three-level inverter includes three parallel-connected three-level bridge arms. The specific algorithm includes the following steps: by judging the current direction of the bridge arm, the positive and negative modulation waves, and the rising or falling edge of the triangular carrier in a switching cycle. The different states of the factors adjust the modulating wave accordingly, and then compare it with the triangular wave to obtain the PWM switching sequence. After adding the dead time, the driving signal of the switching tube after dead time compensation is obtained. The algorithm of the present invention can accurately compensate the dead zone effect in real time, not only can effectively reduce the 5th and 7th harmonics, prevent voltage and current waveform distortion, and will not cause delay of the output waveform, no need to add special hardware The detection device reduces the cost, and at the same time, the reliability and accuracy of the system can also be guaranteed.

Description

Three-level inverter dead area compensation algorithm based on the modulating wave correction

Technical field

The present invention relates to the dead area compensation algorithm field, be specifically related to a kind of three-level inverter dead area compensation algorithm based on the modulating wave correction, the dead area compensation of current transformer in the parallel network power generation that is particularly suitable for combining based on electric electronic current change technology and Computer Control Technology, the wind power generation homenergic transformation system.

Background technology

There is switch time-delay in power device, turn-offs if device of same brachium pontis need to turn-off, and complementary break-over of device with it then can cause straight-throughly, burns out device.Straight-through for preventing inverter, need to add the dead band to the triggering signal of complementation.In Dead Time, the pwm pulse forward position of expectation or rear along superposeing or reducing width corresponding to Dead Time, cause the distortion of output voltage and current waveform, amplitude reduces, low-frequency harmonics increases, the heavy maximum of accounting be 5 times and 7 subharmonic, ratio and modulation degree that Dead Time accounts for switch periods can affect the distortion degree.

Dead-zone compensation method has positive and negative by the judgement modulating wave in the sense of current at present, and a modulating wave corresponding to triangular wave cycle is carried out integral body adjustment, although can reach certain compensation effect, also can cause the time-delay of half Dead Time of output waveform.Some compensation methodes are based on the dead area compensation of pulse, by adding the conducting moment of hardware device sense switch device, carry out dead area compensation by revising ON time, this compensation way can not cause time-delay to output, but increased system cost, reliability also will reduce simultaneously.

Summary of the invention

The problem that will solve of the present invention is a kind of three-level inverter dead area compensation algorithm based on the modulating wave correction of defective proposition for present three-level current transformer dead-zone compensation method.

The technical solution used in the present invention is:

Three-level inverter dead area compensation algorithm based on the modulating wave correction, include three-level inverter, described three-level inverter is diode clamp type three-level inverter, diode clamp type three-level inverter includes three level brachium pontis of three parallel connections, it is characterized in that, specific algorithm may further comprise the steps:

(1) judge that modulating wave is positive and negative, the brachium pontis sense of current, a switch periods triangular carrier be rising edge or trailing edge;

(2) by three different conditions that affect factor in the step (1) modulating wave is adjusted accordingly;

Suppose that outflow of bus current three-level inverter direction is forward and reverse, Dead Time is T _d, switching frequency is f _c, modulating wave is u _r, the modulating wave correction that dead area compensation is corresponding is Δ u _r, Δ u _r=2T _df _c

1) when modulating wave greater than zero, electric current is greater than zero, during positive axis triangular wave trailing edge, and modulating wave is added modulating wave correction amount u _r, modulating wave is u after namely revising _r+ Δ u _r

2) when modulating wave greater than zero, electric current is less than zero, during positive axis triangular wave rising edge, and modulating wave is deducted modulating wave correction amount u _r, modulating wave is u after namely revising _r-Δ u _r

3) when modulating wave less than zero, electric current is greater than zero, during negative semiaxis triangular wave trailing edge, and modulating wave is added modulating wave correction amount u _r, modulating wave is u after namely revising _r+ Δ u _r

4) when modulating wave less than zero, electric current is less than zero, during negative semiaxis triangular wave rising edge, and modulating wave is deducted modulating wave correction amount u _r, modulating wave is u after namely revising _r-Δ u _r

(3) revised modulating wave and triangle wave obtain the PWM on off sequence, add Dead Time T _dSwitching tube after just obtaining afterwards compensating drives signal.

Beneficial effect of the present invention is:

Algorithm of the present invention can compensate real-time and accurately to dead time effect, not only can effectively reduce by 5 times and 7 subharmonic, prevent the voltage and current wave distortion, and can not cause the time-delay of output waveform, do not need to add the specialised hardware checkout gear, reduced cost, the reliability of simultaneity factor and accuracy also can be guaranteed.

Description of drawings:

Fig. 1 is the circuit topological structure schematic diagram of a bridge wall of diode clamp type three-level inverter.

Fig. 2 is dead time effect and the compensation schematic diagram when switching between 0 and 1 state.

Fig. 3 is dead time effect and the compensation schematic diagram when switching between 0 and-1 state.

Fig. 4 is that dead time effect is on the schematic diagram that affects of output current wave and phase voltage first-harmonic.

Fig. 5 be the two carrier waves of three level in the same way carrier wave send out ripple mode schematic diagram.

Fig. 6 is that the two reverse carrier waves of carrier wave of three level are sent out ripple mode schematic diagram.

Fig. 7 is a kind of three level dead area compensation algorithm schematic diagrames based on the modulating wave correction.

Fig. 8 is mutually output current wave and fft analysis schematic diagram of the carrier wave A that do not add dead area compensation and add when compensation in the same way.

Fig. 9 is mutually output current wave and fft analysis schematic diagram of the reverse carrier wave A that do not add dead area compensation and add when compensation.

Embodiment

The following describes in conjunction with Figure of description and analyze:

As shown in Figure 1, three-level inverter dead area compensation algorithm based on the modulating wave correction, include three-level inverter, described three-level inverter is diode clamp type three-level inverter, diode clamp type three-level inverter includes three level brachium pontis of three parallel connections, and specific algorithm may further comprise the steps:

(1) judge that modulating wave is positive and negative, the brachium pontis sense of current, a switch periods triangular carrier be rising edge or trailing edge;

(2) by three different conditions that affect factor in the step (1) modulating wave is adjusted accordingly;

Suppose that outflow of bus current three-level inverter direction is forward and reverse, Dead Time is T _d, switching frequency is f _c, modulating wave is u _r, the modulating wave correction that dead area compensation is corresponding is Δ u _r, Δ u _r=2T _df _c

1) when modulating wave greater than zero, electric current is greater than zero, during positive axis triangular wave trailing edge, and modulating wave is added modulating wave correction amount u _r, modulating wave is u after namely revising _r+ Δ u _r

2) when modulating wave greater than zero, electric current is less than zero, during positive axis triangular wave rising edge, and modulating wave is deducted modulating wave correction amount u _r, modulating wave is u after namely revising _r-Δ u _r

3) when modulating wave less than zero, electric current is greater than zero, during negative semiaxis triangular wave trailing edge, and modulating wave is added modulating wave correction amount u _r, modulating wave is u after namely revising _r+ Δ u _r

4) when modulating wave less than zero, electric current is less than zero, during negative semiaxis triangular wave rising edge, and modulating wave is deducted modulating wave correction amount u _r, modulating wave is u after namely revising _r-Δ u _r

(3) revised modulating wave and triangle wave obtain the PWM on off sequence, add Dead Time T _dSwitching tube after just obtaining afterwards compensating drives signal.

Principle of the present invention and illustrate as follows:

1, three-level inverter dead time effect and impact

Three-level inverter has 1,0 ,-1 three kind of on off state, and three kinds of states of corresponding output voltage are:

(1) V _Dc/ 2 states: VS ₁, VS ₂Conducting, VS ₃, VS ₄Turn-off;

(2) 0 state: VS ₂, VS ₃Conducting, VS ₁, VS ₄Turn-off;

(3)-V _Dc/ 2 states: VS ₃, VS ₄Conducting, VS ₁, VS ₂Turn-off;

On off state does not allow directly to switch between 1 state and-1 state, can only switch between 1 state and 0 state and-1 state and 0 state.

As an example of three-level inverter one phase brachium pontis example dead time effect and compensation principle are analyzed, as shown in Figure 1.

It is positive direction that rated current flows out the brachium pontis direction.U is voltage between A and the O point, and the relation between the sense of current and path and the on off state is as shown in table 1:

The relation in table 1 on off state and the sense of current and path

Wherein, d ₁The dead band state that inserts when representing to switch between 0 state and 1 state, d ₂The dead band state that inserts when representing to switch between 0 state and-1 state, i is output current.

When on off state switches, need to insert dead band state d between 0 and 1 ₁, dead time effect as shown in Figure 2.

When electric current for just, virtual voltage u is than desired voltage v in 0 → 1 handoff procedure _RefFew output time; When electric current was negative, actual voltage ratio, desired voltage u exported T more in 1 → 0 handoff procedure _dThe V of time _Dc/ 2.

When on off state switches, need to insert dead band state d between 0 and-1 ₂, dead time effect as shown in Figure 3.

When electric current for just, virtual voltage u is than desired voltage v in-1 → 0 handoff procedure _RefMany output T _dTime-V _Dc/ 2; When electric current was negative, virtual voltage u was than desired voltage v in 0 →-1 handoff procedure _RefExport less T _dTime-V _Dc/ 2.

2, dead time effect is on the impact of inverter output

By Fig. 2 and Fig. 3 analysis as can be known, the difference of actual output voltage and desirable output voltage is a pulse error voltage.According to equal time voltage areas method, error voltage can equivalence be square-wave signal, and its amplitude is: | Δ v|=f _cT _dV _Dc/ 2, its mean value:

$\mathrm{\&Delta;v}=\left\{\begin{array}{cc}{f}_c{T}_d{V}_{\mathrm{dc}}/2& i>0\\ {-f}_c{T}_d{V}_{\mathrm{dc}}/2& i<0\end{array}\right.---\left(1\right)$

Wherein, T _dBe Dead Time, f _cBe switching frequency, V _DcBe direct voltage, i is the brachium pontis output current.

It is carried out Fourier series decompose, can get the even-order harmonic amplitude is zero, and the odd harmonic amplitude is:

$\mathrm{\&Delta;v}=\frac{4\left|\mathrm{\&Delta;v}\right|}{\mathrm{\&pi;}}(\sin \mathrm{\&omega;t}+\frac{1}{3}\sin 3\mathrm{\&omega;t}+\frac{1}{5}\sin 5\mathrm{\&omega;t}+\frac{1}{7}\sin 7\mathrm{\&omega;t}+....)---\left(2\right)$

Its fundametal compoment effective value is:

, fundamental phase and opposite current.In three-phase three wire system, 3 subharmonic are converted into common-mode voltage, and the proportion that 5 times and 7 times account in the current harmonics that the dead band causes is larger.

Dead time effect on output first-harmonic impact as shown in Figure 4, wherein

Be the vector form of deviation voltage first-harmonic,

Be the vector form of actual output current i,

The vector form of actual output voltage u, φ is power-factor angle, namely

With

Angle, φ ' is

With

Angle,

Be desirable output voltage v _RefVector form, effectively Can push away according to Fig. 4:

$V/V_{\mathrm{ref}}=-\mathrm{\&eta;}\cos \mathrm{\&phi;}+\sqrt{1-{\mathrm{\&eta;}}^2{\mathrm{<figure-callout\; id="2"\; label="sin"\; filenames="HDA00001751986800021.png"\; state="\{\{state\}\}">sin</figure-callout>}}^2\mathrm{\&phi;}}---\left(3\right)$

$\mathrm{\&eta;}=\frac{\mathrm{\&Delta;V}}{V_{\mathrm{ref}}}=\frac{2k}{\mathrm{m\&pi;}}---\left(4\right)$

Wherein, 0＜η＜1, k=f _cT _dAccount for the ratio of switch periods for the dead band, m is modulation degree.

By formula (3) and (4) as can be known, dead time effect reduces the inverter output voltage amplitude, the phase generate skew.When m was constant, k was larger, and the dead band impact is more serious; When k was constant, m was less, and the dead band impact is more serious.

3, three level dead area compensation principles

The dead area compensation principle as shown in Figures 2 and 3, when electric current for just, 0 → 1 handoff procedure is with VS ₁The control signal rising edge shifts to an earlier date T _d-1 → 0 handoff procedure is with VS ₄Control signal rising edge hysteresis T _d

When electric current was negative, 1 → 0 handoff procedure was with VS ₁Control signal rising edge hysteresis T _d0 →-1 handoff procedure is with VS ₄The control signal rising edge shifts to an earlier date T _d

With VS ₁Control signal is the rear Dead Time VS that adds oppositely ₁Obtain VS ₃Control signal; With VS ₄Control signal is the rear Dead Time T that adds oppositely _dObtain VS ₂Control signal.Actual output voltage u is exactly desired voltage v after the compensation _Ref

A kind of three level dead area compensation algorithm schematic diagrames based on the modulating wave correction as shown in Figure 7.

Among the figure, u _rBe modulating wave, u _r=2T _df _cBe Dead Time corresponding modulating ripple correction, u _CPBe positive axis triangular carrier, u _CNBe negative semiaxis triangular carrier, k _PAnd k _NBe respectively positive axis triangular wave slope and close negative semiaxis triangular wave slope, greater than the null representation rising edge, less than null representation trailing edge, T _sBe switch periods, i is output current.

When modulating wave greater than zero, electric current is greater than zero, during positive axis triangular wave trailing edge, modulating wave is u after revising _r+ Δ u _r

When modulating wave greater than zero, electric current is less than zero, during positive axis triangular wave rising edge, modulating wave is u after revising _r-Δ u _r

When modulating wave less than zero, electric current is greater than zero, during negative semiaxis triangular wave trailing edge, modulating wave is u after revising _r+ Δ u _r

When modulating wave less than zero, electric current is less than zero, during negative semiaxis triangular wave rising edge, modulating wave is u after revising _r-Δ u _r

Revised modulating wave and triangular wave compared obtain pwm pulse, add the on off sequence after being compensated behind the dead band.Fig. 5 is carrier wave method ripple mode in the same way, and Fig. 6 is that reverse carrier wave is sent out the ripple mode.

4, simulating, verifying

Built three-phase tri-level inverter MATLAB/Sinmulink simulation model according to backoff algorithm, passive inverter, circuit parameter: load R=12 Ω, L=1.5mH, switching frequency f are adopted in emulation _c=10kHz, Dead Time T _d=6.6 μ s, direct voltage V _Dc=400V, frequency of modulated wave f _r=50Hz, modulation degree m=0.5.

Simulation waveform of the present invention such as Fig. 8 and shown in Figure 9.Wherein, A phase current waveform figure when Fig. 8 (a) does not add dead area compensation under the carrier mode in the same way, A phase current waveform fft analysis schematic diagram when Fig. 8 (b) does not add dead area compensation under the carrier mode in the same way, Fig. 8 (c) adds the A phase current waveform figure behind the dead area compensation in the same way under the carrier mode, and Fig. 8 (d) adds the A phase current waveform fft analysis schematic diagram behind the dead area compensation in the same way under the carrier mode; A phase current waveform figure when not adding dead area compensation under the reverse carrier mode of Fig. 9 (a), A phase current waveform fft analysis schematic diagram when not adding dead area compensation under the reverse carrier mode of Fig. 9 (b), Fig. 9 (c) oppositely adds the A phase current waveform figure behind the dead area compensation under the carrier mode, and Fig. 9 (d) oppositely adds the A phase current waveform fft analysis schematic diagram behind the dead area compensation under the carrier mode.

Fig. 8 (a) and Fig. 9 (a) illustrate that dead time effect causes the output waveform distortion most, and effective value reduces; Fig. 8 (b) and Fig. 9 (b) illustrate because the impact of dead time effect, and the low-frequency harmonics in the output waveform, particularly 5 times and 7 subharmonic content are very large; Fig. 8 (c), (d) and Fig. 9 (c), (d) illustrate that dead area compensation algorithm of the present invention can compensate effectively to dead time effect, improve output waveform and improve effective value, significantly reduce by 5 times and 7 subharmonic content of output waveform, and be applicable to different carrier systems.

Claims (1)

1. three-level inverter dead area compensation algorithm based on the modulating wave correction, include three-level inverter, described three-level inverter is diode clamp type three-level inverter, diode clamp type three-level inverter includes three level brachium pontis of three parallel connections, it is characterized in that, specific algorithm may further comprise the steps:

(1) judge that modulating wave is positive and negative, the brachium pontis sense of current, a switch periods triangular carrier be rising edge or trailing edge;

(2) by three different conditions that affect factor in the step (1) modulating wave is adjusted accordingly;

Suppose that outflow of bus current three-level inverter direction is forward and reverse, Dead Time is T _d, switching frequency is f _c, modulating wave is u _r, the modulating wave correction that dead area compensation is corresponding is Δ u _r, Δ u _r=2T _df _c

1) when modulating wave greater than zero, electric current is greater than zero, during positive axis triangular wave trailing edge, and modulating wave is added modulating wave correction amount u _r, modulating wave is u after namely revising _r+ Δ u _r

2) when modulating wave greater than zero, electric current is less than zero, during positive axis triangular wave rising edge, and modulating wave is deducted modulating wave correction amount u _r, modulating wave is u after namely revising _r-Δ u _r

3) when modulating wave less than zero, electric current is greater than zero, during negative semiaxis triangular wave trailing edge, and modulating wave is added modulating wave correction amount u _r, modulating wave is u after namely revising _r+ Δ u _r

4) when modulating wave less than zero, electric current is less than zero, during negative semiaxis triangular wave rising edge, and modulating wave is deducted modulating wave correction amount u _r, modulating wave is u after namely revising _r-Δ u _r

(3) revised modulating wave and triangle wave obtain the PWM on off sequence, add Dead Time T _dSwitching tube after just obtaining afterwards compensating drives signal.

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