CN102880576A - Method for simulating multiple groups of UART interfaces based on STM32F103VE chip - Google Patents
Method for simulating multiple groups of UART interfaces based on STM32F103VE chip Download PDFInfo
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Abstract
The invention relates to a method for simulating multiple groups of UART (universal asynchronous receiver/transmitter) interfaces based on an STM32F103VE (software transactional memory) chip, and the method comprises the following steps that A, at least two groups of GPIO (general purpose input/output) interfaces of the chip are adopted to serve as the simulating UART interfaces; B, when any one group of simulating UART interfaces have requests to send, a first timing device of the chip is ordered to start and is interrupted for once at set intervals, and the interruption in the course of sending simulates only a physical layer to send out TX (transmit) data bits of the multiple groups of simulating UART interfaces; and C, when an interruption request appears in any of RX (receive) pins of any group of simulating UART interfaces, the receiving request is triggered, and a second timing device is ordered to start simultaneously and is interrupted for once at set intervals; and in the course of the interruption, only receiving port states of all the simulating UART interfaces are sampled and stored in a buffer zone.
Description
Technical field the present invention relates to digital received and sent, particularly relates to the method based on the many groups of STM32F103VE chip simulation UART interface.
Background technology STM32F103VE chip and chip of the same type, generally only have two to three groups of UART(Universal Asynchronous Receiver/Transmitter, the Universal Asynchronous Receiver ﹠ dispensing device) interface surpasses substantially not having of five groups of UART interfaces.But the equipment of some application scenario, need more groups of UART interfaces to connect different hardware devices, for example pre-payment is monitored the water meter system collector, and nine UART interfaces of needs carry out simultaneously and work alone when design, and not so maximum five UART interfaces obviously satisfy the demand.If use the UART extended chip then price is high and circuit is complicated; As using the special-purpose many UART interface MCU of communication, its MCU cost is high, and its software and hardware development cost also raise with this, learns again new development environment in the performance history and will do a large amount of document readings, develops and poor controllability.
The summary of the invention the technical problem to be solved in the present invention is to avoid above-mentioned the deficiencies in the prior art part and proposes a kind of method based on the many groups of STM32F103VE chip simulation UART interfaces; The method can realize that more groups are worked and separate UART interface simultaneously on the basis of existing hardware, the needs that connect to satisfy devices communicating, and need not increase or adopt more expensive hardware, economize on hardware cost.
The present invention solve the technical problem can be by realizing by the following technical solutions:
Propose a kind of method based on the many groups of STM32F103VE chip simulation UART interface, comprise the steps,
A. at least two group GPIO mouths of selected chip are as simulation UART interface;
B. when in each group simulation UART interface arbitrary group when the request of transmission is arranged, make the first timer of chip start, first timer interrupts once at set intervals, so that simulation UART interface is finished the transmission task, only interrupt analog physical layer just during transmission and will organize the TX data bit of simulation UART interface more and send, and the notification data link layer is organized the data bit that will send;
C. arbitrary interrupt request that occurs then triggers the request of reception in the RX pin of each group simulation UART interface, second timer with seasonal chip starts, second timer interrupts once at set intervals, only sample during interruption and respectively simulate UART interface iSCSI receiving end mouth state and be saved in buffer zone, when receiving position of rest, data are sent to the filtering of analog physical layer line number word to obtain receiving byte, again the byte data that receives is passed to data link layer afterwards, finally pass to application layer by network layer.
The multipotency of the inventive method is simulated eight groups of UART interfaces.
Compare with prior art, the technique effect that the present invention is based on the method for the many groups of STM32F103VE chip simulation UART interface is: 1. eight groups of GPIO mouths (the General Purpose Input Output that takes full advantage of the STM32F103VE chip, universal input/output) and the existing resource of two timers, simulate 2-8 group UART interface, the needs of the more UART interfaces of equipment needs have been satisfied, and need not increase or adopt the more expensive hardware such as chip, the economize on hardware cost; 2. many groups UART interface of simulation is just different in the Physical layer performance from other MCU internal hardwares UART, and other each layers are identical, greatly made things convenient for transplanting and the HardwareUpgring of program.
Description of drawings
Fig. 1 is the transmission flow schematic diagram of simulation UART interface;
Fig. 2 is the reception schematic flow sheet of simulation UART interface.
Embodiment is described in further detail below in conjunction with the preferred embodiment shown in the accompanying drawing.
The embodiment of the invention is organized the methods of UART interface more based on the simulation of STM32F103VE chip, comprises the steps,
A. at least two group GPIO mouths of selected chip are as simulation UART interface;
B. as shown in Figure 1, when in each group simulation UART interface arbitrary group when the request of transmission is arranged, make the first timer of chip start, first timer interrupts once at set intervals, so that simulation UART interface is finished the transmission task that is not less than 9600bps, only interrupt analog physical layer just during transmission and will organize the TX data bit of simulation UART interface more and send, and the notification data link layer is organized the data bit that will send;
C. as shown in Figure 2, arbitrary interrupt request that occurs then triggers the request of reception in the RX pin of each group simulation UART interface, second timer with seasonal chip starts, second timer interrupts once at set intervals, only sample during interruption and respectively simulate UART interface iSCSI receiving end mouth state and be saved in buffer zone, when receiving position of rest, data are sent to the filtering of analog physical layer line number word to obtain receiving byte, again the byte data that receives is passed to data link layer afterwards, finally pass to application layer by network layer.
Because the STM32F103VE chip has eight groups of GPIO mouths to utilize, so the multipotency of the inventive method is simulated eight groups of UART interfaces.
Needs according to equipment connection, the UART interface of simulation can be selected arbitrarily to set in the 2-8 group, the common ground of design is: Interruption just carries out the input and output of GPIO, move consuming time extremely short, the transmitting-receiving of data bit is processed in the task of all being placed on simulation UART interface Physical layer, and interface of every increase is then added the example of a Physical layer task.Difference is, UART interface group number what are simulated as required, and the length of the time between interruptions of respective design first timer and second timer is to guarantee the stable operation of device systems.The below is to be applicable to pre-payment monitoring water meter acquiring device, and needing four groups of UART interfaces of simulation is example, in conjunction with Fig. 1 and Fig. 2, the principle process of the sending and receiving of Imitating UART interface is described, other group number just repeats no more herein.
Data send: as shown in Figure 1, when in four groups of simulation UART interfaces arbitrary group when the request of transmission is arranged, make the first timer of chip start, first timer interrupts once every 104.17us, so that simulation UART interface is finished the transmission task that is not less than 9600bps, only interrupt analog physical layer just during transmission and will organize the TX data bit of simulation UART interface more and send, and the notification data link layer is organized the data bit that will send; Interrupt routine is extremely short.
Data receiver: as shown in Figure 2, arbitrary interrupt request that occurs then triggers the request of reception in the RX pin of four groups of simulation UART interfaces, second timer with seasonal chip starts, second timer interrupts once every 17.36us, only sample during interruption and respectively simulate UART interface iSCSI receiving end mouth state and be saved in buffer zone, when receiving position of rest, data are sent to the filtering of analog physical layer line number word to obtain receiving byte, again the byte data that receives is passed to data link layer afterwards, finally pass to application layer by network layer.Interruption has just carried out the sampling of GPIO, and its execution time is extremely short, can not impact to system.Because repeatedly a data bit is determined in sampling, the reliability of its data communication is protected.
Above content is in conjunction with concrete optimal technical scheme further description made for the present invention, can not assert that implementation of the present invention is confined to these explanations.For the general technical staff of the technical field of the invention, without departing from the inventive concept of the premise, can also make some simple deduction or replace, all should be considered as belonging to protection scope of the present invention.
Claims (4)
1. methods based on the many groups of STM32F103VE chip simulation UART interfaces is characterized in that: comprise the steps,
A. at least two group GPIO mouths of selected chip are as simulation UART interface;
B. when in each group simulation UART interface arbitrary group when the request of transmission is arranged, make the first timer of chip start, first timer interrupts once at set intervals, so that simulation UART interface is finished the transmission task, only interrupt analog physical layer just during transmission and will organize the TX data bit of simulation UART interface more and send, and the notification data link layer is organized the data bit that will send;
C. arbitrary interrupt request that occurs then triggers the request of reception in the RX pin of each group simulation UART interface, second timer with seasonal chip starts, second timer interrupts once at set intervals, only sample during interruption and respectively simulate UART interface iSCSI receiving end mouth state and be saved in buffer zone, when receiving position of rest, data are sent to the filtering of analog physical layer line number word to obtain receiving byte, again the byte data that receives is passed to data link layer afterwards, finally pass to application layer by network layer.
2. methods based on the many groups of STM32F103VE chip simulation UART interfaces as claimed in claim 1 is characterized in that: multipotency is simulated eight groups of UART interfaces.
3. as claimed in claim 1 based on the STM32F103VE chip simulation methods of organizing the UART interface, it is characterized in that: the traffic rate of each described simulation UART interface is not less than 9600bps more.
4. as claimed in claim 1 based on the STM32F103VE chip simulation methods of organizing the UART interface, it is characterized in that: the method is applicable to pre-payment monitoring water meter acquiring device more.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2017049556A1 (en) * | 2015-09-24 | 2017-03-30 | 广东欧珀移动通信有限公司 | Data transmission method and mobile terminal |
| CN110297800A (en) * | 2019-06-29 | 2019-10-01 | 飞天诚信科技股份有限公司 | The realization method and system of stabilized communication between a kind of main control chip and safety chip |
| US12314199B2 (en) | 2021-10-06 | 2025-05-27 | Samsung Electronics Co., Ltd. | Electronic device for processing data and method thereof |
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| CN201936300U (en) * | 2010-12-08 | 2011-08-17 | 广东高新兴通信股份有限公司 | Device for expanding USB (Universal Serial Bus) into multi-path serial ports |
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| CN201936300U (en) * | 2010-12-08 | 2011-08-17 | 广东高新兴通信股份有限公司 | Device for expanding USB (Universal Serial Bus) into multi-path serial ports |
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| LIREN0: "《http://download.csdn.net/detail/liren0/4037791》", 31 January 2012 * |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2017049556A1 (en) * | 2015-09-24 | 2017-03-30 | 广东欧珀移动通信有限公司 | Data transmission method and mobile terminal |
| CN108027744A (en) * | 2015-09-24 | 2018-05-11 | 广东欧珀移动通信有限公司 | Data transmission method and mobile terminal |
| US10248611B2 (en) | 2015-09-24 | 2019-04-02 | Guangdong Oppo Mobile Telecommunications Corp., Ltd. | Data transmission method and mobile terminal |
| CN108027744B (en) * | 2015-09-24 | 2021-08-31 | Oppo广东移动通信有限公司 | Data transmission method and mobile terminal |
| CN110297800A (en) * | 2019-06-29 | 2019-10-01 | 飞天诚信科技股份有限公司 | The realization method and system of stabilized communication between a kind of main control chip and safety chip |
| US12314199B2 (en) | 2021-10-06 | 2025-05-27 | Samsung Electronics Co., Ltd. | Electronic device for processing data and method thereof |
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Effective date of registration: 20190213 Address after: 563100 U-shaped workshop in Loushanguan High-tech Industrial Development Zone, Three Villages, Chumi Town, Tongzi County, Zunyi City, Guizhou Province Patentee after: Guizhou Huaxu Technology Co., Ltd. Address before: 518103 Huaxu Industrial Park, Phoenix Third Industrial Zone, Fuyong Street, Baoan District, Shenzhen City, Guangdong Province Patentee before: Shenzhen Huaxu Science and Technology Development Co., Ltd. |
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