CN102856332A - Large-size four-transistor active pixel sensor (4T APS) for rapidly transferring charges - Google Patents

Abstract

The invention relates to a large-size 4T APS for rapidly transferring charges and aims to improve the charge transfer efficiency and reduce charge residues. The utilized technical scheme is that the large-size 4T APS comprises a pinned photodiode area, a pass transistor transmission gate (TG) and a reset transistor (RST), a source follower (SF) and a strobe transistor single event latch-up (SEL). The pinned photodiode area and pass transistor TG grid electrodes are in U-shaped structures, and axes of the two U-shaped structures are overlapped and the two U-shaped structures are opened in a same direction. Pass transistor TG grids are arranged at the bottom of the U-shaped structure of the pinned photodiode area and arranged to be partially overlapped with the bottom of the U-shaped structure of the pinned photodiode area. The pinned photodiode area is extended towards the opening direction along the axis of the U-shaped structure to form an extended area parallel with two arms of the U-shaped structure. A floating diffusion (FD) area and a grid electrode and a leakage electrode of the RST are arranged successively nearby the bottom axis of the U-shaped structure of the pinned photodiode area and in the extended area. The large-size 4T APS for rapidly transferring charges is mainly used for designing and manufacturing pixel sensors.

Description

Large size four-tube active pixel sensor with fast charge transfer

technical field

The invention relates to a structure of a 4T pixel with fast charge transfer, in particular, a large-size four-tube active pixel sensor with fast charge transfer.

Background technique

With the continuous reduction of the standard CMOS logic process and the continuous improvement of the CMOS image sensor (CMOS Image Sensors, CIS) manufacturing process, the CMOS image sensor continues to exert its advantages over the CCD image sensor in terms of integrability, power consumption, and random addressing. Relative advantages, becoming the mainstream device in the field of solid-state image sensors. Pinned-Photodiode Four Transistors-Active Pixel Sensor (PPD 4T-APS) based on clamping diodes has the characteristics of low dark current, reset noise elimination and low image smearing, and is currently the main pixel used in CIS structure.

The basic structure of PPD 4T-APS is shown in Figure 1, where 1 is the P-type substrate, 2 is the N region of the clamp diode, and 3 is the surface clamp layer. 4 and 6 are the gates of the transfer transistor TG and the reset transistor RST respectively, 5 is the source shared by TG and RST, also known as the floating diffusion area (Floating Diffusion, FD), 7 is the drain of the RST, Connected to the pixel power supply voltage VDD, 4-7 together form a transmission transistor TG and a reset transistor RST, which are used to realize the transfer of light-induced charges and the reset of the clamping diode. The gate of the source follower SF is connected to FD, the drain is connected to VDD, the source is shared with the gate SEL, the drain of SEL is connected to the column bus (Column Bus, CB), and SF and SEL together constitute the pixel buffer The readout device is used for reading out the photo-generated voltage signal converted by the photo-induced charge. In the above structure, the photogenerated charge collected in the PD needs to be transferred to the FD after reset through the transmission channel under the TG gate, so as to cause the voltage of the FD to change, and finally form a photogenerated voltage signal.

Before the PD is exposed, the charge stored in the clamping diode N region (2) needs to be transferred to the FD node (6) to completely deplete this region. Failure to achieve complete charge transfer will result in large random noise and image retention. Due to the larger charge storage area of the large-size pixel and the longer distance from the TG gate (4), it is easy to have charge residue in the middle of the clamp diode N region (2), especially in the clamp diode N region (2). A buildup of charge occurs in the middle. Reducing the doping concentration and depth of the n-region (2) of the clamping diode can improve this problem but will lead to a decrease in well capacity and absorption efficiency of long-wavelength light.

Contents of the invention

The invention aims to overcome the deficiencies of the prior art, improve the efficiency of charge transfer and reduce charge residue. In order to achieve the above object, the technical solution adopted by the present invention is that the large-scale four-tube active pixel sensor with rapid charge transfer includes a clamping diode region, a transfer transistor TG and a reset transistor RST, a source follower SF, and a gate transistor SEL. , the clamping diode area and the transmission tube TG grid are both U-shaped structures, the axes of the two U-shaped structures coincide and the openings are in the same direction, the transmission tube TG grid is set at the bottom of the U-shaped structure in the clamping diode area, and the transmission tube TG grid The pole setting overlaps with the bottom part of the U-shaped structure in the clamping diode region; the clamping diode region extends along the axis of the U-shaped structure toward the opening direction to form an extended region parallel to the two arms of the U-shaped structure, at the bottom of the U-shaped structure in the diode region The floating diffusion region FD, the gate stage of the reset transistor RST, and the drain stage of the RST are sequentially arranged near the axis and on the extended area.

The two arms of the U-shaped structure in the clamping diode region extend in the opposite direction toward the opening of the U-shaped structure to form an H-shaped structure; the U-shaped structure of the transmission tube TG grid only retains two arms, which are symmetrically arranged at both ends of the horizontal bar in the middle of the H-shaped structure. Only the U-shaped structure of the transmission tube TG grid retains the controlled timing of the two arms and is completely synchronized.

Technical characteristics and effects of the present invention:

The width of the clamping diode region is reduced, and charge accumulation is not easy to occur in the middle of the N-region of the clamping diode;

The length of the TG gate is increased, and the charge is transferred from multiple directions to the FD node at the same time, and because the average distance between the clamping diode region and the gate is shortened, the electric field is enhanced, and the charge transfer speed is improved;

Due to the reduction of the width of the clamp diode region, the range of the doping concentration and depth of the clamp diode N region can be moderately relaxed, and the well capacity and the absorption efficiency of long-wavelength light can be improved.

Description of drawings

FIG. 1 is a schematic diagram of the principle of a 4T active pixel.

FIG. 2 is a top view of a conventional pixel structure. _LTG in the figure is the gate length, which refers to the length in the vertical direction of the intersection line between the gate and the source or drain region. L _OL is the length of the overlap region.

FIG. 3 is a top view of the pixel structure of the first example of the present invention.

FIG. 4 is a top view of the pixel structure of the second example of the present invention.

FIG. 5 is a pixel circuit diagram of the second example of the present invention.

Detailed ways

The present invention adjusts the rectangular clamping diode region of a general large-size pixel into an axisymmetric U-shaped structure or two separate parts, and connects to the FD node through a U-shaped TG grid or two TG grids. The efficiency of charge transfer is improved and charge residue is reduced by reducing the average distance from the charge transfer in the clamp diode region to the TG gate.

As shown in FIG. 2, the clamping diode region (1-3) of a conventional pixel is generally designed as a rectangle. When the size of the pixel increases, the distance between the charge storage region and the gate becomes relatively far, and charge accumulation tends to occur in the middle of the rectangular clamp diode region. The invention adjusts the shape of the clamping diode region (1-3) of the pixel, shortens the average distance between the charge transmission and the TG gate (4), and enables the large-size pixel to realize the charge transfer effect close to that of the small-size pixel.

Embodiment 1 of the present invention: the upper and lower parts of the pixel junction are completely symmetrical, and the size of the pixel is generally between 5 μm×5 μm˜15 μm×15 μm. Both the clamping diode region (1-3) and the TG gate of the pixel are U-shaped structures, and the length of the TG gate (4) is generally between 0.5 μm and 2 μm, and the overlap with the clamping diode region (1-3) The area is between 0 μm and 0.5 μm. The FD node, the reset transistor RST, the source follower, and the row selection transistor are located in the middle of the pixel, surrounded by U-shaped clamping diode regions (1-3).

Embodiment 2 of the present invention: the upper and lower parts of the pixel structure are completely symmetrical, and the size of the pixel is generally between 5 μm×5 μm˜15 μm×15 μm. The clamping diode region (1-3) of the pixel is divided into two symmetrical parts, which are located at the FD node (5), the reset transistor RST (6), the source follower (9), and the two sides of the row selection transistor SEL (11) side, connected to FD node (5) by TG gate (4a) and TG gate (4b) respectively. The length of the TG gate (4) is generally between 0.5 μm and 2 μm, and the overlapping area with the clamping diode region (1-3) is between 0 μm and 0.5 μm. The TG gates 4a and 4b are controlled with the same timing.

Embodiment 1 of the present invention: a top view of the pixel structure is shown in FIG. 3 , the size of the pixel is 10 μm×10 μm; the clamping diode region ( 1 - 3 ) of the pixel is a U-shaped structure with a symmetrical shape. The TG grid (4) is located inside the U-shaped clamping diode region (1-3), and the TG grid (4) is also a U-shaped structure. The length of the TG grid (4) is 0.7 μm, and the clamping diode region (1-3) is 3) The overlapping area is 0.1 μm. The FD node (5), the reset transistor RST (6), the source follower (9), and the row selection transistor SEL (11) are located in the opening of the U-shaped clamping diode region (1-3).

Embodiment 2 of the present invention: the top view of the pixel structure is shown in Figure 4, the size of the pixel is 10 μm×10 μm; the clamping diode region (1-3) of the pixel is divided into completely symmetrical (1-3a) and (1-3b) Two parts; the clamping diode regions (1-3a) and (1-3b) are respectively connected to the FD node (5) by two independent TG gates 4a and 4b; the length of the TG gate (4) is 0.7 μm, and The overlapping area of the clamping diode regions (1-3) is between 0.1 μm. The FD node (5), the reset transistor RST (6), the source follower (9), and the row selection transistor SEL (11) are all located between the pixel clamping diode regions (1-3a) and (1-3b). The circuit structure diagram of the pixel is shown in Fig. 5, the TG gate (4a) and the TG gate (4b) are connected together, and the charge transfer is controlled by the same control signal.

Claims (2)

1. the large scale four of an electric charge fast transfer is managed CMOS active pixel sensor, comprise clamp diode district, transfer tube TG and reset transistor RST, source class follower SF, gate tube SEL, it is characterized in that, clamp diode district and transfer tube TG grid are U-shaped structure, the dead in line of two U-shaped structures, opening are in the same way, transfer tube TG grid is arranged on the bottom of the U-shaped structure in clamp diode district, and transfer tube TG grid arranges with the base section of the U-shaped structure in clamp diode district overlapping; The clamp diode district prolongs the formation prolongation zone parallel with U-shaped structure two arms along the axis of U-shaped structure towards opening direction, reaches the prolongation zone and be disposed with the grid level of floating empty diffusion region FD, reset transistor RST, the leakage level of RST near the bottom axis of the U-shaped structure of diode region.

2. the large scale four pipe CMOS active pixel sensor of electric charge fast transfer as claimed in claim 1 is characterized in that, two arms of the U-shaped structure in clamp diode district form H type structure towards U-shaped structural openings direction reverse extending; The U-shaped structure of transfer tube TG grid only keeps two arms, is symmetricly set on the middle whippletree of H type structure two ends, the controlled sequential Complete Synchronization of two arms that the U-shaped structure of transfer tube TG grid only keeps.

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