CN102782829B - 具有非均匀真空分布的裸芯安装端部 - Google Patents
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Abstract
公开一种系统,用于在晶片切片工艺中分开半导体裸芯与固定裸芯的带。所述系统包括拾取臂,用于将真空端部定位在要移除的半导体裸芯上。所述真空端部包括真空孔的非均匀阵列以抓取半导体晶片。
Description
技术领域
实施例涉及将切片的半导体裸芯与粘接带分离的系统。
背景技术
便携式消费者电子装置销量上的迅猛发展推动高容量存储装置的需求。诸如闪存存储卡的非易失性半导体存储装置正变为广泛用于满足数字信息存储和交换的不断发展的需要。它们的便携性、多功能性以及坚固耐用的设计,伴随着它们的高可靠性和大容量,已经使这样的存储装置理想地用于广泛种类的电子装置,所述电子装置例如包括数字照相机、数字音乐播放器、电子游戏机、PDA和移动电话。
尽管已经知晓广泛种类的封装构造,但是闪存存储卡通常可制作为系统封装(SiP)或者多芯片模块(MCM),其中多个裸芯以所谓的三维堆叠构造安装在基板上。传统半导体封装体20(没有模塑化合物)的侧视图显示在现有技术图1中。典型的封装体包括安装在基板26上的多个半导体裸芯22、24。虽然图1中没有示出,但是半导体裸芯在裸芯的上表面上形成有引线键合焊垫。基板26可由上下导电层之间夹着的电绝缘核形成。上和/或下导电层可被蚀刻以形成导电图案,导电图案包括电引线和接触焊垫。引线键合30连接在半导体裸芯22、24的引线键合焊垫和基板26的电引线之间,以电连接半导体裸芯到基板。基板上的接触焊垫进而提供裸芯和主装置之间的电通道。一旦裸芯和基板之间进行电连接,所述组件然后典型地封入模塑化合物中以提供保护封装体。
为了形成半导体封装体,执行裸芯安装(die attach)工艺,在所述工艺中,半导体裸芯从晶片切片,从粘接带上拾取,并且接合到基板。现有技术图2示出了晶片40,其包括多个半导体裸芯,例如裸芯22(图2中仅标号了其中的一些)。晶片40上的每个半导体裸芯22已经被加工为包括本领域已知的集成电路,其能够执行特定的电子功能。在为不好的裸芯而测试裸芯22后,晶片可设置在粘接剂膜44(称为裸芯安装膜(DAF)带)上,然后例如通过锯或激光切片。DAF带可由粘接到带上的裸芯安装膜形成,并且在裸芯与所述带分开时,所述膜可保持固定到裸芯的底表面。切片工艺将晶片分成单独的半导体裸芯22,其保持固定到DAF带。图2示出了固定到DAF带44的晶片40。
为了分离单独的裸芯,晶片和DAF带被设在加工工具中,其一部分显示于现有技术图3中。图3示出了裸芯脱离工具50,其包括真空卡盘52,在真空卡盘52上支撑晶片40和DAF带44。为了从DAF带44剥离裸芯,拾取工具60设置为包括真空端部62。拾取工具60降落在裸芯22上,以使其从DAF带44上移除,真空施加给端部62,并且裸芯22上拉而离开带44。拾取工具然后传输用于安装的裸芯22到基板或传输到别的地方。
图4示出了传统真空端部62的仰视图。端部包括多个真空孔64,在图4中标出了其中的一些,所述真空孔用于给真空端部62的表面连通负压。真空孔64上的负压将裸芯22保持在拾取工具60上。在传统的真空端部中,真空孔64均匀地分布在端部的表面上,例如如图4所示。
传统真空端部的一个缺点是,虽然真空孔64在裸芯的表面上施加均匀的压强以使裸芯从DAF带剥离,但是裸芯不是以均匀的压强从DAF带剥离。具体地讲,在用刀片分割晶片期间,刀片导致在裸芯要切割的边缘附近的剪切和法向力。剪切和法向力在裸芯的边缘增加了裸芯和DAF带之间的粘接力。这些粘接力是距裸芯边缘的距离x的函数,并且随着距裸芯边缘的距离的平方而减小。在一个示例中,DAF带施加到裸芯的粘接力F(x)与某常数K成比例,除以距裸芯边缘的距离x的平方:
F(x):K/(1+x2)
常数K是不同粘接机制导致的不同常数的总和。例如,化学接合发生在粘接剂和切片带(dicing tape)之间,其化学接合可在由于用刀片或激光切割引起的加热时被加强。另外,作为切片的结果,静电力也可产生在裸芯边缘附近。此外,范德瓦尔斯力发生在DAF和切片带的分子内。
现有技术图5显示了由真空端部62产生在裸芯22上的向上力Fu以及由于裸芯22和DAF带44之间的粘接产生在裸芯22上的向下力Fd。如上所述,在真空端部的向上力是均匀的情况下,向下力随着距边缘的距离的平方变化。现有技术图5示出了由于向上力Fu和向下力Fd在裸芯上的所得的净力Fn。如图6所示,裸芯22上的净力从裸芯的边缘朝着中间变大。
所述不均匀力分布的最终结果是,在传统的裸芯脱离工具中裸芯22从DAF带由真空端部62取下时,裸芯22可能弯曲。这样的情形示出在现有技术图7中。裸芯的弯曲可具有几个有害的效果。裸芯可能不固定在真空端部62上,并且可能离开端部62。而且,裸芯可在其弯曲时产生裂纹,和/或半导体裸芯22的表面上形成的导电迹线可能在裸芯弯曲或移动时被损坏,从而对相邻导电迹线短路。现今在半导体裸芯的厚度在某些示例中已经减小到40或50微米(μm)的情况下,这尤其如此。
即使在裸芯没有发生这样的损坏的情况下,在弯曲的裸芯安装在基板(例如现有技术图8所示的基板70)上时,也可能发生进一步的问题。如果裸芯22对基板70的表面为凹陷形状,则气泡72可形成在裸芯和基板之间。这些气泡可能导致裸芯与基板因为气泡的膨胀而脱离,例如当裸芯和基板在包封工艺中被加热时。
附图说明
图1是现有技术的传统半导体装置的端面图。
图2是现有技术的在DAF带上安装的半导体晶片的示意图。
图3是现有技术的传统脱离工具的侧视图,所述脱离工具用于将晶片上的半导体裸芯与DAF带分离。
图4是现有技术的图3的拾取工具中的传统真空端部的仰视图。
图5示出了由于拾取工具的真空力引起的裸芯的截面上的向上力分布以及由于DAF带上的裸芯的粘接力引起的裸芯的相同截面上的向下力分布。
图6示出了图5的向上力和向下力产生的净力。
图7示出了具有传统真空端部的拾取工具上的弯曲裸芯。
图8示出了由传统真空端部取下的弯曲裸芯安装在基板上。
图9是示出本技术实施例操作的流程图。
图10是根据本技术实施例的安装于粘接带上的半导体晶片的俯视图。
图11是根据本技术实施例的脱离工具的示意图。
图12是根据本技术实施例的真空端部的仰视图。
图12A是具有示范性尺寸的图12的真空端部的仰视图。
图13示出了由于拾取工具的实施例的真空力引起的裸芯截面上的向上力分布和由于粘接带上的裸芯的粘接力引起的裸芯相同截面上的向下力分布。
图14示出了图13的向上力和向下力产生的净力。
图15示出来了本技术的拾取工具上支撑的平面裸芯。
图16示出了根据本技术的在基板上安装的平面裸芯。
图17示出了由于拾取臂的选择性实施例的真空力引起的裸芯的截面上的向上力分布和由于粘接带上的裸芯的粘接力引起的相同截面上的向下力分布。
图18示出了由图17的向上力和向下力产生的净力。
图19示出了本技术的拾取臂上支撑的平面裸芯。
图20示出了根据本技术的在基板上安装的平面裸芯。
图21-25是根据本技术进一步实施例的真空端部的选择性构造的仰视图。
图26是包括由本系统形成的半导体裸芯的最终半导体封装体的侧视图。
具体实施方式
现在,将参考图9至26描述实施例,其涉及采用非均匀真空力分布从粘接带上脱离裸芯的系统和方法。在实施例中,在真空端部上产生非均匀真空力分布,从而在真空端部从粘接带上拉下裸芯时,沿着半导体裸芯的周边施加相对高的拾取力。应当理解的是,本发明可以很多不同的形式实施,而不应解释为限于在此阐述的实施例。而是,提供这些实施例以使所述公开透彻且完整,并且将本发明全面地交流给本领域的技术人员。当然,本技术旨在覆盖这些实施例的替换、修改和等同物,其包括在所附权利要求限定的本发明的范围和精神内。此外,在下面的本发明的详细描述中,阐述了很多具体细节,以便提供本发明的透彻理解。然而,本领域的普通技术人员应当清楚的是,本发明可不用这样的具体细节而实现。
这里采用的任何术语“顶”和“底”、“上”和“下”及这些术语的衍生术语仅为便利和说明的目的,而不意味着限制半导体装置的描述,因为所指的项目可交换位置。
总体上,实施例涉及裸芯脱离工具中采用的拾取工具的真空端部。裸芯脱离工具设置为从其上支撑切片后的晶片的粘接带组件移除裸芯,并且将裸芯传输离开晶片。尽管粘接带组件可为DAF带,但是应理解可采用各种不同类型的带和带组件,其用于在裸芯脱离工具中保持切片后的半导体晶片在一起。
现将参考图9的流程图和图10至26的视图描述本系统的实施例的运行。在步骤100中,半导体裸芯形成在晶片上并且被测试。在步骤102中,晶片的背面可经受背面研磨工艺,然后可安装在粘接带上,例如,已知设计方案的DAF带。然后可在步骤104中将晶片切片成单独的半导体裸芯。图10示出了半导体晶片200,其包括安装在粘接带206上的多个切片的裸芯204。在一个示例中,裸芯204可从晶片200上切片,以具有12.96mm的长度、9.28mm的宽度和46μm的厚度。应当理解的是,这些尺寸仅为示例,并且在替代的实施例中可变化。
粘接带206可为已知结构的DAF带,并且包含带层,所述带层例如可由聚酯等形成,与粘接性的裸芯安装膜层叠。DAF带可采用的一个示例是EM-310VJ-P WEF,来自Nitto Denko,Corporation,总部在日本大阪。在晶片固定到DAF带上后,可采用各种已知的切片技术,例如锯开或激光切割,将晶片切割成单独的半导体裸芯。典型的切片工艺在安装在带上的相邻的裸芯之间留下小的切口。
在步骤108中,带和晶片然后可转移到脱离工具220(图11),以移除单独的裸芯。脱离工具220可类似于背景技术部分中描述的脱离工具,或者类似于任何其它已知的从粘接带上移除半导体裸芯的工具,不同的是所述工具包括新颖的真空端部230。晶片200和粘接带206设置在支撑台222上,其中粘接带206设置为抵靠支撑台222的上表面。支撑台222可包括真空卡盘,用于在其上牢固地保持粘接带206和晶片200。
脱离工具220还可包括拾取工具224,其包括真空端部230。拾取工具安装在机械臂上,机械臂控制为从切片的晶片200拾取各裸芯204,并且将拾取的裸芯传送到别处,例如如下面所说明的基板上。真空端部230可由固定到拾取工具224的一层橡胶形成,尽管真空端部230在进一步的实施例中可由其它材料形成。
如图12所示,真空端部230可包括形成在其中的多个真空孔234,图12示出了其中一部分。根据本技术的各方面,真空孔234可在真空端部230的表面上非均匀地分布。具体地讲,孔234可朝着真空端部230的边缘更加密集,并且朝着真空端部230的中间更加稀疏。这样的朝着真空端部230的边缘具有较高密度真空孔234的构造导致朝着真空端部230的边缘较大的真空拾取力。
图12A是具有示范性尺寸列表的图12真空端部230的示意图。在一个非限定的示例中,图12A上a至l的尺寸可为如下:
a.=523μm
b.=386μm
c.=494μm
d.=469μm
e.=2230μm
f.=4000μm
g.=2368μm
h.=823μm
i.=4237μm
j.=3490μm
k.=12371μm
1.=9407μm
如所示,这些尺寸的每一个都仅为示例,并且在进一步实施例中每一个可彼此成比例或不成比例变化。
真空孔234在裸芯上施加的拾取力等于真空孔234上的裸芯相对侧上的压强差乘以真空孔的面积。裸芯204抵靠真空孔的第一侧上的压强可为真空孔234中的压强,其可约为或接近于零大气压。裸芯的与第一侧相对的第二侧上的压强可为大气压。因此,在一个示例中,真空孔234上的压强差可约为大气压强。
真空孔的面积由πr2给出。采用上面的示例,则真空孔234的直径(2r)为823μm,真空孔234的面积为0.532mm2或0.000824in2。
由这些值可见,可计算在一个示例中一个真空孔234的拾取力。采用上述的压强差为约大气压强(14.7lbs/in2)且面积为0.000824in2的示例,则一个真空孔的拾取力可为0.012lbs。所述值为大约的且仅为示例。每个真空孔234提供所述拾取力。在图12A所示的尺寸的情况下,可计算由所有真空孔234施加在裸芯204上的力。可见,由于真空孔234在边缘的较高密度,拾取力在裸芯204的边缘比在中心更高。
孔234的每一个都连接到真空源(未示出)。因此,在施加真空力时,负压与真空孔234相通。真空端部230上具有较大真空孔密度的区域对于保持在真空端部230上的半导体裸芯204施加较大的拾取力。
如图13所示,真空孔的图案设置为在裸芯204的截面上产生向上力分布Fu。力分布Fu总体上与由于裸芯204和粘接带206之间的粘接力引起的裸芯204的相同截面上的向下力分布Fd成比例。图13所示的向上和向下力分布可通过垂直于裸芯204的主平面(上和下)的裸芯204的任何截面取得。
如背景技术中所述,裸芯204上的向下力Fd总体上随着距边缘的距离x的平方变化:F(x):K/(1+x2)(可替换地采用其它等式描述由于粘接引起的向下力)。在实施例中,真空孔可朝着边缘设置有较大的密度,从而向上力Fu也可随着距边缘的距离x的平方变化。这导致提供如图14所示的净力Fn,其沿着裸芯204的截面是均匀的。这样,可避免裸芯弯曲以及所伴随的问题。
在实施例中,向上力分布与粘接力相反且成比例。然而,虽然粘接力的分布总体上连续,但是向上力分布总体上不连续。就是说,向上力由真空孔234施加在半导体裸芯204上,而没有在真空孔234之间。因此,通过平均真空孔之间的不连续,描述与粘接力相反且与粘接力成比例的向上力分布的实施例可处理向上力分布为连续的。
在实施例中,净力Fn沿着裸芯204的任何不同截面是均匀的,例如,沿着裸芯的长度方向,跨过裸芯204的宽度尺寸,以及沿着裸芯204的角到角的对角线。在进一步实施例中,不是使净力Fn在裸芯204始终均匀,而是净力可沿着截面略微变化,但是净力变化可保持在不导致裸芯204弯曲的水平内。
在裸芯204上为均匀净力Fn的情况下,裸芯可平平地抵靠被抓取在真空端部230,如图15所示。而且,当裸芯由真空端部230传输到基板250时,如图16所示,裸芯204可平平地抵靠安装在基板250上而不在裸芯204和基板250之间留下气泡。裸芯然后可例如通过一层裸芯安装膜(DAF)平平地抵靠安装在基板上,裸芯安装膜(DAF)在裸芯与粘接带206分开后保持裸芯。作为选择,一层环氧可用于连接裸芯到基板。
回过来参考图12和13,应当理解的是,可提供各种真空孔构造以便近似一种向上力分布Fu,其中力Fu相对于距边缘的距离的平方成比例地降低。下面参考图20至25说明这些替代实施例的一些。在实施例中,真空孔234的给定构造的向上力Fu可根据经验确定和测试,以确认它提供所希望的向上力分布(随着距边缘的距离的平方变化)。在发现给定的真空孔构造不在裸芯(或测试部件)的边缘导致足够高的向上力的情况下,则可增加真空端部的边缘的孔密度(或者可减小在中心的孔密度)。
作为选择,真空孔靠近真空端部230边缘密度更大的构造可基于估算以下的构造来设置,所述构造将相对于由于裸芯204和粘接带206之间的粘接力引起的向下力Fd近似成比例。
在进一步实施例中,可发生向下力Fd不随着距裸芯204边缘的距离的平方变化。在这样的实施例中,真空孔234可设置为一种构造,所述构造提供了与向下力分布Fd成比例匹配或接近匹配的向上力分布Fu。这些力分布可随着距裸芯201边缘的距离x由各种函数f(x)变化。
在上述实施例中,真空孔234设置为提供沿着截面总体上均匀的净力分布Fn。然而,在替换实施例中,真空孔234可设置为提供一种净力分布Fn,在该分布中,裸芯204的边缘的向上力大于朝向裸芯204中心区域的向上力。现在参考图17至20描述这样的实施例。
在图17至20的实施例中,真空孔234设置为使得,在裸芯204的边缘相对于裸芯中心的向上力差大于图13至16的实施例中裸芯上的向上力差。就是说,图17至20中在裸芯204的边缘的向上力可高于图13至16中在裸芯204的边缘的向上力。作为选择,图17至20中在裸芯204的中心的向上力可低于图13至16中在裸芯204的中心的向上力。结果是图18所示的净向上力分布Fn,在裸芯204的边缘的净向上力高于在裸芯的中心的净向上力。
这可导致裸芯在抓取到真空端部230上时略微弯曲,如图19所示。在实施例中,弯曲是轻微的,以便不危及裸芯204在真空端部230上的保持以及没有破坏裸芯的风险。具有诸如图19所示略微弯曲的裸芯可如上所述传输到基板250上。所述实施例中的裸芯相对于基板具有略微凸起的形状,从而可能存在于裸芯和基板之间的任何空气气泡252可在裸芯204平平地压靠基板时(如图20的下部所示)自由地从裸芯204的边缘排出。
如上所述,可提供不同的真空孔构造。图21至23示出了几个替换构造。这些图示不意味着穷尽的,而是可提供真空孔234的很多其它构造,其中在真空端部230的边缘所形成的向上力高于在真空端部的中心形成的向上力。
在上述的实施例中,在边缘较高的压强差通过增加靠近边缘的真空孔234的密度而实现。应当理解的是,真空端部230的表面上所希望的压强差可在进一步实施例中以其它方式产生。例如,图24显示了真空孔均匀分布的真空端部230的实施例,例如现有技术(图4)中所见。然而,在所述实施例中,不同的真空孔234连接到不同的真空源。在所示的示例中,真空端部230的外周边周围的第一组真空孔234连接到将压强P1相通给真空孔的真空源。靠近真空端部230的中心的第二组真空孔234连接到将压强P2相通给真空孔的真空源。而且,更加靠近真空端部230的中心的第三组真空孔234连接到将压强P3相通给真空孔的真空源。在所述示例中,真空源可设置为P1>P2>P3。真空源的相对强度可控制为产生与向下力分布Fd成比例的向上力分布Fu,从而施加在裸芯204上的净力分布Fn是均匀的。
图25示出了进一步示例,也为真空孔234的均匀分布,例如如现有技术(图4)可见,然而,在所述实施例中,不同的真空孔234具有不同的尺寸。靠近外周边的孔比在真空端部230的中心的孔可具有较大的直径。外周边上的较大孔能够比在中心的较小孔对于裸芯施加更大的向上力。这可产生在裸芯的边缘有较高力的向上力分布Fu,从而施加在裸芯204上的净力分布是均匀的。
回过来参考图9的流程图,在真空端部230抵靠要移除的裸芯之前或之后,真空源可在步骤112启动,并且裸芯可在步骤116被移除且传输。在传输的裸芯设置在别处后,拾取工具224可返回到晶片以拾取下一个裸芯204,如步骤120所示。
图26示出了半导体封装体170,其采用上述系统脱离的半导体裸芯装配。半导体封装体170包括一个或多个裸芯204。这些裸芯例如可为非易失性存储器,连接有诸如ASIC的控制器裸芯174。可以设想其它类型的裸芯。裸芯例如通过引线键合178电连接到基板150。无源部件(未示出)还可安装在基板150上。封装体170例如可为焊盘栅格阵列(LGA)封装,其可移除地插入主机或从其移除。在这样的实施例中,基板可包括封装体的下表面上的接触指180,用于与主机中的端子配对。封装体可包封在模塑化合物182中以保护半导体裸芯和其它部件不受振动和潮湿。
采用上述系统和方法,可相对于粘接力平衡真空端部施加的力,并且可提供均匀的净力分布。这进而可降低由于裸芯裂纹、导电迹线损坏和短路和/或基板上的裸芯脱离引起的良率损失。
总之,本技术可涉及分开半导体裸芯与带组件的工具,所述工具包括:真空端部,在真空端部的表面上具有多个真空孔,用于在半导体裸芯的与带接合的表面相对的半导体裸芯表面上施加力,所述多个真空孔在真空端部的表面上具有非均匀的分布。
在另一个示例中,本技术涉及分开半导体裸芯与带组件的工具,所述工具包括:真空端部,在所述真空端部的表面中具有多个真空孔,用于在半导体裸芯的与带接合的表面相对的半导体裸芯表面上施加力,所述多个真空孔施加在所述半导体裸芯上的力在所述半导体裸芯边缘比在所述半导体裸芯的中心更大。
在进一步的示例中,本技术涉及分开半导体裸芯与带组件的工具,所述带组件在半导体裸芯上施加非均匀的力,所述不均匀力在所述半导体裸芯的边缘比在所述半导体裸芯的中心更大,所述工具包括:支撑表面,用于支撑所述半导体裸芯,所述半导体裸芯的第一表面包括面对所述支撑表面的带;以及真空端部,具有在所述真空端部表面中的用于接收低压的多个真空孔,所述低压在与所述半导体裸芯接合所述带的第一表面相对的所述半导体裸芯的第二表面上施加力,所述多个真空孔在所述半导体裸芯上施加力以抵消所述带组件在所述半导体裸芯上的不均匀力。
前面为了图示和说明的目的已经进行了详细的描述。它不意味着是穷举的或限制描述到所公开的精确形式。根据上面的教导,很多修改和变化都是可能的。所描述的实施例选择为最好地说明所要求保护的系统及其实际应用的原理,以因此在适合于所考虑的实际使用时,能够使其它技术人员更好地利用各种实施例中和各种修改所要求保护的系统。所述方法的范围旨在由所附的权利要求限定。
Claims (14)
1.一种用于分开半导体裸芯与带组件的工具,所述工具包括:
真空端部,具有在所述真空端部的表面中的多个真空孔,用于在与所述半导体裸芯接合所述带的表面相反的所述半导体裸芯的表面施加力,所述多个真空孔在所述真空端部的表面上具有非均匀的分布,所述多个真空孔设置为这样的构造,其中所述真空孔在所述裸芯上提供真空力,其相对于距边缘的距离的平方成比例减小。
2.如权利要求1所述的工具,其中所述多个真空孔设置为这样的构造,其中所述真空孔设置为在所述真空端部的外周边比向着所述真空端部的中心更加密集。
3.如权利要求1所述的工具,其中所述半导体裸芯和所述带组件之间的粘接力限定了所述半导体裸芯表面上的第一力分布,连通到所述多个真空孔的低压限定了在与所述第一力分布相反的方向上的第二力分布,所述第一和第二力分布之间的净力分布导致在所述半导体裸芯的表面上的均匀力分布。
4.如权利要求3所述的工具,其中所述第一和第二力分布相对于距所述半导体裸芯边缘的距离的平方成比例变化。
5.如权利要求1所述的工具,其中所述半导体裸芯和所述带组件之间的粘接力限定了所述半导体裸芯表面上的第一力分布,连通到所述多个真空孔的低压限定了与所述第一力分布相反方向上的第二力分布,所述第一和第二力分布之间的净力分布导致在所述半导体裸芯边缘的大于在所述半导体裸芯中心的力分布。
6.一种分开半导体裸芯与带组件的工具,所述工具包括:
真空端部,具有在所述真空端部表面中的多个真空孔,用于在与所述半导体裸芯接合所述带的表面相反的所述半导体裸芯的表面上施加力,所述多个真空孔施加在所述半导体裸芯上的力在所述半导体裸芯边缘比在所述半导体裸芯的中心更大,所述多个真空孔设置为这样的构造,其中所述真空孔在所述裸芯上提供的真空力相对于距边缘的距离的平方成比例地减小。
7.如权利要求6所述的工具,还包括用于连通负压到所述多个真空孔的真空源。
8.如权利要求6所述的工具,其中所述多个真空孔设置为这样的构造,其中所述真空孔设置为在所述真空端部的边缘比向着所述真空端部的中心更加密集。
9.如权利要求6所述的工具,其中所述多个真空孔设置为这样的构造,其中所述真空孔在所述真空端部的边缘比向着所述真空端部的中心更大。
10.如权利要求6所述的工具,其中所述真空端部的边缘上的所述真空孔连接第一真空源,并且在所述真空端部的中心的真空孔连接到第二真空源,所述第一真空源比所述第二真空源提供更大的负压。
11.如权利要求6所述的工具,其中所述半导体裸芯和所述带组件之间的粘接力限定了所述半导体裸芯表面上的第一力分布,连通到所述多个真空孔的低压限定与所述第一力分布相反方向上的第二力分布,所述第一和第二力分布之间的净力分布导致所述半导体裸芯表面上的均匀力分布。
12.一种分开半导体裸芯与带组件的工具,所述带组件在所述半导体裸芯上施加不均匀力,所述不均匀力在所述半导体裸芯的边缘比在所述半导体裸芯的中心更大,所述工具包括:
支撑表面,用于支撑所述半导体裸芯,所述半导体裸芯的第一表面包括面对所述支撑表面的带;以及
真空端部,具有在所述真空端部表面中的用于接收低压的多个真空孔,所述低压在与所述半导体裸芯接合所述带的第一表面相对的所述半导体裸芯的第二表面上施加力,所述多个真空孔在所述半导体裸芯上施加力以抵消所述带组件在所述半导体裸芯上的不均匀力,所述多个真空孔设置为这样的构造,其中所述真空孔在所述裸芯上提供的真空力相对于距边缘的距离的平方成比例地减小。
13.如权利要求12所述的工具,其中所述半导体裸芯上来自所述带组件和多个真空孔的净力是净均匀向上力。
14.如权利要求12所述的工具,其中所述多个真空孔设置为这样的构造,其中所述真空孔设置为在所述真空端部的外周边比向着所述真空端部的中心更加密集。
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US11023606B2 (en) * | 2016-10-02 | 2021-06-01 | Vmware, Inc. | Systems and methods for dynamically applying information rights management policies to documents |
CN106736528B (zh) * | 2016-12-30 | 2019-02-22 | 湖南先步信息股份有限公司 | 高效智能标准装配平台 |
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US9038264B2 (en) | 2015-05-26 |
BR112012007522A2 (pt) | 2019-09-24 |
KR20140124871A (ko) | 2014-10-27 |
US20120216396A1 (en) | 2012-08-30 |
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WO2012116482A1 (en) | 2012-09-07 |
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