CN102760399A - Method for improving reliability of circuit of plasma display panel - Google Patents
Method for improving reliability of circuit of plasma display panel Download PDFInfo
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- CN102760399A CN102760399A CN2012102279104A CN201210227910A CN102760399A CN 102760399 A CN102760399 A CN 102760399A CN 2012102279104 A CN2012102279104 A CN 2012102279104A CN 201210227910 A CN201210227910 A CN 201210227910A CN 102760399 A CN102760399 A CN 102760399A
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Abstract
The invention provides a method for improving the reliability of a circuit of a plasma display panel, and relates to the field of driving circuits. According to the method, the coordination of resetting voltage and time in a driving waveform resetting period is changed by changing the arrangement of a register for scanning a driving chip in a driving circuit. The problem that the protection on a power device is not enough by using a driving circuit at present can be solved, so that the failure rate of the plasma display panel is reduced.
Description
Technical field
The present invention relates to a kind of driving circuit, particularly relate to improving one's methods of a kind of reliability that is applicable to plasma display panel drive circuit.
Background technology
Plasma display (PDP) is that a kind of gas discharge that utilizes produces ultraviolet ray; And then excitated fluorescent powder sends visible light and a kind of display of video picture; Plasmia indicating panel is a primary structure of realizing Discharge illuminating; It is made up of former and later two substrates, on prebasal plate, be provided with by horizontal ITO electrode and BUS electrode, and on dielectric layer and medium protection film; Metacoxal plate is provided with addressing electrode and barrier structure longitudinally, and discharge is carried out in the space that front-back baseboard and barrier are formed.The work of Plasmia indicating panel leans on the driving of driving circuit to accomplish; Depend primarily on the serviceable life of driving circuit the serviceable life of plasma panel, the reasonable cooperation of the driving circuit of Plasmia indicating panel and drive waveforms can improve the reliability of driving circuit, is one of main means that promote the ion display panel life-span.
The picture display effect of current plasma display, the reset period of drive waveforms has played decisive role, and it is just right that resetting voltage and time cooperate, and can reduce misplacing of display panel.And the change in voltage of reset period is very big; The high voltage of ramp up circuit reaches+310V about, the low-voltage of ramp down circuit reaches-190V about, it all is instantaneous completion that high low-voltage makes zero; T is very big for Δ V/ Δ; After working long hours, the temperature rise of power device is very high, is prone to cause component failure.
Present employed driving circuit, not enough to the protection of power device, cause the crash rate of the plasma display on the market higher.
Summary of the invention
The purpose of this invention is to provide a kind of Plasmia indicating panel circuit reliability and improve one's methods, this method is through the register setting of scanning drive chip in the change driving circuit, thus change drive waveforms resetting voltage and the cooperation of time.Solve present institute use driving circuit to the not enough problem of power device protection, reduced the crash rate of Plasmia indicating panel.
The technical scheme that the present invention adopts is following: a kind of Plasmia indicating panel circuit reliability is improved one's methods, and it is characterized in that:
Step 1, the ramp up circuit of operation logic control module;
Step 2, the scanning drive chip first register interface OC1, the second register interface OC2 are set to overall height;
Step 3 is kept a period of time T with driving voltage in the period that reset period high voltage and negative voltage make zero;
Step 4 is kept the ramp down circuit of operation logic control module behind a period of time T.
As preferably, be that driving voltage is kept a period of time T in the said step 3 in 140V.
As preferably, the time that said driving voltage is kept in 140V: 200ns ≦ T ≦ 3 μ s.
As preferably, the said T of holding time is 400ns.
As preferably, the said T of holding time is 500ns.
As preferably, the said T of holding time is 600ns.
Compared with prior art, the invention has the beneficial effects as follows:
1. technical scheme of the present invention is through the register setting of scanning drive chip in the change driving circuit, thus change drive waveforms resetting voltage and the cooperation of time, the crash rate of reduction Plasmia indicating panel;
2. hold time when 400ns, 500ns and 600ns in the technical scheme of the present invention, the crash rate of Plasmia indicating panel is minimum.
Description of drawings
Fig. 1 is the drive waveforms figure of prior art ionic medium display driver circuit.
Fig. 2 is the drive waveforms figure after the present invention change.
Embodiment
Below in conjunction with accompanying drawing and embodiment the present invention is further described.
As shown in Figure 1, before the enforcement, logic control circuit moves ramp up circuit at waveform between the rising stage; During the master reset of plasma display, the driving voltage during ramp up circuit end of run is about 310V, moves ramp down circuit then; The starting point of ramp down circuit is 0 level, and the moment that switches in of ramp up circuit and ramp down circuit is accomplished Δ V=310V; This moment, Δ V/ Δ t was very big, and the electric current that causes flowing through power device is big, and the temperature rise of device was lost efficacy easily.
As shown in Figure 2, be the drive waveforms figure after the present invention's change.
A kind of Plasmia indicating panel circuit reliability improve one's methods into:
Step 1, at the reset period of drive waveforms, the ramp up circuit of operation logic control module;
Step 2, the scanning drive chip first register interface OC1, the second register interface OC2 are set to overall height;
Step 3 is kept a period of time T with driving voltage in the period that reset period high voltage and negative voltage make zero;
Step 4 at the reset period of drive waveforms, is kept the ramp down circuit of operation logic control module behind a period of time T.
Be that driving voltage is kept a period of time T in the said step 3 in 140V.
The time that said driving voltage is kept in 140V: 200ns ≦ T ≦ 3 μ s.
The said T of holding time is 400ns.
The said T of holding time is 500ns.
The said T of holding time is 600ns.
The present invention program is behind the ramp of operation logic control module up circuit; The first register interface OC1, the second register interface OC2 through scanning drive chip (like AN16538) is set are overall height; And then the ramp down circuit of operation logic control module; Make in the drive waveforms reset period driving voltage descend and make zero the period, keep a period of time T during 140V, a plateau voltage is arranged in 310V moment.Like this, Δ V1=310-140=170V, Δ V2=140V has significantly reduced Δ V/ Δ t like this, and the electric current that flows through power device diminishes, and temperature rise is not high, and the component failure rate reduces.
The scope of a period of time T that is kept is 200ns ≦ T ≦ 3 μ s; In this programme, get 400ns, 500ns or 600ns; When going these three to hold time the T value; Both can guarantee the long enough of holding time, and can avoid because of the long time waste that causes of holding time again, and this three times keep the crash rate that the T value can make Plasmia indicating panel and reach minimum.
Claims (6)
1. a Plasmia indicating panel circuit reliability is improved one's methods, and it is characterized in that:
Step 1, the ramp up circuit of operation logic control module;
Step 2, the scanning drive chip first register interface OC1, the second register interface OC2 are set to overall height;
Step 3 is kept a period of time T with driving voltage in the period that reset period high voltage and negative voltage make zero;
Step 4 is kept the ramp down circuit of operation logic control module behind a period of time T.
2. reliability according to claim 1 is improved one's methods, and it is characterized in that:
Be that driving voltage is kept a period of time T in the said step 3 in 140V.
3. reliability according to claim 2 is improved one's methods, and it is characterized in that:
The time that said driving voltage is kept in 140V: 200ns ≦ T ≦ 3 μ s.
4. reliability according to claim 3 is improved one's methods, and it is characterized in that:
The said T of holding time is 400ns.
5. reliability according to claim 3 is improved one's methods, and it is characterized in that:
The said T of holding time is 500ns.
6. reliability according to claim 3 is improved one's methods, and it is characterized in that:
The said T of holding time is 600ns.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN2012102279104A CN102760399A (en) | 2012-07-04 | 2012-07-04 | Method for improving reliability of circuit of plasma display panel |
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| Application Number | Priority Date | Filing Date | Title |
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| CN2012102279104A CN102760399A (en) | 2012-07-04 | 2012-07-04 | Method for improving reliability of circuit of plasma display panel |
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| CN102760399A true CN102760399A (en) | 2012-10-31 |
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| CN2012102279104A Pending CN102760399A (en) | 2012-07-04 | 2012-07-04 | Method for improving reliability of circuit of plasma display panel |
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Citations (10)
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| US20040246206A1 (en) * | 2003-06-05 | 2004-12-09 | Choi Jeong Pil | Method and apparatus for driving a plasma display panel |
| CN1612187A (en) * | 2003-10-31 | 2005-05-04 | Lg电子株式会社 | Method for driving plasma display panel and apparatus thereof |
| CN1677462A (en) * | 2004-04-02 | 2005-10-05 | Lg电子株式会社 | Plasma display device and method of driving the same |
| CN1716505A (en) * | 2004-06-30 | 2006-01-04 | 三星Sdi株式会社 | plasma display panel |
| CN101051437A (en) * | 2006-04-06 | 2007-10-10 | Lg电子株式会社 | Plasma display apparatus and driving method of plasma display apparatus |
| CN101356564A (en) * | 2006-11-29 | 2009-01-28 | Lg电子株式会社 | Plasma display apparatus and method of driving the same |
| KR20090070355A (en) * | 2007-12-27 | 2009-07-01 | 엘지전자 주식회사 | Driving apparatus for plasma display panel and driving method thereof |
| CN102460546A (en) * | 2009-06-08 | 2012-05-16 | 松下电器产业株式会社 | Plasma display panel drive method and plasma display device |
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2012
- 2012-07-04 CN CN2012102279104A patent/CN102760399A/en active Pending
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1326582A (en) * | 1998-09-04 | 2001-12-12 | 松下电器产业株式会社 | Driving method and apparatus for plasma display panel with high image quality and high luminous efficiency |
| CN1313582A (en) * | 2000-03-14 | 2001-09-19 | Lg电子株式会社 | Method and device for selectively recording/canceling to drive plasma display |
| US20040246206A1 (en) * | 2003-06-05 | 2004-12-09 | Choi Jeong Pil | Method and apparatus for driving a plasma display panel |
| CN1612187A (en) * | 2003-10-31 | 2005-05-04 | Lg电子株式会社 | Method for driving plasma display panel and apparatus thereof |
| CN1677462A (en) * | 2004-04-02 | 2005-10-05 | Lg电子株式会社 | Plasma display device and method of driving the same |
| CN1716505A (en) * | 2004-06-30 | 2006-01-04 | 三星Sdi株式会社 | plasma display panel |
| CN101051437A (en) * | 2006-04-06 | 2007-10-10 | Lg电子株式会社 | Plasma display apparatus and driving method of plasma display apparatus |
| CN101356564A (en) * | 2006-11-29 | 2009-01-28 | Lg电子株式会社 | Plasma display apparatus and method of driving the same |
| KR20090070355A (en) * | 2007-12-27 | 2009-07-01 | 엘지전자 주식회사 | Driving apparatus for plasma display panel and driving method thereof |
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Application publication date: 20121031 |