CN102751858A - Soft starting circuit for voltage regulator - Google Patents

Abstract

The invention discloses a soft starting circuit for a voltage regulator, and the soft starting circuit comprises a first bias current source, a first capacitance, a switch device, a second bias current source, a first resistance and a first operational amplifier, wherein the second bias current source is arranged between an external power supply and a first terminator of the first resistance, the first terminator of the first resistance is used as an output end of the soft starting circuit, and a second terminator of the first resistance is respectively connected with a negative input end of the first operational amplifier and the output end of the first operational amplifier. The soft starting circuit not only can prevent inductance current surge and overshoot pulse of the output voltage in the starting process, but also can reduce the variation range of the system on-off frequency in the soft starting process and reduce the processing difficulty of the system electromagnetic interference, so that the output voltage is smoothly increased to a stable working value, and the stability problem in the starting process can be avoided.

Description

A Soft Start Circuit Used in Voltage Regulator

technical field

The invention belongs to the technical field of power supplies, and in particular relates to the design of a soft start circuit used in a voltage regulator.

Background technique

A voltage regulator is a system that completes the conversion of a power supply from one DC form to another, and realizes functions such as output voltage amplitude being greater than or less than input voltage amplitude. There are many control modes for voltage regulators, including voltage mode control, current mode control, constant on-time control (COT (Constant-on-time) control) and so on. The COT control mode is widely used because of its simple control loop structure and fast system response.

In order to prevent the inductor current surge and output voltage overshoot during the power-on process of the chip, a soft-start module is designed when designing the chip, so that the chip transitions smoothly from the startup phase to the stable working state. Figure 1 shows the waveform diagram of the COT control system without soft-start circuit during the startup process. From the figure, it can be seen that the inductor current surge and output voltage overshoot phenomenon are obvious, and the switching frequency of the system changes drastically. The traditional soft-start circuit of COT control mode is shown in Figure 2. In the start-up phase, only the loop comparator is controlled, so that the reference level of the loop comparator gradually rises with time, preventing excessive surge current and output voltage of the inductor current. Overshoot, but because the On_Timer timer timing time T _on is fixed, the inductor current will surge when the chip starts to cause a step in the output voltage Vo, and the operating frequency of the system changes greatly during the startup period. As shown in Figure 3, this will lead to unnecessary power loss, reduce the conversion efficiency of the chip, and increase the difficulty of EMI (Electro Magnetic Interference) processing.

Contents of the invention

The object of the present invention is to solve the above-mentioned problems existing in the traditional soft-start circuit of the existing COT control mode, and propose a soft-start circuit used in a voltage regulator.

The technical solution of the present invention is: a soft start circuit used in a voltage regulator, specifically comprising: a first bias current source, a second bias current source, a first capacitor, a first resistor, a first operational amplifier and The switching device, wherein the first bias current source is connected between the external power supply and the non-inverting input terminal of the first operational amplifier; the switching device and the first capacitor are connected in parallel between the non-inverting input terminal of the first operational amplifier and the ground potential, The control terminal of the switch device is used as the control terminal of the soft start circuit; the second bias current source is connected between the external power supply and the first terminal of the first resistor, and the first terminal of the first resistor is used as the soft start circuit The output terminal of the first resistor, the second terminal of the first resistor is connected with the negative phase input terminal of the first operational amplifier and the output terminal of the first operational amplifier.

As a preferred solution, the soft start circuit of the present invention further includes: a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, The seventh resistor and the third bias current source; wherein, the sixth resistor and the seventh resistor are connected in series between the output voltage of the voltage regulator and the ground potential, and the sixth resistor and the seventh resistor form a resistor divider network pair The system output voltage is sampled; the gate of the first PMOS transistor is connected to the voltage dividing node of the sixth resistor and the seventh resistor, and the drain of the first PMOS transistor, the drain of the second PMOS transistor and the drain of the third PMOS transistor Both poles are connected to the ground potential, the first terminal of the third resistor is connected to the source of the first PMOS transistor, the second terminal of the third resistor is connected to the first terminal of the second resistor, and the third bias current source is connected to Between the second terminal of the second resistor and the external power supply; the fourth resistor and the fifth resistor are connected in series between the source of the second PMOS transistor and the second terminal of the second resistor; the gate of the second PMOS transistor is connected For an external reference voltage source, the drain of the second PMOS transistor is connected to the ground potential; the source of the third PMOS transistor is connected to the series connection point of the fourth resistor and the fifth resistor, and the gate of the third PMOS transistor is connected to the first computing connected to the output of the amplifier.

Beneficial effects of the present invention: the soft start circuit of the present invention can not only prevent inductive current surges and output voltage overshoots during the start process, but also reduce the variation range of the system switching frequency during the soft start process and reduce the EMI of the system Difficulty of handling, so that the output voltage can be smoothly raised to a stable operating value, avoiding stability problems during start-up. The soft-start circuit proposed by the present invention, in addition to controlling the loop comparator, also controls the On_Timer (on-time timer) timer, so that the power tube turn-on time generated by the On_Timer timer is gradually lengthened during the soft-start period, and at the same time in the loop In the comparator, a circuit that eliminates the output voltage step is designed, which can avoid the surge phenomenon of the inductor current and the step problem of the output voltage when the traditional soft-start circuit is powered on; and it makes the On_Timer timer timing time Ton gradually increase, which can Reduce the change of system frequency during soft start, thereby reducing the difficulty of system EMI processing and avoiding stability problems during soft start. The soft start circuit of the present invention can be applied to a DC-DC converter system of high performance and low power consumption COT control mode.

Description of drawings

Figure 1 is a waveform diagram of a COT control system without a soft-start circuit during start-up.

FIG. 2 is a schematic structural diagram of a traditional soft-start circuit of a COT control voltage regulator.

Figure 3 is a waveform diagram of the COT control system using a traditional soft-start circuit during start-up.

FIG. 4 is a schematic structural diagram of a soft-start circuit used in a voltage regulator according to the present invention.

Fig. 5 is a waveform diagram during the startup process of the COT control voltage regulator adopting the soft-start circuit provided by the present invention.

Detailed ways

The principle and working process of the soft start circuit proposed by the present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments.

Fig. 4 shows the overall block diagram of the voltage regulator adopting the soft start circuit of the present invention, in addition to the Soft_Start module of the soft start circuit, it also includes an On_Timer timer module and a loop comparator Loop_Comp module.

As shown in Figure 4, the Soft_Start module includes a switch device SW1, a capacitor Css, a resistor R1, bias current sources Ibias1 and Ibias2, and an operational amplifier OP, wherein the OP is connected in the form of negative feedback to form a Buffer, and the output terminal L73 of the OP The potential is clamped to be equal to the potential above the capacitor Css.

The specific connection relationship is: the switching device SW1 and the capacitor Css are connected between the non-inverting input terminal of the OP and the ground potential, the bias current source Ibias1 is connected between the power supply voltage Vdd and the non-inverting input terminal of the OP, and the inverting input terminal of the OP is connected to the OP The output terminal L73 and the resistor R1 are connected between the nodes L107 and L73, and the bias current source Ibias2 is connected between the power supply voltage Vdd and the node L107. The function of this module is to generate two voltage signals that rise linearly with time, namely V _L107 and V _L73 . In this embodiment, the difference between them is about 0.4V. The two signals V _L107 and V _L73 are During the soft start period, it is used as the reference level of the comparator of the On_Timer timer and the reference level of the Loop_Comparator. Here, the bias current sources Ibias1 and Ibias2 are independent of each other.

The On_Timer timer module includes a switch device SW2, a capacitor Con, a comparator COMP1, and a bias current source Ibias4. The specific connection relationship is: the switch device SW2 and the capacitor Con are connected between the non-inverting input terminal of the comparator COMP1 and the ground, and the bias current The source Ibias3 is connected to the power supply voltage Vdd and the noninverting input terminal of COMP1, and the two inverting input terminals of COMP1 are respectively connected to L107 and the reference power supply VREF2. The function of this module is to charge the capacitor Con through a constant current source to time and generate a fixed power tube conduction time Ton. When the timing time is up, the signal Aco output by this module is turned from low level to high level, and the voltage regulator is notified to turn off the power tube. During the soft start period, since the reference level of the comparator COMP1 gradually rises with time, the conduction time Ton gradually increases during the soft start period, which is a great advantage of the soft start circuit provided by the present invention.

The loop comparator Loop_Comp module includes three PMOS transistors MP1, MP2, MP3, six resistors Rfb1, Rfb2, R2, R3, R4, R5, bias current source Ibias3, comparator COMP2, where the three PMOS transistors MP1, MP2, MP3, six resistors Rfb1, Rfb2, R2, R3, R4, R5, and a bias current source Ibias3 are also part of the soft start circuit, the purpose of which is to eliminate the common mode caused by the Buffer circuit in the soft start module The voltage step introduced by the limitation of the output range does not affect the output voltage of the voltage regulator.

The specific connection relationship is: resistors Rfb1 and Rfb2 form a resistor divider network to sample the output voltage Vo of the voltage regulator, and compare the sampled level with the reference level to achieve the purpose of monitoring the output voltage Vo; four resistors R2, R3, R4, R5, three PMOS transistors MP1, MP2, MP3, and bias current source Ibias3 form a circuit for eliminating the output voltage step. Their connection relationship is that the resistors Rfb1 and Rfb2 are connected in series between the output voltage Vo and the ground, the gate of the PMOS transistor MP1 is connected to the voltage dividing node of the resistors Rfb1 and Rfb2, the drain of the PMOS transistor MP1 is connected to the ground potential, and the bias The current source Ibias3 is connected between the power supply voltage Vdd and the node C, the resistors R2 and R3 are connected in series between the source of the PMOS transistor MP1 and the node C, and the resistors R4 and R5 are connected in series between the source of the PMOS transistor MP2 and the node C , The gate of PMOS transistor MP2 is connected to external reference power supply VREF1, the drain of PMOS transistor MP2 is grounded, the source of PMOS transistor MP3 is connected to node B, the gate of PMOS transistor MP3 is connected to node L73, and the drain of PMOS transistor MP3 is grounded Potential, non-inverting input terminal and inverting input terminal of comparator COMP3 are connected to node A and node B, respectively. The function of this module is to set the output voltage Vo of the voltage regulator through the reference level of the comparator COMP2. When the output voltage Vo is lower than the preset value, the output signal Vfb of this module is reversed from low level to High level, and notify the system to turn on the power tube. During the soft start period, since the reference level of the comparator is gradually increased, the output voltage Vo of the voltage regulator is also gradually increased, and finally reaches a stable voltage value.

In Figure 4, the voltage above the capacitor Css of the Soft_Start module passes through a Buffer to obtain two linearly rising voltages V _L73 and V _L107 . Due to the limitation of the output swing of the Buffer circuit, V _L73 cannot increase from zero, and there is an initial steps.

During the soft start process, since the reference level of the On_Timer comparator is V _L107 , the On_Timer timer timing time T _on during the soft start:

${\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; on</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; C</span>}}_{\mathrm{<span\; class="notranslate">\; on</span>}}<span\; class="notranslate">\; \&times;</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; L</span>}\mathrm{<span\; class="notranslate">\; 107</span>}}}{{\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; bias</span>}\mathrm{<span\; class="notranslate">\; 4</span>}}}$

In the formula, C _on represents the timing capacitor in the On_Timer timer. Because V _L107 increases gradually during start-up, T _on also increases gradually, which can avoid the surge phenomenon of inductor current during start-up. The specific reason is that the increase of inductor current ΔI _L(rise) in one cycle is:

${\mathrm{<span\; class="notranslate">\; \&Delta;I</span>}}_{\mathrm{<span\; class="notranslate">\; L</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; rise</span>}<span\; class="notranslate">\; )</span>}<span\; class="notranslate">\; =</span><span\; class="notranslate">\; (</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; in</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; o</span>}}}{\mathrm{<span\; class="notranslate">\; L</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; \&times;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; on</span>}}$

Where L represents the external inductance of the voltage regulator. Since the output voltage Vo is small at the initial stage of soft start, the rising slope of the inductor current is relatively large. By controlling the time T _on , let it increase gradually, so as to achieve the purpose of controlling the inductor current increment ΔI _L(rise) . If the setting is appropriate It can keep the increment ΔI _L(rise) of the inductor current equal in each cycle during the soft start, thereby eliminating the surge phenomenon of the inductor current during startup.

In addition, the inductor current drops by:

${\mathrm{<span\; class="notranslate">\; \&Delta;I</span>}}_{\mathrm{<span\; class="notranslate">\; L</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; fall</span>}<span\; class="notranslate">\; )</span>}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; o</span>}}}{\mathrm{<span\; class="notranslate">\; L</span>}}<span\; class="notranslate">\; \&times;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; off</span>}}$

_Toff in the formula represents the turn-off time of the voltage regulator.

Since the output voltage Vo is small at the initial stage of soft start, the drop slope of the inductor current is small, that is, to achieve the same amount of change in the inductor current, the required T _off time is longer, and the T _off time increases with the soft start progress and gradually decrease. If the traditional COT soft-start method is adopted, the frequency of the voltage regulator will gradually increase with the progress of the soft-start, and the frequency range is wide. However, the soft start circuit of the present invention can offset the influence of the change of T _off on the system frequency change to a certain extent by gradually increasing T _on , and narrow the range of frequency change of the voltage regulator in the whole process.

After the startup is completed, the reference level of the On_Timer timer is replaced by V _REF2 , so the on-time T _on of the power transistor is a fixed constant, specifically:

${\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; on</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; C</span>}}_{\mathrm{<span\; class="notranslate">\; on</span>}}<span\; class="notranslate">\; \&times;</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; REF</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}}{{\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; bias</span>}\mathrm{<span\; class="notranslate">\; 3</span>}}}$

During start-up, the reference level of Loop_Comp is V _L73 , so the output voltage Vo during soft-start is:

${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; o</span>}}<span\; class="notranslate">\; =</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; +</span>\frac{{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; fb</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}}{{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; fb</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; \&times;</span><span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; L</span>}\mathrm{<span\; class="notranslate">\; 73</span>}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; \&Delta;V</span>}<span\; class="notranslate">\; )</span>$

Among them, △V indicates that the Loop_Comp comparator circuit is designed to eliminate the initial step of V _L73 , thereby eliminating the step of the output voltage Vo of the traditional startup circuit at startup.

$\mathrm{<span\; class="notranslate">\; \&Delta;V</span>}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; 2</span>}}{\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; bias</span>}\mathrm{<span\; class="notranslate">\; 3</span>}}<span\; class="notranslate">\; \&times;</span>{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; 4</span>}}$

Since V _L73 rises gradually during soft start, the output voltage Vo also rises gradually, which can ensure that the output voltage Vo gradually rises from zero to the preset value of the voltage regulator:

${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; o</span>}}<span\; class="notranslate">\; =</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; +</span>\frac{{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; fb</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}}{{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; fb</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; \&times;</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; REF</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}$

The soft-start circuit provided by the present invention, combined with the control of the On_Timer timer time Ton and the control of the output voltage Vo by Loop_Comp, can make the inductor current IL and the output voltage Vo transition to the steady-state value gradually and smoothly during the startup process, and without There will be inductor current surge and output voltage step during power-on; in addition, the frequency variation range of the voltage regulator can be reduced.

Fig. 3 and Fig. 5 are the waveform diagrams of the COT control voltage regulator adopting the traditional startup circuit during startup and the COT control voltage regulator adopting the soft startup circuit proposed by the present invention during startup respectively. Comparing the two figures, it can be found that the soft-start circuit proposed by the present invention improves the problem of the inductive current surge and the step of the output voltage Vo when the voltage regulator is started, and improves the performance of the voltage regulator during the start-up phase. In addition, the Ton time of the traditional soft-start circuit is fixed, but the soft-start circuit proposed by the present invention controls the Ton time from small to large gradually during the start-up period. As the soft-start process progresses, the output voltage gradually increases, and the voltage regulator The duty cycle also increases gradually. When the same duty cycle increment is reached, the frequency variation range of the startup circuit proposed by the present invention is narrow during startup, so the stability of the voltage regulator can be improved and the EMI can be reduced. difficulty.

In summary, it can be seen that the soft-start circuit provided by the present invention increases the control of the power tube conduction time T _on during the soft-start period, and optimizes the design of the loop comparator at the same time, thereby eliminating the need for traditional soft-start circuits to start. Inductive current surge and step problem of output voltage Vo appear, and at the same time, the soft start circuit proposed by the present invention has a narrow frequency variation range during start-up, which improves the stability of the voltage regulator and reduces the difficulty of EMI treatment. The start-up circuit provided by the invention is suitable for all voltage regulators adopting COT control mode.

Those skilled in the art will appreciate that the embodiments described here are to help readers understand the principles of the present invention, and it should be understood that the protection scope of the present invention is not limited to such specific statements and embodiments. Those skilled in the art can make various other specific modifications and combinations based on the technical revelations disclosed in the present invention without departing from the essence of the present invention, and these modifications and combinations are still within the protection scope of the present invention.

Claims (2)

1. soft starting circuit that is used for voltage adjuster; Specifically comprise: first bias current sources, first electric capacity and switching device; It is characterized in that; Also comprise: second bias current sources, first resistance, first operational amplifier, wherein, first bias current sources is connected between the in-phase input end of the external power source and first operational amplifier; The switching device and first electric capacity are connected between the in-phase input end and earth potential of first operational amplifier, and the control end of switching device is as the control end of said soft starting circuit; Second bias current sources be connected to the external power source and first resistance the first terminal between; The first terminal of first resistance is as the output of said soft starting circuit, and first resistance, second terminal links to each other with the negative-phase input of first operational amplifier, the output of first operational amplifier.

2. soft starting circuit according to claim 1; It is characterized in that, also comprise: PMOS pipe, the 2nd PMOS pipe, the 3rd PMOS pipe, second resistance, the 3rd resistance, the 4th resistance, the 5th resistance, the 6th resistance, the 7th resistance and the 3rd bias current sources; Wherein, the 6th resistance and the 7th resistance are connected between the output voltage and earth potential of said voltage adjuster, and the 6th resistance and the 7th resistance are formed the electric resistance partial pressure networking system's output voltage is sampled; The grid of the one PMOS pipe is connected to the dividing potential drop node place of the 6th resistance and the 7th resistance; The drain electrode of the drain electrode of the drain electrode of the one PMOS pipe, the 2nd PMOS pipe and the 3rd PMOS pipe all is connected in earth potential; The first terminal of the 3rd resistance is connected with the source electrode of PMOS pipe; Second terminal of the 3rd resistance is connected with the first terminal of second resistance, and the 3rd bias current sources is connected between second terminal and external power source of second resistance; The 4th resistance and the 5th resistance are connected in series between second terminal of source electrode and second resistance of the 2nd PMOS pipe; The grid of the 2nd PMOS pipe is connected in the outside reference voltage source, and the drain electrode of the 2nd PMOS pipe is connected in earth potential; The grid that the source electrode of the 3rd PMOS pipe is connected in the 4th resistance and the 5th resistance series connection tie point place, the 3rd PMOS pipe links to each other with the output of first operational amplifier.

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