CN102708788B - Pixel circuit - Google Patents
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- CN102708788B CN102708788B CN201110376530.2A CN201110376530A CN102708788B CN 102708788 B CN102708788 B CN 102708788B CN 201110376530 A CN201110376530 A CN 201110376530A CN 102708788 B CN102708788 B CN 102708788B
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- Electroluminescent Light Sources (AREA)
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Abstract
The invention provides a pixel circuit, which relates to the technical field of the display device. The pixel circuit is invented in order to solve the technical problem that the pixel circuit in the prior art has difficulty in realizing high-quality display. The pixel circuit comprises a driving unit, a switch unit, an energy storage unit and an organic light emitting diode (OLED), wherein the first input end of the driving unit is connected with a voltage drain drain (VDD); the second input end of the driving unit is connected with the output end of the switch unit; the output end of the driving unit is connected with the first end of the OLED; the driving unit consists of polysilicon transistors; the first input end of the switch unit inputs a line scanning signal (SCAN); the second input end of the switch unit inputs data voltage (Vdata); the switch unit consists of polysilicon transistors; two ends of the energy storage unit are connected with the driving unit for storing voltage; and the second end of the OLED is earthed. According to the pixel circuit disclosed by the invention, the display quality of the pixel circuit can be improved.
Description
Technical field
The present invention relates to display device technical field, particularly relate to a kind of image element circuit.
Background technology
Adopt OLED (Organic Light-Emitting Diode, Organic Light Emitting Diode) display of organic electroluminescence is a kind of emerging flat-panel display device, because its preparation technology is simple, cost is low, fast response time, be easy to realize colored display and large screen display, low in energy consumption, easy realization and driver ic coupling, luminosity is high, working temperature wide accommodation, volume are frivolous and be easy to realize the advantages such as Flexible Displays, have broad application prospects.
According to the difference of type of drive, OLED can be divided into passive waked-up (Passive Matrix Organic Light Emission Display, and driven with active matrix (Active MatrixOrganic Light Emission Display, AMOLED) two kinds PMOLED).Although passive waked-up technique is simple, cost is lower, because there is the shortcomings such as cross-talk, high power consumption, low life-span, can not meet the needs of high Resolution and Large Size display.By contrast, driven with active matrix because add thin film transistor (TFT) (Thin Film Transistor on panel, TFT), make pixel cell can both be luminous in a frame time, so the drive current required for it is little, low in energy consumption, the life-span is longer, can meet high resolving power, many gray scales large scale display needs.
At present, the driving circuit of AMOLED display screen, mainly contains two kinds of technical solutions.One utilizes amorphous silicon (a-Si, Amorphous-Silicon) TFT technology; Another kind utilizes polysilicon (p-Si, poly-Silicon) TFT technology.
Although a-Si TFT technology technique is simple, with low cost, the mobility of its charge carrier is very little, and (representative value is less than 1cm usually
2/ Vs), enough drive currents cannot be provided; Meanwhile, non-crystalline silicon tft can only provide N-type device, and its stability also has problems under long-term stress effect.And multi-crystal TFT, because its carrier mobility is high, (representative value is greater than 50cm usually
2/ Vs), fast response time, is easy to realize the display of large-area dynamic video.Meanwhile, high carrier mobility can utilize multi-crystal TFT to be integrated in by peripheral drive circuit on display backboard, greatly reduces external lead wire, reduces the complicacy of peripheral drive circuit.At present, multi-crystal TFT is generally adopted to carry out the research and development of AMOLED backboard in the world.
The channel region of multi-crystal TFT is by forming amorphous silicon layer on substrate, carries out recrystallization thus form polysilicon layer preparing amorphous silicon layer.The method of recrystallization such as can comprise: quasi-molecule laser annealing (Excimer Laser Annealing, ELA) method, sequential lateral crystallization (Sequential LateralSolidification, SLS) method, crystallization inducing metal (Metal Induced Crystallization, MIC) method, or metal inducement side crystallization (Metal Induced Lateral Crystallization, MILC) method.
In these methods, MILC technology is compared with ELA and SLS technology, and the homogeneity of TFT device is better, more easily realizes the needs of large scale AMOLED display, meanwhile, utilizes the cost of MILC technology also more cheap.And compared with MIC technology, MILC technology can effectively reduce the pollution of channel region kish.
The Main Bottleneck of the AMOLED backboard of current employing MILC technology is: the leakage current that cannot reduce TFT, in order to ensure the normal display of each pixel at a frame time, need to ensure that switching transistor can not make the magnitude of voltage in memory capacitance decrease beyond 1 gray level when turning off by its leakage current.But still there is a small amount of metal residual due in the multi-crystal TFT that MILC method obtains, the leakage current of TFT is too high, constrains and realize high gray scale, high-quality display.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of image element circuit, can reduce the leakage current of switching transistor, improves the display quality of image element circuit.
For solving the problems of the technologies described above, the invention provides technical scheme as follows:
A kind of image element circuit, comprising: driver element, switch element, energy-storage units and Organic Light Emitting Diode;
The first input end of described driver element connects supply voltage, second input end of described driver element is connected with the output terminal of described switch element, the output terminal of described driver element connects the first end of described Organic Light Emitting Diode, for exporting the current signal driving described organic light-emitting diode; Described driver element is made up of polysilicon transistors;
The first input end line of input sweep signal of described switch element, the second input end input data voltage of described switch element; Described switch element is made up of amorphous silicon transistor;
The two ends of described energy-storage units are connected with described driver element, for storage voltage; And
Second end ground connection of described Organic Light Emitting Diode.
Described driver element comprises: polysilicon transistors;
The first input end of described driver element is the first pole of described polysilicon transistors, and the second input end of described driver element is the grid of described polysilicon transistors, and the output terminal of described driver element is the second pole of described polysilicon transistors.
Described switch element comprises: amorphous silicon transistor;
The first input end of described switch element is the grid of described amorphous silicon transistor; Second input end of described switch element is the first pole of described amorphous silicon transistor, and the output terminal of described switch element is the second pole of described amorphous silicon transistor.
First of described polysilicon transistors very drains, the second very source electrode of described polysilicon transistors; Or second of described polysilicon transistors very drains, the first very source electrode of described polysilicon transistors;
Second of described amorphous silicon transistor very drains, the first very source electrode of described amorphous silicon transistor; Or first of described amorphous silicon transistor very drains, the second very source electrode of described amorphous silicon transistor.
Described switch element comprises: the first amorphous silicon transistor, the second amorphous silicon transistor, the 3rd amorphous silicon transistor;
The first input end of described switch element comprises the first sub-input end and the second sub-input end;
First sub-input end of described switch element is the grid of described first amorphous silicon transistor and the grid of described second amorphous silicon transistor, connects the first row sweep signal respectively;
Second sub-input end of described switch element is the grid of described 3rd amorphous silicon transistor, connects the second line scan signals;
Second input end of described switch element is respectively the first pole of described first amorphous silicon transistor and the first pole of described 3rd amorphous silicon transistor;
The output terminal of described switch element is the second pole of described first amorphous silicon transistor;
Second pole of described 3rd amorphous silicon transistor connects the first pole of described second amorphous silicon transistor, and the second pole of described second amorphous silicon transistor connects the output terminal of described driver element.
First of described first amorphous silicon transistor very drains, the second very source electrode of described first amorphous silicon transistor; Or second of described first amorphous silicon transistor very drains, the first very source electrode of described first amorphous silicon transistor;
First of described second amorphous silicon transistor very drains, the second very source electrode of described second amorphous silicon transistor; Or second of described second amorphous silicon transistor very drains, the first very source electrode of described second amorphous silicon transistor;
First of described 3rd amorphous silicon transistor very drains, the second very source electrode of described 3rd amorphous silicon transistor; Or second of described 3rd amorphous silicon transistor very drains, the first very source electrode of described 3rd amorphous silicon transistor.
Described driver element comprises: the first polysilicon transistors, the second polysilicon transistors;
Described switch element comprises: the first amorphous silicon transistor, the second amorphous silicon transistor;
The first input end of described driver element is the first pole of described second polysilicon transistors; Second input end of described driver element is the grid of described second polysilicon transistors; The output terminal of described driver element is the second pole of described second polysilicon transistors;
The first input end of described switch element is the grid of described first amorphous silicon transistor; Second input end of described switch element is the first pole of described first amorphous silicon transistor;
The output terminal of described switch element is the second pole of described second amorphous silicon transistor;
First pole of described second amorphous silicon transistor is connected with the first pole of described first amorphous silicon transistor; The grid of described second amorphous silicon transistor is connected with the grid of described first amorphous silicon transistor;
The grid of described second polysilicon transistors is connected with the grid of described first polysilicon transistors, and the first pole of described second polysilicon transistors is connected with the first pole of described first polysilicon transistors;
Second pole of the first amorphous silicon transistor is connected with the second pole of described first polysilicon transistors.
First of described first polysilicon transistors very drains, the second very source electrode of described first polysilicon transistors; Or second of described first polysilicon transistors very drains, the first very source electrode of described first polysilicon transistors;
First of described second polysilicon transistors very drains, the second very source electrode of described second polysilicon transistors; Or second of described second polysilicon transistors very drains, the first very source electrode of described second polysilicon transistors;
First of described first amorphous silicon transistor very drains, the second very source electrode of described first amorphous silicon transistor; Or second of described first amorphous silicon transistor very drains, the first very source electrode of described first amorphous silicon transistor;
First of described second amorphous silicon transistor very drains, the second very source electrode of described second amorphous silicon transistor; Or second of described second amorphous silicon transistor very drains, the first very source electrode of described second amorphous silicon transistor.
Described energy-storage units comprises one or more combination in any of following electric capacity:
First electric capacity, the first end of described first electric capacity connects supply voltage, and the second end of described first electric capacity connects the second input end of described driver element;
Second electric capacity, the first end of described second electric capacity connects supply voltage, and the second end of described second electric capacity connects the output terminal of described driver element;
3rd electric capacity, the first end of described 3rd electric capacity connects the second input end of described driver element, and the second end of described 3rd electric capacity connects the output terminal of described driver element.
Described energy-storage units comprises one or more combination in any of following electric capacity:
First electric capacity, the first end of described first electric capacity connects the second input end of described driver element; Second end of described first electric capacity connects the second pole of described 3rd amorphous silicon transistor;
Second electric capacity, the first end of described second electric capacity connects described supply voltage; Second end of described second electric capacity connects the second pole of described 3rd amorphous silicon transistor.
Described polysilicon transistors is formed by metal inducement side crystallization MILC technique.
The present invention has following beneficial effect:
In such scheme, image element circuit comprises: driver element, switch element, energy-storage units and Organic Light Emitting Diode OLED; The first input end of described driver element connects supply voltage VDD, second input end of described driver element is connected with the output terminal of described switch element, the output terminal of described driver element connects the first end of described OLED, for exporting the current signal driving described OLED luminescence; The first input end line of input sweep signal SCAN of described switch element, the second input end input data voltage Vdata of described switch element; The two ends of described energy-storage units are connected with described driver element, for storage voltage; The second end ground connection of described OLED.Because described driver element is made up of polysilicon transistors; Described switch element is made up of amorphous silicon transistor; The leakage current of amorphous silicon transistor is less than 10 usually
-13a, thus the leakage current significantly reducing switching transistor, thus improve the display quality of image element circuit.
Accompanying drawing explanation
Fig. 1 is the connection diagram of the first embodiment of a kind of image element circuit of the present invention;
Fig. 2 is the connection diagram of the second embodiment of a kind of image element circuit of the present invention;
Fig. 3 is the sequential chart of the second embodiment of a kind of image element circuit of the present invention;
Fig. 4 is the connection diagram of the 3rd embodiment of a kind of image element circuit of the present invention;
Fig. 5 is the connection diagram of the 4th embodiment of a kind of image element circuit of the present invention;
Fig. 6-13 is the vertical view in technological process corresponding to the second embodiment of a kind of image element circuit of the present invention;
Figure 14 is the sectional view of the correspondence of the second embodiment of a kind of image element circuit of the present invention.
Embodiment
For embodiments of the invention will be solved technical matters, technical scheme and advantage clearly, be described in detail below in conjunction with the accompanying drawings and the specific embodiments.
As shown in Figure 1, be a kind of image element circuit of the present invention, comprise: driver element 10, switch element 20, energy-storage units 30 and Organic Light Emitting Diode OLED 40.
The first input end of described driver element 10 connects supply voltage VDD, second input end of described driver element 10 is connected with the output terminal of described switch element 20, the output terminal of described driver element 10 connects the first end of described OLED 40, for exporting the current signal driving described OLED luminescence; Described driver element 10 is made up of polysilicon transistors.
The first input end line of input sweep signal SCAN of described switch element 20, the second input end input data voltage Vdata of described switch element 20; Described switch element 20 is made up of amorphous silicon transistor.
The two ends of described energy-storage units 30 are connected with described driver element, for storage voltage.
The second end ground connection GND of described OLED.
Below the first embodiment of the present invention is described.
As shown in Figure 2, described driver element 10 comprises: polysilicon transistors T1;
The first input end of described driver element 10 is first pole of described polysilicon transistors T1, second input end of described driver element 10 is the grid of described polysilicon transistors T1, and the output terminal of described driver element 10 is second pole of described polysilicon transistors T1.
Described switch element 20 comprises amorphous silicon transistor T2.
The first input end of described switch element 20 is the grid of described amorphous silicon transistor T2; Second input end of described switch element 20 is first pole of described amorphous silicon transistor T2, and the output terminal of described switch element 20 is second pole of described amorphous silicon transistor T2.
Optionally, first of described polysilicon transistors T1 very drains, the second very source electrode of described polysilicon transistors T1; Or second of described polysilicon transistors T1 very drains, the first very source electrode of described polysilicon transistors T1.
Second of described amorphous silicon transistor T2 very drains, the first very source electrode of described amorphous silicon transistor T2; Or first of described amorphous silicon transistor T2 very drains, the second very source electrode of described amorphous silicon transistor T2.
Described energy-storage units comprises one or more combination in any of following electric capacity:
First electric capacity C
s, described first electric capacity C
sfirst end connect supply voltage VDD, described first electric capacity C
sthe second end connect the second input end of described driver element;
The first end of the second electric capacity C1 (Fig. 2 is not shown), described second electric capacity C1 connects supply voltage VDD, and second end of described second electric capacity C1 connects the output terminal of described driver element;
The first end of the 3rd electric capacity C2 (Fig. 2 is not shown), described 3rd electric capacity C2 connects the second input end of described driver element, and second end of described 3rd electric capacity C2 connects the output terminal of described driver element.
In this embodiment, polysilicon transistors T1, as driving tube, its role is to the current signal providing driving OLED luminescence; Amorphous silicon transistor T2 is as switching tube, and line scan signals is applied to the grid of T2 pipe, with the circulation of control data voltage; Electric capacity C
sin the form of voltage data voltage is stored.
Wherein, the grid of multi-crystal TFT pipe T1 is connected with the drain electrode of non-crystalline silicon tft pipe T2, and the source electrode of multi-crystal TFT pipe T1 is connected with first power supply with certain potentials, and the drain electrode of multi-crystal TFT pipe T1 is connected with first electrode of Organic Light Emitting Diode OLED; The grid of non-crystalline silicon tft pipe T2 is connected with line scan signals line SCAN, and the drain electrode of non-crystalline silicon tft pipe T2 is connected with the grid of multi-crystal TFT pipe T1, and the source electrode of non-crystalline silicon tft pipe T2 is connected with data signal line DATA; First electrode of Organic Light Emitting Diode OLED is connected with the drain electrode of multi-crystal TFT pipe T1, the second electrode ground connection of Organic Light Emitting Diode OLED; Memory capacitance C
sthe first electrode be connected with the grid of multi-crystal TFT pipe T1, memory capacitance C
sthe second electrode be connected with VDD.
Fig. 3 is the sequential chart of the image element circuit shown in Fig. 2.The working method of image element circuit is as follows:
In the gating stage, SCAN signal makes the conducting of switching transistor T2 pipe, and the voltage signal on data voltage line DATA is applied to the grid of driving transistors T1 by transistor T2, and data voltage line DATA is to memory capacitance C simultaneously
scharging.In the stabilization sub stage, by the control of data voltage Vdata, the electric current that transistor T1 exports OLED to equals:
I
OLED＝1/2u
nCOX(W/L)
T1(Vdata-V
TH)
2；
In formula, I
oLEDfor transistor T1 exports the current value of OLED to; u
nfor the carrier mobility of transistor T1; C
oXfor the gate insulation layer unit-area capacitance of transistor T1; W is the channel width of transistor T1; L is the pipe channel length of crystal T1; V
tHfor the threshold voltage of transistor T1; VDD is first power values of about the 5V provided by external power source.
In the maintenance stage, SCAN signal makes switching transistor T2 turn off, now, due to memory capacitance C
sexistence, the signal making driving transistors T1 by the impact that T2 turns off, be not still Vdata, thus ensures in whole off-phases, has electric current can carry out continuing driving to OLED.
But, because transistor T2 exists leakage current I when turning off
leakage.Therefore in the maintenance stage, along with electric charge is from the leakage of transistor T2, the grid potential of transistor T2 reduces gradually, and the electric current of driving OLED also reduces gradually.
The drop-out value V of grid potential can by following formulae discovery:
V＝Q/C
S＝I
leakage*t/C
S。
Wherein, Cs is the capacitance of memory capacitance; The quantity of electric charge of Q for losing due to charge leakage; T is duration in maintenance stage.
The refresh rate of usual screen is 60Hz, therefore t=1/60s=16.67ms.In order to realize the display of high-quality, high gray, just need to ensure that the brightness slippage of OLED is in the recognizable set (being generally 10 GTGs) not higher than human eye, needs the leakage current of T2 to be greater than 10
-12a.The present invention adopts the leakage current of non-crystalline silicon tft to be less than 10
-13a, its turn-off characteristic is good, meets this designing requirement.
In addition, the present invention adopts MILC method to prepare low temperature polycrystalline silicon TFT, and its carrier mobility is large, as the driving transistors of OLED.The present invention utilizes MILC technology, realize subregion crystallization, combine the advantage of MILC low temperature polycrystalline silicon TFT and non-crystalline silicon tft, MILC crystallization fabrication techniques is utilized by driving tube T1 to become low temperature polycrystalline silicon TFT, and switch transistor T 2 is designed to as non-crystalline silicon tft, in guarantee, it while driving OLED, can effectively reduce leakage current, improves circuit in the stability keeping the stage.
Below the second embodiment of the present invention is described.
As shown in Figure 4, the first input end of described driver element 10 is first pole of described polysilicon transistors A1, second input end of described driver element 10 is the grid of described polysilicon transistors T1, and the output terminal of described driver element 10 is second pole of described polysilicon transistors T1.
Described switch element 20 comprises: the first amorphous silicon transistor A2, the second amorphous silicon transistor A3, the 3rd amorphous silicon transistor A4;
The first input end of described switch element 20 comprises the first sub-input end and the second sub-input end;
First sub-input end of described switch element 20 is the grid of described first amorphous silicon transistor A2 and the grid of described second amorphous silicon transistor A3, connects the first row sweep signal SCAN1 respectively;
Second sub-input end of described switch element 20 is the grid of described 3rd amorphous silicon transistor A4, connects the second line scan signals SCAN2;
Second input end of described switch element 20 is respectively first pole of described first amorphous silicon transistor A2 and first pole of described 3rd amorphous silicon transistor A4;
The output terminal of described switch element 20 is second pole of described first amorphous silicon transistor A2;
Second pole of described 3rd amorphous silicon transistor A4 connects first pole of described second amorphous silicon transistor A3, and second pole of described second amorphous silicon transistor A3 connects the output terminal of described driver element.
First of described first amorphous silicon transistor A2 very drains, the second very source electrode of described first amorphous silicon transistor A2; Or second of described first amorphous silicon transistor A2 very drains, the first very source electrode of described first amorphous silicon transistor A2;
First of described second amorphous silicon transistor A3 very drains, the second very source electrode of described second amorphous silicon transistor A3; Or second of described second amorphous silicon transistor A3 very drains, the first very source electrode of described second amorphous silicon transistor A3;
First of described 3rd amorphous silicon transistor A4 very drains, the second very source electrode of described 3rd amorphous silicon transistor A4; Or second of described 3rd amorphous silicon transistor A4 very drains, the first very source electrode of described 3rd amorphous silicon transistor A4.
Described energy-storage units comprises one or more combination in any of following electric capacity:
First electric capacity C
s(Fig. 4 is not shown), described first electric capacity C
sfirst end connect supply voltage VDD, described first electric capacity C
sthe second end connect the second input end of described driver element;
The first end of the second electric capacity C1 (Fig. 4 is not shown), described second electric capacity C1 connects supply voltage VDD, and second end of described second electric capacity C1 connects the output terminal of described driver element;
The first end of the 3rd electric capacity C2 (Fig. 4 is not shown), described 3rd electric capacity C2 connects the second input end of described driver element, and second end of described 3rd electric capacity C2 connects the output terminal of described driver element.
Or described energy-storage units comprises one or more combination in any of following electric capacity:
First electric capacity, the first end of described first electric capacity C1 connects the second input end of described driver element; Second end of described first electric capacity connects second pole of described 3rd amorphous silicon transistor A4;
Second electric capacity, the first end of described second electric capacity C2 connects described supply voltage; Second end of described second electric capacity connects second pole of described 3rd amorphous silicon transistor A4.
In the above-described embodiments, three TFT A2, A3, A4 form switch element, can be made up of non-crystalline silicon tft; TFTA1 forms driver element, can be made up of low temperature polycrystalline silicon TFT.
Below the third embodiment of the present invention is described.
As shown in Figure 5, described driver element 10 comprises: the first polysilicon transistors DR1, the second polysilicon transistors DR2;
Described switch element 20 comprises: the first amorphous silicon transistor SW1, the second amorphous silicon transistor SW2;
The first input end of described driver element 10 is first pole of described second polysilicon transistors DR2; Second input end of described driver element is the grid of described second polysilicon transistors DR2; The output terminal of described driver element is second pole of described second polysilicon transistors DR2;
The first input end of described switch element 20 is the grid of described first amorphous silicon transistor SW1; Second input end of described switch element is first pole of described first amorphous silicon transistor SW1;
The output terminal of described switch element 20 is second pole of described second amorphous silicon transistor SW2;
First pole of described second amorphous silicon transistor SW2 is connected with first pole of described first amorphous silicon transistor SW1; The grid of described second amorphous silicon transistor SW2 is connected with the grid of described first amorphous silicon transistor SW1;
The grid of described second polysilicon transistors DR2 is connected with the grid of described first polysilicon transistors DR1, and first pole of described second polysilicon transistors DR2 is connected with first pole of described first polysilicon transistors DR1;
Second pole of the first amorphous silicon transistor SW1 is connected with second pole of described first polysilicon transistors DR1.
Optionally, first of described first polysilicon transistors DR1 very drains, the second very source electrode of described first polysilicon transistors DR1; Or second of described first polysilicon transistors DR1 very drains, the first very source electrode of described first polysilicon transistors DR1;
First of described second polysilicon transistors DR2 very drains, the second very source electrode of described second polysilicon transistors DR2; Or second of described second polysilicon transistors DR2 very drains, the first very source electrode of described second polysilicon transistors DR2;
First of described first amorphous silicon transistor SW1 very drains, the second very source electrode of described first amorphous silicon transistor SW1; Or second of described first amorphous silicon transistor SW1 very drains, the first very source electrode of described first amorphous silicon transistor SW1;
First of described second amorphous silicon transistor SW2 very drains, the second very source electrode of described second amorphous silicon transistor SW2; Or second of described second amorphous silicon transistor SW2 very drains, the first very source electrode of described second amorphous silicon transistor SW2.
Described energy-storage units comprises one or more combination in any of following electric capacity:
First electric capacity C
s(Fig. 5 is not shown), described first electric capacity C
sfirst end connect supply voltage VDD, described first electric capacity C
sthe second end connect the second input end of described driver element;
The first end of the second electric capacity C1, described second electric capacity C1 connects supply voltage VDD, and second end of described second electric capacity C1 connects the output terminal of described driver element;
The first end of the 3rd electric capacity C2, described 3rd electric capacity C2 connects the second input end of described driver element, and second end of described 3rd electric capacity C2 connects the output terminal of described driver element.
In the above-described embodiments, TFT SW1, SW2 form switch element, can be made up of non-crystalline silicon tft; TFT DR1, DR2 are driver element, are made up of low temperature polycrystalline silicon TFT.
Wherein, polysilicon transistors of the present invention is formed by metal inducement side crystallization MILC technique.
Above in each embodiment, the control pole of transistor corresponds to the grid of TFT, and the first current lead-through pole and the second current lead-through pole can reciprocity, namely, can to be extremely source electrode also can the be drain electrode of first current lead-through, accordingly, the second current lead-through can be extremely that to drain also can be source electrode.
The present invention proposes a kind of image element circuit of organic electroluminescence display device and method of manufacturing same, utilize MILC technology to prepare and there is high conforming TFT transistor, and effectively reduced the leakage current of TFT transistor by Pixel Design, thus improve the image gray levels of OLED display and the display quality of picture.The present invention is on the basis keeping MILC low temperature polycrystalline silicon TFT high uniformity and advantage of low cost, by the technological means in controlling crystallizing region, reach the technique effect reducing switching transistor leakage current, thus solve the technical matters that the AMOLED backboard utilizing MILC technology to prepare cannot realize the display of high gray scale.Image element circuit of the present invention can utilize metal side to prepare to revulsive crystallization (MILC) technology.By the technological means in controlling crystallizing region, reach the technique effect reducing switching transistor leakage current, thus solve the technical matters that the AMOLED backboard utilizing MILC technology to prepare cannot realize the display of high gray scale.
The image element circuit that MILC technology can be utilized to prepare the present invention state, below in conjunction with the unit pixel circuit layout such as shown in Fig. 6 to Figure 13, and the circuit sectional view shown in Figure 14, the preparation method of image element circuit of the present invention is introduced.
Fig. 6 to Figure 13 is the vertical view of image element circuit in technological process as shown in Figure 2.Manufacturing process comprises the following steps:
First, as shown in Figure 6, grown buffer layer 1 on the glass substrate; Growth active layer (amorphous silicon (a-Si) film); Be etched with active layer, form the active channel district 2-1 be made up of amorphous silicon membrane.
Then, as shown in Figure 7, photoetching also deposits induction pioneer metal level 3, and in this enforcement, preferred Ni is as pioneer's metal; The induction pioneer metal level 3 that MILC technology is formed can be the metals such as Ni, Cu, utilizes metal inducement to reduce crystallization temperature.
Then, as shown in Figure 8, utilize the crystallization of MILC technology realization to active area, form the active channel district 2-2 be made up of low temperature polycrystalline silicon; Growth gate insulation layer; Deposition the first metal layer; Etching first metal layer and gate insulation layer, form the gate insulator of transistor T1, the gate insulator of transistor T2, the gate electrode 5-1 of transistor T1, the gate electrode 5-2 of transistor T2, the first electrode 5-3 of memory capacitance Cs, scan signal line VSEL5-4;
Then, as shown in Figure 9, source-drain area ion implantation, form source transistor drain region, source transistor drain region comprises: the source-drain area of transistor T1 and the source-drain area of transistor T2; Wherein, the source-drain area of transistor T1 comprises the source region 6-11 of transistor T1 and the drain region 6-12 of transistor T1; The source-drain area of transistor T2 comprises the source region 6-21 of transistor T2 and the drain region 6-22 of transistor T2; Anneal to activate injection ion; Metallization medium layer; Etching forms contact hole 8;
Then, as shown in Figure 10, depositing second metal layer; Etching source and drain metal, forms source-drain electrode, the source-drain electrode of transistor T2, the memory capacitance C of T1 transistor
sthe second electrode 9-3, data signal line Vdata 9-4, power signal line VDD 9-5; The source-drain electrode of T1 transistor comprises: the source electrode 9-11 of transistor T1, the drain electrode 9-12 of transistor T1; The source-drain electrode 2 of transistor T2 comprises: the drain electrode 9-22 of the source electrode 9-21 of transistor T2, transistor T2;
Then, as shown in figure 11, growth of planar layer, etching stroke via hole 11;
Then, as shown in figure 12, deposit transparent conductive electrode ITO layer, etching ITO, forms ITO district 12;
Then, as shown in figure 13, evaporation oled layer 13.
The sectional view of the image element circuit completed as shown in figure 14.
In Figure 14, cushion 1 can be silicon dioxide SiO2, silicon nitride SiNX, or by both overlapping double-deckers formed.
The active layer of transistor comprises: the transistor active channel region 2-1 be made up of amorphous silicon (a-Si) and the transistor active channel region 2-2 consisted of the low temperature polycrystalline silicon (LTPS) that MILC crystallization technology is formed.
Gate insulation layer can be silicon dioxide SiO2, silicon nitride SiNX, or by both overlapping double-deckers formed.Gate insulation layer comprises: the gate insulator of T1 transistor, the gate insulator of T2 transistor, the first metal layer.
The first metal layer, for the formation of first electrode of gate electrode and VSEL figure and memory capacitance Cs, can be other metal or alloy materials such as Mo.The first metal layer comprises: the gate electrode 5-1 of transistor T1, the gate electrode 5-2 of transistor T2, the first electrode 5-3 of memory capacitance Cs, scan signal line VSEL5-4.
The source region of transistor and drain region (what formed by ion implantation heavily mixes source transistor drain region) comprise source-drain area, the source-drain area of transistor T2, dielectric layer 7, source and drain contact hole 8, second metal level of transistor T1.
The source-drain area of transistor T1 comprises the source region 6-11 of transistor T1, the drain region 6-12 of transistor T1.
The source-drain area of transistor T2 comprises the source region 6-21 of transistor T2, the drain region 6-22 of transistor T2.
Dielectric layer 7 can be silicon dioxide SiO2, silicon nitride SiNX, or by both overlapping double-deckers formed.
Source and drain contact hole 8, by appointed area etching insulating layer, realizes the connection of upper and lower double layer of metal.
Second metal level, for the formation of second electrode of source-drain electrode and Vdata, VDD figure and memory capacitance Cs, can be other metal or alloy materials such as Mo.
Second metal level comprises the source-drain electrode of T1 transistor, the source-drain electrode 9-2 of transistor T2, the second electrode 9-3 of memory capacitance CS, data signal line Vdata 9-4, power signal line VDD9-5, planarization layer 10, planarization layer via hole 11, transparency conductive electrode ITO layer 12, organic luminous layer 13.
The source-drain electrode of T1 transistor comprises: the source electrode 9-11 of transistor T1, the drain electrode 9-12 of transistor T1.
The source-drain electrode of transistor T2 comprises the source electrode 9-21 of transistor T2, the drain electrode 9-22 of transistor T2.
Planarization layer 10 can be silicon dioxide SiO2, silicon nitride SiNX, or by both overlapping double-deckers formed.
Planarization layer via hole 11 is by etching planarization layer to realize the connection of ITO layer and the second metal level in appointed area.
Transparency conductive electrode ITO layer 12 is transparent conductive film tin indium oxide (Indium-Tin Oxide, ITO).
The Organic Light Emitting Diode (Organic Light Emitting Diode, OLED) that organic luminous layer 13 forms for multilayer organic film.
The present invention utilizes the technological means of MILC technology feasible region crystallization, in conjunction with low temperature polycrystalline silicon TFT and non-crystalline silicon tft advantage separately, utilize MILC technology to prepare and there is high consistance TFT transistor, and effectively reduced the leakage current of TFT transistor by Pixel Design, thus improve the display quality of OLED display image gray levels and picture.
The above is the preferred embodiment of the present invention, it should be pointed out that for those skilled in the art, under the prerequisite not departing from principle of the present invention, can also make some improvement, and these improvement also should be considered as protection scope of the present invention.
Claims (7)
1. an image element circuit, is characterized in that, comprising: driver element, switch element, energy-storage units and Organic Light Emitting Diode;
The first input end of described driver element connects supply voltage, second input end of described driver element is connected with the output terminal of described switch element, the output terminal of described driver element connects the first end of described Organic Light Emitting Diode, for exporting the current signal driving described organic light-emitting diode; Described driver element is made up of polysilicon transistors;
The first input end line of input sweep signal of described switch element, the second input end input data voltage of described switch element;
The two ends of described energy-storage units are connected with described driver element, for storage voltage; And
Second end ground connection of described Organic Light Emitting Diode;
Described driver element comprises: polysilicon transistors;
The first input end of described driver element is the first pole of described polysilicon transistors, and the second input end of described driver element is the grid of described polysilicon transistors, and the output terminal of described driver element is the second pole of described polysilicon transistors;
Described switch element comprises: the first amorphous silicon transistor, the second amorphous silicon transistor, the 3rd amorphous silicon transistor;
The first input end of described switch element comprises the first sub-input end and the second sub-input end;
First sub-input end of described switch element is the grid of described first amorphous silicon transistor and the grid of described second amorphous silicon transistor, connects the first row sweep signal respectively;
Second sub-input end of described switch element is the grid of described 3rd amorphous silicon transistor, connects the second line scan signals;
Second input end of described switch element is respectively the first pole of described first amorphous silicon transistor and the first pole of described 3rd amorphous silicon transistor;
The output terminal of described switch element is the second pole of described first amorphous silicon transistor;
Second pole of described 3rd amorphous silicon transistor connects the first pole of described second amorphous silicon transistor, and the second pole of described second amorphous silicon transistor connects the output terminal of described driver element.
2. image element circuit according to claim 1, is characterized in that, described switch element comprises: amorphous silicon transistor;
The first input end of described switch element is the grid of described amorphous silicon transistor; Second input end of described switch element is the first pole of described amorphous silicon transistor, and the output terminal of described switch element is the second pole of described amorphous silicon transistor.
3. image element circuit according to claim 2, is characterized in that,
First of described polysilicon transistors very drains, the second very source electrode of described polysilicon transistors; Or second of described polysilicon transistors very drains, the first very source electrode of described polysilicon transistors;
Second of described amorphous silicon transistor very drains, the first very source electrode of described amorphous silicon transistor; Or first of described amorphous silicon transistor very drains, the second very source electrode of described amorphous silicon transistor.
4. image element circuit according to claim 1, is characterized in that,
First of described first amorphous silicon transistor very drains, the second very source electrode of described first amorphous silicon transistor; Or second of described first amorphous silicon transistor very drains, the first very source electrode of described first amorphous silicon transistor;
First of described second amorphous silicon transistor very drains, the second very source electrode of described second amorphous silicon transistor; Or second of described second amorphous silicon transistor very drains, the first very source electrode of described second amorphous silicon transistor;
First of described 3rd amorphous silicon transistor very drains, the second very source electrode of described 3rd amorphous silicon transistor; Or second of described 3rd amorphous silicon transistor very drains, the first very source electrode of described 3rd amorphous silicon transistor.
5. image element circuit according to claim 1, is characterized in that, described energy-storage units comprises one or more combination in any of following electric capacity:
First electric capacity, the first end of described first electric capacity connects supply voltage, and the second end of described first electric capacity connects the second input end of described driver element;
Second electric capacity, the first end of described second electric capacity connects supply voltage, and the second end of described second electric capacity connects the output terminal of described driver element;
3rd electric capacity, the first end of described 3rd electric capacity connects the second input end of described driver element, and the second end of described 3rd electric capacity connects the output terminal of described driver element.
6. image element circuit according to claim 1, is characterized in that, described energy-storage units comprises one or more combination in any of following electric capacity:
First electric capacity, the first end of described first electric capacity connects the second input end of described driver element; Second end of described first electric capacity connects the second pole of described 3rd amorphous silicon transistor;
Second electric capacity, the first end of described second electric capacity connects described supply voltage; Second end of described second electric capacity connects the second pole of described 3rd amorphous silicon transistor.
7. image element circuit according to claim 1, is characterized in that, described polysilicon transistors is formed by metal inducement side crystallization MILC technique.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1167114C (en) * | 2000-10-31 | 2004-09-15 | Pt普拉斯有限公司 | Method for manufacturing thin film transistor with polycrystalline active layer |
| CN1871631A (en) * | 2003-09-23 | 2006-11-29 | 伊格尼斯创新有限公司 | Pixel driver circuit |
| CN1977303A (en) * | 2004-06-29 | 2007-06-06 | 伊格尼斯创新有限公司 | Voltage-programming scheme for current-driven AMOLED displays |
| US7310077B2 (en) * | 2003-09-29 | 2007-12-18 | Michael Gillis Kane | Pixel circuit for an active matrix organic light-emitting diode display |
| CN101232041A (en) * | 2007-01-26 | 2008-07-30 | 三星电子株式会社 | Display device and manufacturing method thereof |
-
2011
- 2011-11-23 CN CN201110376530.2A patent/CN102708788B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1167114C (en) * | 2000-10-31 | 2004-09-15 | Pt普拉斯有限公司 | Method for manufacturing thin film transistor with polycrystalline active layer |
| CN1871631A (en) * | 2003-09-23 | 2006-11-29 | 伊格尼斯创新有限公司 | Pixel driver circuit |
| US7310077B2 (en) * | 2003-09-29 | 2007-12-18 | Michael Gillis Kane | Pixel circuit for an active matrix organic light-emitting diode display |
| CN1977303A (en) * | 2004-06-29 | 2007-06-06 | 伊格尼斯创新有限公司 | Voltage-programming scheme for current-driven AMOLED displays |
| CN101232041A (en) * | 2007-01-26 | 2008-07-30 | 三星电子株式会社 | Display device and manufacturing method thereof |
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