CN102693389A - Method and apparatus for controlling CPU and CPU - Google Patents
Method and apparatus for controlling CPU and CPU Download PDFInfo
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- CN102693389A CN102693389A CN2011100686347A CN201110068634A CN102693389A CN 102693389 A CN102693389 A CN 102693389A CN 2011100686347 A CN2011100686347 A CN 2011100686347A CN 201110068634 A CN201110068634 A CN 201110068634A CN 102693389 A CN102693389 A CN 102693389A
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Abstract
The invention discloses a method and a system for controlling a CPU and the CPU. The method is used for controlling the CPU in a computer, comprising: setting a authentication logic unit. The authentication logic unit has a first state and a second state and when the logic unit is in the first state, the CPU is in normal operation condition. The method also comprises the following steps: in the starting-up procedure of the computer, the authentication logic unit is in the second state and determines whether a correct authentication message is received; and, if not, sends a controlling signal to the CPU to stop the operation of the CPU. The applying of the method to a computer is equivalent to adding a lock to the CPU, wherein only with the correct authentication message can the CPU operate normally; otherwise the CPU will stop operating and be locked, so that the method and apparatus prevent unauthorized occupation of the compute and facilitate asset management.
Description
Technical field
The present invention relates to the data security technical field, particularly a kind of method, device and CPU that CPU is controlled.
Background technology
Along with popularizing of personal computer, the quantity that the individual has computing machine gets more and more, and especially in some company, because requirements of one's work, everyone is equipped with one or two computing machines.At present, the situation that computing machine is illegally occupied in the company often occurs in intra-company, make that the difficulty of asset management is increasing, therefore, how preventing that computing machine from being illegally occupied becomes the problem that presses for very much solution.
Summary of the invention
The embodiment of the invention is to provide a kind of method, device and CPU that CPU is controlled, and can avoid computing machine to be illegally occupied.
The embodiment of the invention provides a kind of method that CPU is controlled; Be used for the CPU of computing machine is controlled; Comprise: the authentication logic unit is set; Said authentication logic unit has first state and second state, and when said authentication logic unit was in first state, said CPU was in normal operating conditions; Said method also comprises:
In the computer starting process, said authentication logic unit is in second state,
Whether said authentication logic unit judges receives correct authentication information, if do not receive, then sends control signal to said CPU, to stop said CPU work.
Wherein, said method also comprises: timing unit and timing length are set,
Whether said authentication logic unit judges receives correct authentication information in timing length, if do not receive, then send control signal to said CPU, to stop said CPU work.
Wherein, when said authentication logic unit was in second state, if in said timing length, correct authentication information was received in said authentication logic unit, then sends control signal to said timing unit, stopped the timing operation with the notice timing unit.
Wherein, said method also comprises: timing unit and timing length are set;
Whether said authentication logic unit judges receives the order of correct authentication information and forbidding authentication in the given time, if receive, then sends control signal to said timing unit, stops the timing operation with the notice timing unit;
After said CPU was restarted, said authentication logic unit was in first state.
Wherein, to be in be first state to said authentication logic unit acquiescence;
After said authentication logic unit was carried out initialization, said authentication logic unit switched to second state; Perhaps, when said authentication logic unit is carried out initialization, and after said CPU restarted, said authentication logic unit switched to second state.
Wherein, said authentication logic unit is a digital logic chip.
The embodiment of the invention also provides a kind of device that CPU is controlled, and is used for the CPU of computing machine is controlled, and said device comprises:
The authentication logic unit, said authentication logic unit has first state and second state, and when said authentication logic unit was in first state, said CPU was in normal operating conditions; In the computer starting process, said authentication logic unit is in second state, and said authentication logic unit comprises:
Judgment sub-unit is used to judge whether to receive correct authentication information, does not then notify control sub unit if receive;
Control sub unit is used for when said judgment sub-unit is not received correct authentication information, sending control signal to said CPU, to stop said CPU work.
Wherein, said authentication logic unit also comprises:
Timing unit is used to be provided with timing length and timing operation;
Said judgment sub-unit also is used to judge in timing length, whether to receive correct authentication information, does not then notify control sub unit if receive;
Wherein, Said control sub unit also is used for said authentication logic unit and is in second state, when said judgment sub-unit is received correct authentication information in said timing length; Send control signal to said timing unit, stop the timing operation with the notice timing unit.
Wherein, said control sub unit when also being used in said timing length said judgment sub-unit and receiving the order of correct authentication information and forbidding authentication, is sent control signal to said timing unit, stops the timing operation with the notice timing unit;
Said authentication logic unit also is used for first state that after said CPU is restarted, converts into.
Wherein, said authentication logic unit is a digital logic chip.
The present invention implements a kind of CPU also is provided, and comprising:
The CPU main body is used to carry out data processing;
The authentication logic unit is used for being in second state in the computer starting process, judges whether to receive correct authentication information, if do not receive, then sends control signal to said CPU, to stop said CPU work.
Wherein, said CPU also comprises: timing unit,
Said timing unit is used for behind computer starting, picking up counting;
Said authentication logic unit is used to judge in timing length, whether to receive correct authentication information, if do not receive, then sends control signal to said CPU, to stop said CPU work.
Wherein, when said authentication logic unit was in second state, if in said timing length, correct authentication information was received in said authentication logic unit, then sends control signal to said timing unit, stopped the timing operation with the notice timing unit.
Wherein, said CPU also comprises: timing unit,
Whether said authentication logic unit judges receives the order of correct authentication information and forbidding authentication in the given time, if receive, then sends control signal to said timing unit, stops the timing operation with the notice timing unit;
After said CPU was restarted, said authentication logic unit was in first state.
Use the present invention, be equivalent to add a lock to CPU, only under the correct situation of authentication information, CPU could operate as normal, otherwise CPU will quit work and be locked.Thereby avoided computing machine to be illegally occupied, made things convenient for asset management.
Description of drawings
In order to be illustrated more clearly in the technical scheme in the present invention's enforcement; The accompanying drawing of required use is done to introduce simply in will describing embodiment below; Obviously, the accompanying drawing in describing below only is some embodiments of the present invention, for those of ordinary skills; Under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is the method flow diagram that CPU is controlled according to the embodiment of the invention;
Fig. 2 is the apparatus structure synoptic diagram that CPU is controlled according to the embodiment of the invention;
Fig. 3 is the logical organization synoptic diagram according to the CPU of the embodiment of the invention.
Embodiment
To combine the accompanying drawing in the embodiment of the invention below, the technical scheme in the embodiment of the invention is carried out clear, intactly description, obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills are not making the every other embodiment that is obtained under the creative work prerequisite, all belong to the scope of the present invention's protection.
Referring to Fig. 1; It is the method flow diagram that CPU is controlled according to the embodiment of the invention; This enforcement is used for the CPU of computing machine is controlled, and specifically comprises: the authentication logic unit is set, and said authentication logic unit has first state and second state; When said authentication logic unit was in first state, said CPU was in normal operating conditions; That is to say that when the authentication logic unit was in first state, the logic authentication ' unit was in disabled status, when the authentication logic unit was in second state, the logic authentication ' unit was in initiate mode, and flow process shown in Figure 1 specifically comprises:
Step 101, in the computer starting process, said authentication logic unit is in second state, promptly launches the logic authentication ' unit;
Concrete, behind computer starting, import initial information through special data channel to the authentication logic unit by software or Basic Input or Output System (BIOS) (BIOS, Basic Input Output System).
Above-mentioned special data channel can use any data channel, as long as can realize communication, for example uses I
2The passage of C agreement here, does not limit employed data channel, employed communication protocol is not limited yet.
Above-mentioned initial information is the information that is used for subsequent authentication, and is different according to authentication mode, and initial information also can be different accordingly,, the particular content of initial information do not done qualification here, as long as can satisfy authentication requesting.
Step 102, whether said authentication logic unit judges receives correct authentication information, if do not receive, then sends control signal to said CPU, to stop said CPU work.
The above-mentioned step of receiving correct authentication information that judges whether is specially: judge that the authentication information that receives and the initial information of having stored be whether identical or mate; If it is inequality or do not match; Then do not receive correct authentication information, otherwise think and received correct authentication information.
Here; Can adopt any possible authentication mode; For example cipher authentication, public and private key authentication, digital certificate authentication or the like, the embodiment of the invention is not done qualification to concrete authentication mode, and any mode of authentication function or method of can realizing can be applied among the application.
Like this, be equivalent to add a lock to CPU, only under the correct situation of authentication information, CPU could operate as normal, otherwise CPU will quit work and be locked.Thereby avoided computing machine to be illegally occupied, made things convenient for asset management.
Need to prove, for embodiment illustrated in fig. 1, can also comprise: timing unit and timing length are set; At this moment, whether the authentication logic unit judges receives correct authentication information in timing length, if do not receive; Then send control signal to said CPU again, to stop said CPU work.Like this, if CPU does not receive correct authentication information in official hour, this CPU will quit work and be locked.
Need to prove; When having timing unit; This method can also comprise: when said authentication logic unit was in second state, if in said timing length, correct authentication information was received in said authentication logic unit; Then send control signal, stop the timing operation with the notice timing unit to said timing unit.That is to say,, will stop the timing operation, so that let CPU be in lasting duty if the authentication logic unit has received correct authentication information at the appointed time.
Need to prove, for embodiment illustrated in fig. 1, can also comprise: timing unit and timing length are set; Whether said authentication logic unit judges receives the order of correct authentication information and forbidding authentication in the given time, if receive, then sends control signal to said timing unit, stops the timing operation with the notice timing unit; After said CPU was restarted, said authentication logic unit was in first state.That is to say,, then stop the timing operation if the authentication logic unit has received correct authentication information and the order of forbidding authentication at the appointed time; So that let CPU be in lasting duty; And, after restarting next time, forbidding authentication logic unit; After the authentication logic unit was disabled, the CPU of this moment was equal to conventional CPU.
Need to prove that in a kind of possible embodiment, above-mentioned timing unit can be Watch Dog Timer (Watch Dog Timer).
Need to prove that for embodiment illustrated in fig. 1, said authentication logic unit default conditions are first state for being in; After said authentication logic unit was carried out initialization, said authentication logic unit switched to second state; Perhaps, when said authentication logic unit is carried out initialization, and after said CPU restarted, said authentication logic unit switched to second state.
Need to prove that the authentication logic unit among Fig. 1 is a hardware cell, it can be a digital logic chip.The authentication logic unit here can be the data logic chip of any kind, and the application does not limit the type and the model of digital logic chip.
The embodiment of the invention also provides a kind of device that CPU is controlled, and is used for the CPU of computing machine is controlled, and referring to Fig. 2, said device specifically comprises:
Authentication logic unit 200, said authentication logic unit has first state and second state, and when said authentication logic unit was in first state, said CPU was in normal operating conditions; In the computer starting process, said authentication logic unit is in second state, and said authentication logic unit comprises:
Judgment sub-unit 201 is used to judge whether to receive correct authentication information, does not then notify control sub unit if receive;
Control sub unit 202 is used for when said judgment sub-unit is not received correct authentication information, sending control signal to said CPU, to stop said CPU work.
Above-mentioned authentication logic unit 200 also comprises:
Timing unit (figure does not show) is used to be provided with timing length and timing operation;
Said judgment sub-unit also is used to judge in timing length, whether to receive correct authentication information, does not then notify control sub unit if receive;
Above-mentioned control sub unit also is used for said authentication logic unit and is in second state, when said judgment sub-unit is received correct authentication information in said timing length, sends control signal to said timing unit, stops the timing operation with the notice timing unit.
Above-mentioned control sub unit when also being used in said timing length said judgment sub-unit and receiving the order of correct authentication information and forbidding authentication, is sent control signal to said timing unit, stops the timing operation with the notice timing unit; Said authentication logic unit also is used for first state that after said CPU is restarted, converts into.
Above-mentioned authentication logic unit is a digital logic chip.
Like this, be equivalent to add a lock to CPU, only under the correct situation of authentication information, CPU could operate as normal, otherwise CPU will quit work and be locked.Thereby avoided computing machine to be illegally occupied, made things convenient for asset management.
The embodiment of the invention also provides a kind of CPU, referring to Fig. 3, specifically comprises:
CPU main body 301 is used to carry out data processing;
Authentication logic unit 302 is used for being in second state in the computer starting process, judges whether to receive correct authentication information, if do not receive, then sends control signal to said CPU, to stop said CPU work.
A kind of possible embodiment is that above-mentioned CPU can also comprise: timing unit 303, and said timing unit 303 is used for behind computer starting, picking up counting; Said authentication logic unit 302 is used to judge in timing length, whether to receive correct authentication information, if do not receive, then sends control signal to said CPU, to stop said CPU work.
When said authentication logic unit was in second state, if in said timing length, correct authentication information was received in said authentication logic unit, then sends control signal to said timing unit, stopped the timing operation with the notice timing unit.
Another kind of possible embodiment is; Above-mentioned said CPU can also comprise: timing unit 303; The order of whether receiving correct authentication information and forbidding authentication is in the given time judged in said authentication logic unit 302; If receive, then send control signal to said timing unit, stop the timing operation with the notice timing unit; After said CPU was restarted, said authentication logic unit switched to first state.
Like this, be equivalent to add a lock to CPU, only under the correct situation of authentication information, CPU could operate as normal, otherwise CPU will quit work and be locked.Thereby avoided computing machine to be illegally occupied, made things convenient for asset management.
For the embodiment of device and CPU, because it is basically similar in appearance to method embodiment, so description is fairly simple, relevant part gets final product referring to the part explanation of method embodiment.
Need to prove; In this article; Relational terms such as first and second grades only is used for an entity or operation are made a distinction with another entity or operation, and not necessarily requires or hint relation or the order that has any this reality between these entities or the operation.And; Term " comprises ", " comprising " or its any other variant are intended to contain comprising of nonexcludability; Thereby make and comprise that process, method, article or the equipment of a series of key elements not only comprise those key elements; But also comprise other key elements of clearly not listing, or also be included as this process, method, article or equipment intrinsic key element.Under the situation that do not having much more more restrictions, the key element that limits by statement " comprising ... ", and be not precluded within process, method, article or the equipment that comprises said key element and also have other identical element.
One of ordinary skill in the art will appreciate that all or part of step that realizes in the said method embodiment is to instruct relevant hardware to accomplish through program; Described program can be stored in the computer read/write memory medium; Here the alleged storage medium that gets, as: ROM/RAM, magnetic disc, CD etc.
The above is merely preferred embodiment of the present invention, is not to be used to limit protection scope of the present invention.All any modifications of within spirit of the present invention and principle, being done, be equal to replacement, improvement etc., all be included in protection scope of the present invention.
Claims (15)
1. method that CPU is controlled; Be used for the CPU of computing machine is controlled; It is characterized in that, comprising: the authentication logic unit is set, and said authentication logic unit has first state and second state; When said authentication logic unit was in first state, said CPU was in normal operating conditions; Said method also comprises:
In the computer starting process, said authentication logic unit is in second state,
Whether said authentication logic unit judges receives correct authentication information, if do not receive, then sends control signal to said CPU, to stop said CPU work.
2. method according to claim 1 is characterized in that, said method also comprises: timing unit and timing length are set,
Whether said authentication logic unit judges receives correct authentication information in timing length, if do not receive, then send control signal to said CPU, to stop said CPU work.
3. method according to claim 2; It is characterized in that; When said authentication logic unit was in second state, if in said timing length, correct authentication information was received in said authentication logic unit; Then send control signal, stop the timing operation with the notice timing unit to said timing unit.
4. method according to claim 1 is characterized in that, said method also comprises: timing unit and timing length are set;
Whether said authentication logic unit judges receives the order of correct authentication information and forbidding authentication in the given time, if receive, then sends control signal to said timing unit, stops the timing operation with the notice timing unit;
After said CPU was restarted, said authentication logic unit was in first state.
5. method according to claim 1 is characterized in that,
It is first state that said authentication logic unit acquiescence is in;
After said authentication logic unit was carried out initialization, said authentication logic unit switched to second state; Perhaps, when said authentication logic unit is carried out initialization, and after said CPU restarted, said authentication logic unit switched to second state.
6. method according to claim 1 is characterized in that, said authentication logic unit is a digital logic chip.
7. the device that CPU is controlled is used for the CPU of computing machine is controlled, and it is characterized in that said device comprises:
The authentication logic unit, said authentication logic unit has first state and second state, and when said authentication logic unit was in first state, said CPU was in normal operating conditions; In the computer starting process, said authentication logic unit is in second state, and said authentication logic unit comprises:
Judgment sub-unit is used to judge whether to receive correct authentication information, does not then notify control sub unit if receive;
Control sub unit is used for when said judgment sub-unit is not received correct authentication information, sending control signal to said CPU, to stop said CPU work.
8. device according to claim 1 is characterized in that, said authentication logic unit also comprises:
Timing unit is used to be provided with timing length and timing operation;
Said judgment sub-unit also is used to judge in timing length, whether to receive correct authentication information, does not then notify control sub unit if receive.
9. device according to claim 8 is characterized in that,
Said control sub unit also is used for said authentication logic unit and is in second state, when said judgment sub-unit is received correct authentication information in said timing length, sends control signal to said timing unit, stops the timing operation with the notice timing unit.
10. device according to claim 8 is characterized in that,
Said control sub unit when also being used in said timing length said judgment sub-unit and receiving the order of correct authentication information and forbidding authentication, is sent control signal to said timing unit, stops the timing operation with the notice timing unit;
Said authentication logic unit also is used for first state that after said CPU is restarted, converts into.
11. method according to claim 7 is characterized in that, said authentication logic unit is a digital logic chip.
12. a CPU is characterized in that, comprising:
The CPU main body is used to carry out data processing;
The authentication logic unit is used for being in second state in the computer starting process, judges whether to receive correct authentication information, if do not receive, then sends control signal to said CPU, to stop said CPU work.
13. CPU according to claim 12 is characterized in that, said CPU also comprises: timing unit,
Said timing unit is used for behind computer starting, picking up counting;
Said authentication logic unit is used to judge in timing length, whether to receive correct authentication information, if do not receive, then sends control signal to said CPU, to stop said CPU work.
14. CPU according to claim 13; It is characterized in that; When said authentication logic unit was in second state, if in said timing length, correct authentication information was received in said authentication logic unit; Then send control signal, stop the timing operation with the notice timing unit to said timing unit.
15. CPU according to claim 12 is characterized in that, said CPU also comprises: timing unit,
Whether said authentication logic unit judges receives the order of correct authentication information and forbidding authentication in the given time, if receive, then sends control signal to said timing unit, stops the timing operation with the notice timing unit;
After said CPU was restarted, said authentication logic unit was in first state.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201110068634.7A CN102693389B (en) | 2011-03-22 | 2011-03-22 | A kind of method, device and CPU that CPU is controlled |
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| CN201110068634.7A CN102693389B (en) | 2011-03-22 | 2011-03-22 | A kind of method, device and CPU that CPU is controlled |
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| CN102693389A true CN102693389A (en) | 2012-09-26 |
| CN102693389B CN102693389B (en) | 2016-03-30 |
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| CN105973987A (en) * | 2016-07-22 | 2016-09-28 | 中国特种设备检测研究院 | Storage tank bottom plate detection system |
| WO2018119873A1 (en) * | 2016-12-29 | 2018-07-05 | Gemalto Smart Cards Technology Co., Ltd. | Method for controlling functioning of microprocessor |
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Also Published As
| Publication number | Publication date |
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| CN102693389B (en) | 2016-03-30 |
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