CN102692772B - 液晶显示装置以及驱动液晶显示装置的方法 - Google Patents
液晶显示装置以及驱动液晶显示装置的方法 Download PDFInfo
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Abstract
本发明涉及液晶显示装置以及驱动液晶显示装置的方法。该液晶显示装置包括:基板上彼此交叉以限定多个像素的多个选通线和多个数据线;位于每个像素区域中并且连接至相应的选通线和数据线的薄膜晶体管;位于每个像素区域中并且连接至薄膜晶体管的漏电极的像素电极;以及与像素电极一起形成每个像素区域中的电容器的对向电极,其中,位于第n行线第m列线的像素的像素电极连接至该第m列线上或该第n行线上的相邻像素的对向电极。
Description
技术领域
本发明涉及液晶显示装置,并且更具体地,涉及一种液晶显示装置以及驱动液晶显示装置的方法。
背景技术
直到最近,显示装置一般使用阴极射线管(CRT)。目前,正在进行许多努力和研究,以开发各种类型的平板显示器(例如液晶显示(LCD)装置、等离子体显示板(PDP)、场发射显示器以及电致发光显示器(ELD))来取代CRT。在这些平板显示器中,LCD装置具有诸多优势,例如分辨率高、重量轻、外形薄、尺寸紧凑以及电压电源要求低。
通常,LCD装置包括两个隔开并面向彼此的基板,并且液晶材料插入在两个基板之间。这两个基板包括电极,这些电极面向彼此,使得施加在这些电极之间的电压在液晶材料两端产生电场。液晶材料中的液晶分子的配向(alignment)根据所产生的电场的强度而变化到所产生的电场的方向,从而改变LCD装置的光透射率。因而,LCD装置通过改变所产生的电场的强度来显示图像。
LCD装置分为TN(扭曲向列)模式LCD装置、VA(垂直配向)模式LCD装置以及IPS(共面转换)模式LCD装置。在这些LCD装置中,IPS模式LCD装置具有宽视角的优点。IPS模式LCD装置具有通过共面电场操作的液晶层。
图1是根据现有技术的LCD装置的像素的电路图。
参考图1,LCD装置包括彼此交叉以限定像素区域的选通线GL和数据线DL。在像素区域中,形成有连接到选通线GL和数据线DL的薄膜晶体管T以及连接到薄膜晶体管T的存储电容器Cst和液晶电容器C1c。液晶电容器Clc包括像素电极、公共电极以及位于像素电极和公共电极之间的液晶层。像素电极连接到薄膜晶体管T的漏电极。
当像素电压和公共电压分别施加到像素电极和公共电极时,在像素电极和公共电极之间产生电场,并且该电场操作液晶层。存储电容器Cst用于存储像素电压。
图2是示出根据现有技术的LCD装置的示意图。
参考图2,LCD装置包括多个选通线GLn-1、GLn和GLn+1以及多个数据线DLm-1、DLm和DLm+1,以限定以矩阵形式布置的像素区域。
在像素区域中,形成有连接到相应选通线和数据线的薄膜晶体管T以及连接到该薄膜晶体管T的存储电容器Cst。存储电容器Cst的一个电极连接至薄膜晶体管T的漏电极,并且存储电容器Cst的另一电极连接至公共线。
用线反转(line inversion)方法或点反转(dot inversion)方法操作LCD装置。为了实现这一点,与选通信号同步地对于每个帧反转公共电压的极性并将其施加到相应的公共线。
图3A是示出根据现有技术的LCD装置的阵列基板的平面视图,并且图3B是沿着图3A的线III-III截取的截面图。
参考图3A和图3B,阵列基板包括在基板10上彼此交叉以限定像素区域的选通线12和数据线22。选通绝缘层13位于选通线12和数据线22之间。在像素区域中,形成有连接至选通线12和数据线22的薄膜晶体管T。薄膜晶体管包括栅电极11、半导体层15以及源电极17和漏电极19。
像素电极20形成在像素区域P中,并且连接至薄膜晶体管T的漏电极19。像素电极20形成在选通绝缘层13上,并且与数据线22隔开,以防止与数据线22短路。
钝化层24形成在数据线22和像素电极20上。在钝化层24上形成有与像素电极20对应的公共电极26,并且公共电极26包括多个条形开口OA。
当选通信号和数据信号分别施加到选通线12和数据线22时,根据选通信号导通薄膜晶体管T,并且数据信号通过薄膜晶体管T,并作为像素电压施加到像素电极20。当公共电压施加到公共电极26时,由像素电压和公共电压产生的电场操作液晶层。
图4A和图4B是分别示出根据现有技术的线反转方法和像素反转方法中的像素电压和公共电压的波形的视图。
参考图4A,在线反转方法中,根据从时序控制部产生的极性控制信号,对于每条线和每个帧反转像素电压Vdata的极性。公共电压Vcom的极性被与像素电压Vdata相反地进行反转。
例如,进一步参考图2,坐标(n-1,m-1)处的像素区域被提供有正极性(+)的数据电压Vdata,而坐标(n,m-1)处的像素区域被提供有负极性(-)的数据电压Vdata。在这种情况中,坐标(n-1,m-1)处的像素区域被提供有负极性(-)的公共电压Vcom,而坐标(n,m-1)处的像素区域被提供有正极性(+)的公共电压Vcom。
参考图4B,在像素反转方法中,公共电压Vcom是恒定的,而相对于公共电压Vcom反转像素电压Vdata的极性。
在用上述反转方法操作的现有技术的LCD装置中,公共电压提供部用于向所有像素区域提供公共电压。在这种情况中,由于向所有像素区域提供公共电压,因此功耗增加。
发明内容
因此,本发明涉及一种液晶显示装置以及驱动液晶显示装置的方法,其基本上避免了由现有技术的局限和缺点引起的一个或多个问题。
本发明的优点是提供一种能够降低功耗的液晶显示装置以及驱动液晶显示装置的方法。
在随后的描述中将会部分地阐述本发明的额外的优点、目的和特征,并且部分优点、目的和特征对于已经研究过下面所述的本领域技术人员来说将是显而易见的,或者部分优点、目的和特征将通过本发明的实践来知晓。通过在给出的描述及其权利要求以及附图中特别地指出的结构可以实现并且获得本发明的目的和其它的优点。
为了实现这些和其它优点并且根据本发明的目的,如在此具体化并且广泛描述的,一种液晶显示装置包括:基板上彼此交叉以限定多个像素的多个选通线和多个数据线;位于每个像素区域中并且连接至相应的选通线和数据线的薄膜晶体管;位于每个像素区域中并且连接至薄膜晶体管的漏电极的像素电极;以及与像素电极一起形成每个像素中的电容器的对向电极,其中第n行线第m列线处的像素的像素电极连接至第m列线上或第n行线上的相邻像素的对向电极。
在另一方面,一种驱动液晶显示装置的方法包括:顺序地将选通信号施加到多个选通线,以导通连接至被施加有选通信号的选通线的薄膜晶体管,其中薄膜晶体管位于由彼此交叉的多个选通线和多个数据线限定的多个像素中的每一个中;以及当薄膜晶体管被导通时,通过数据线将像素电压施加到像素的像素电极,其中,对向电极与像素电极一起形成每个像素中的电容器,并且其中,第n行线第m列线处的像素的像素电极连接至第m列线上或第n行线上的相邻像素的对向电极。
将理解的是,本发明的前述一般性描述和下面的详细描述是示例性和说明性的并且意在提供如权利要求所记载的本发明的进一步说明。
附图说明
附图被包括进来以提供本发明的进一步理解,并且被并入本申请且构成本申请的一部分,示出了本发明的实施方式并且与说明书一起用于说明本发明的原理。
在附图中:
图1是根据现有技术的LCD装置的像素的电路图;
图2是示出根据现有技术的LCD装置的示意图;
图3A是示出根据现有技术的LCD装置的阵列基板的平面图,并且图3B是沿着图3A的线III-III截取的截面图;
图4A和图4B是分别示出根据现有技术的线反转方法和像素反转方法中的像素电压和公共电压的波形的视图;
图5是示出根据本发明的第一实施方式的LCD装置的示意图;
图6是示出根据本发明的第一实施方式的LCD装置的电路图;
图7A是示出根据本发明的第一实施方式的LCD装置的阵列基板的平面图;
图7B是沿着图7A的线VII-VII截取的截面图;
图8是示出根据本发明的第一实施方式的LCD装置的电路图;
图9A是示出根据本发明的第二实施方式的LCD装置的阵列基板的平面图;
图9B是沿着图9A的线IX-IX截取的截面图;以及
图10是示出根据本发明的第一或第二实施方式的5个相邻像素的像素电压和对向电压的波形的视图。
具体实施方式
现在将详细参考在附图中示出的本发明的所示的实施方式。
图5是示出根据本发明的第一实施方式的LCD装置的示意图,并且图6是示出根据本发明的第一实施方式的LCD装置的电路图。
参考图5和图6,LCD装置100包括:包括多个像素区域P的液晶面板110;用于操作多个数据线DL的数据驱动器120;用于操作多个选通线GL的选通驱动器130以及用于控制数据驱动器120和选通驱动器130的时序控制部140。
液晶面板110包括彼此交叉以限定矩阵类型(例如,N*M矩阵类型)的像素区域P的选通线GL和数据线DL。
根据通过选通线GL提供的选通信号导通像素区域P中的薄膜晶体管T,并且数据信号被施加到像素区域。
数据驱动器120使用数据控制信号向数据线DL输出数据信号。数据驱动器120可以包括数据计算部,该数据计算部使用位于某一行线(例如,第n行线)的像素的数据电压来计算位于下一行线(例如,第(n+1)行线)的像素的数据电压。
选通驱动器130使用选通控制信号产生选通信号,并向选通线GL输出该选通信号。
时序控制部140从系统(例如视频卡)接收图像数据信号和控制信号(例如垂直和水平同步信号、数据使能信号、数据时钟等),并产生选通控制信号和数据控制信号。时序控制部140处理图像数据信号,并将其输出到数据驱动器120。
参考图6,为了解释的目的,示出了选通线GLn-1到GLn+1、数据线DLm-1到DLm+1以及由选通线和数据线限定的像素。
每个像素包括存储电容器Cst以及连接至相应的选通线和数据线的薄膜晶体管T。存储电容器Cst的两个电极中的一个电极(即像素电极)连接至薄膜晶体管T。存储电容器Cst的另一电极(即对向电极)连接至前一或下一行线处同一列线处的像素的电极(即像素电极)。在这个实施方式中,为了解释的目的,存储电容器Cst的对向电极连接至前一行线处的像素的像素电极。
因此,当像素电压被施加到像素的像素电极时,该像素电压被施加到下一行线处的像素的对向电极并且被存储,并且,以这种方式,顺序地连接同一列线上的像素。
虽然现有技术对于每个像素的公共电极分别地使用公共电压,但是本实施方式将施加到像素(例如,(n,m)处的像素)的像素电压用作施加到下一行线处的像素(例如,(n+1,m)处的像素)的对向电极的电压。因此,不需要单独的公共电压,并且这能够大大地降低功耗。
图7A是示出根据本发明的第一实施方式的LCD装置的阵列基板的平面图,并且图7B是沿着图7A的线VII-VII截取的截面图。
参考图7A和图7B,阵列基板包括在基板200上限定像素区域的选通线212和数据线222,并且选通绝缘层213处于选通线212和数据线222之间。在像素区域中,形成有连接至选通线212和数据线222的薄膜晶体管T。薄膜晶体管T包括栅电极211、半导体层215以及源电极217和漏电极219。
在像素区域中,像素电极220可以形成在选通绝缘层213上,并且连接至薄膜晶体管T的漏电极219。像素电极220与数据线222隔开,以防止与数据线222短路。像素电极可以由透明导电材料制成,例如,由铟锡氧化物(ITO)、铟锌氧化物(IZO)或者铟锡锌氧化物(ITZO)制成。
钝化层224形成在数据线222和像素电极220上。钝化层224由绝缘材料制成。
对向电极226形成在钝化层224上并且与每个像素区域对应。对向电极226在像素区域中具有多个条形开口OA。
此外,对向电极226可以连接至位于前一行线同一列线处的像素区域的像素电极220。例如,对向电极226具有在位于前一行线的像素区域上延伸的延伸部分,并通过接触孔225与位于前一行线的像素区域的像素电极220接触。接触孔形成在钝化层224中,并且暴露像素电极220。
如上面所描述的,在第一实施方式中,像素的像素电极连接至列线上的相邻像素的对向电极。因此,当像素导通并被施加有像素电压时,该像素电压作为公共电压被施加到相邻像素的对向电极,并且这种方式沿着列线进行。因此,在没有使用单独的公共电压的情况下,每个像素的对向电极能够被施加有来自其相邻像素的像素电压作为对向电压。
下面解释本发明的第二实施方式。除了相邻像素之间的关系以外,本发明的第二实施方式的构造与第一实施方式的构造类似。因此,可以省略对与第一实施方式的部件类似的部件的解释。
图8是示出根据本发明的第一实施方式的LCD装置的电路图。
参考图8,为了解释的目的,示出选通线GLn-1到GLn+1、数据线DLm-1到DLm+1和由选通线和数据线限定的像素。
每个像素包括存储电容器Cst以及连接至相应的选通线和数据线的薄膜晶体管T。存储电容器Cst的两个电极中的一个电极(即,像素电极)连接至薄膜晶体管T。存储电容器Cst的另一电极(即,对向电极)连接至位于前一或下一列线同一行线的像素的电极(即,像素电极)。在该实施方式中,为了解释的目的,存储电容器Cst的对向电极连接至位于前一列线的像素的像素电极。
因此,当将像素电压施加到像素的像素电极时,该像素电压被施加到位于下一列线的像素的对向电极,并被存储,并且,以这种方式,顺序地连接同一行线上的像素。
虽然现有技术对于每个像素的公共电极分别地使用公共电压,但是该实施方式使用施加到像素(例如,(n,m)处的像素)的像素电压作为施加到位于下一列线的像素(例如,(n,m+1)处的像素)的对向电极的电压。因此,不需要单独的公共电压,并且这能够大大降低功耗。
图9A是示出根据本发明的第二实施方式的LCD装置的阵列基板的平面图,并且图9B是沿着图9A的线IX-IX截取的截面图。
参考图9A和图9B,阵列基板包括基板300上限定像素区域的选通线312和数据线322,并且选通绝缘层313位于选通线312和数据线322之间。在像素区域中,形成有连接至选通线312和数据线322的薄膜晶体管T。薄膜晶体管T包括栅电极311、半导体层315以及源电极317和漏电极319。
在像素区域中,像素电极320可以形成在选通绝缘层313上,并且连接至薄膜晶体管T的漏电极319。像素电极320与数据线322隔开,以防止与数据线322短路。像素电极320可以由透明导电材料制成,例如,由铟锡氧化物(ITO)、铟锌氧化物(IZO)或者铟锡锌氧化物(ITZO)制成。
钝化层324形成在数据线322和像素电极320上。钝化层324由绝缘材料制成。
对向电极326形成在钝化层324上并且与每个像素区域对应。对向电极326在像素区域中具有多个条形开口OA。
此外,对向电极326可以连接至位于前一列线同一行线的像素区域的像素电极320。例如,对向电极326具有在位于前一列线的像素区域上延伸的延伸部分,并通过接触孔325与位于前一列线的像素区域的像素电极320接触。接触孔325形成在钝化层324中,并且暴露像素电极320。
如上面所描述的,在第二实施方式中,像素的像素电极连接至行线上的相邻像素的对向电极。因此,当像素导通,并被施加有像素电压时,该像素电压被施加到相邻像素的对向电极作为公共电压,并且这种方式沿着行线进行。因此,在没有使用单独的公共电压的情况下,每个像素的对向电极能够被施加有来自其相邻像素的像素电压作为对向电压。
图10是示出根据本发明的第一或第二实施方式的5个相邻像素的像素电压和对向电压的波形的视图。
为了解释的目的,根据第一或第二实施方式的以级联方式连接的5个相邻像素(即,第一至第五像素)的像素电压和公共电压之间存在绝对电压差,分别为2V、4V、6V、8V和4V。此外,与第一至第五像素对应的极性控制信号分别具有高状态、低状态、高状态、低状态和高状态,并且极性控制信号的高状态或低状态确定像素电压相对于对向电压的正或负极性。此外,第一像素具有2V的像素电压以及0V的对向电压。在图5中,Vdata和Vcom分别表示每个像素的像素电压和对向电压。
在这种情况中,第二像素的对向电极具有2V的对向电压(其是第一像素的像素电压)。因为第二像素的电压差是4V,所以-2V的像素电压(其是通过从2V减去4V得到的)被施加到第二像素的像素电极。
然后,第三电极的对向电极具有-2V的对向电压(其是第二像素的像素电压)。因为第三像素的电压差是6V,所以4V的像素电压(其是通过将-2V与6V相加得到的)被施加到第三像素的像素电极。
然后,第四像素的对向电极具有4V的对向电压(其是第三电极的像素电压)。因为第四像素的电压差是8V,所以-4V的像素电压(其是通过从4V减去8V得到的)被施加到第四像素的像素电极。
然后,第五像素的对向电极具有-4V的对向电压(其是第四像素的像素电压)。因为第五像素的电压差是4V,所以0V的像素电压(其是通过将-4V与4V相加得到的)被施加到第五像素的像素电极。
如上面所描述的,考虑施加到相邻像素的像素电压来确定施加到像素的像素电压,并且,为此,可以在数据驱动器中采用数据计算部。
在上面描述的实施方式中,施加到像素的像素电压用作行线或列线上的相邻像素的对向电压。因此,不需要单独的公共电压和公共电压提供部,并且可以大大降低功耗和制造成本。
对于本领域技术人员来说显而易见的是,在不偏离本发明的精神或范围的情况下能够在本发明中进行各种修改和变化。因此,本发明意在涵盖本发明的修改和变化,只要它们落入所附权利要求及其等价物的范围内。
本发明要求于2011年3月21日在韩国提交的韩国专利申请No.10-2011-0024823的优先权,出于所有目的其通过引用并入这里,如在这里完全阐述一样。
Claims (6)
1.一种液晶显示装置,该液晶显示装置包括:
多个选通线和多个数据线,所述多个选通线和所述多个数据线在基板上彼此交叉以限定多个像素;
薄膜晶体管,所述薄膜晶体管位于每个像素区域中并且连接至相应的选通线和数据线;
像素电极,所述像素电极位于每个像素区域中并且连接至所述薄膜晶体管的漏电极;
对向电极,所述对向电极与所述像素电极一起形成每个像素区域中的电容器;以及
数据驱动器,所述数据驱动器向所述数据线输出像素电压;
其中,位于第n行线第m列线的像素的像素电极连接至所述第m列线上或所述第n行线上的相邻像素的所述对向电极,
其中,所述数据驱动器包括数据计算部,所述数据计算部使用施加到所述像素的所述像素电压来计算施加到所述相邻像素的像素电压。
2.根据权利要求1所述的装置,所述装置进一步包括:
选通绝缘层,所述选通绝缘层位于所述选通线上;
半导体层,所述半导体层位于所述选通绝缘层上,其中所述数据线位于所述选通绝缘层上;
源电极和漏电极,所述源电极和所述漏电极位于所述半导体层上;以及
钝化层,所述钝化层位于所述数据线、所述源电极和所述漏电极以及所述像素电极上,并且包括暴露所述像素电极的接触孔;
其中,所述对向电极位于所述钝化层上,并且包括多个条形开口,并且
其中,所述相邻像素的所述对向电极通过所述接触孔连接至所述像素的所述像素电极。
3.根据权利要求1所述的装置,所述装置进一步包括:
选通驱动器,所述选通驱动器向所述选通线输出选通信号;以及
时序控制部,所述时序控制部产生用于控制所述数据驱动器的数据控制信号以及用于控制所述选通驱动器的选通控制信号。
4.根据权利要求1所述的装置,其中,所述数据计算部以下述方法来计算施加到所述相邻像素的像素电压:当所述相邻像素具有正极性时,将所述像素的所述像素电压与施加到所述相邻像素的像素电极和对向电极的电压之间的绝对电压差相加,而当所述相邻像素具有负极性时,从所述像素的所述像素电压减去所述相邻像素的绝对电压差。
5.一种驱动液晶显示装置的方法,所述方法包括:
顺序地将选通信号施加到多个选通线,以导通连接到被施加有所述选通信号的选通线的薄膜晶体管,其中所述薄膜晶体管位于由彼此交叉的所述多个选通线和多个数据线限定的多个像素中的每一个中;以及
当所述薄膜晶体管导通时,通过所述数据线将像素电压施加到所述像素的像素电极,
其中,对向电极与所述像素电极一起形成每个像素中的电容器,并且
其中,位于第n行线第m列线的像素的像素电极连接至所述第m列线上或所述第n行线上的相邻像素的对向电极,
其中,使用施加到所述像素的所述像素电压来计算施加到所述相邻像素的像素电压。
6.根据权利要求5所述的方法,其中,以下述方法来计算施加到所述相邻像素的像素电压:当所述相邻像素具有正极性时,将所述像素的所述像素电压与施加到所述相邻像素的所述像素电极和所述对向电极的电压之间的绝对电压差相加,而当所述相邻像素具有负极性时,从所述像素的所述像素电压减去所述相邻像素的绝对电压差。
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KR101132908B1 (ko) | 2009-09-03 | 2012-04-03 | 정정규 | 세절 훈제 오리 불고기 제조 방법 및 세절 훈제 오리 불고기를 포장한 팩 |
TWM419123U (en) * | 2011-01-18 | 2011-12-21 | Chunghwa Picture Tubes Ltd | Pixel structure with pre-charge function |
TWI441154B (zh) * | 2011-08-30 | 2014-06-11 | Au Optronics Corp | 顯示裝置及其畫素電壓驅動方法 |
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2011
- 2011-03-21 KR KR1020110024823A patent/KR101752780B1/ko not_active Expired - Fee Related
- 2011-12-20 GB GB1316518.8A patent/GB2505330B/en active Active
- 2011-12-20 GB GB1122012.6A patent/GB2489295B/en active Active
- 2011-12-28 FR FR1162489A patent/FR2973119B1/fr active Active
- 2011-12-28 US US13/338,819 patent/US9001101B2/en active Active
- 2011-12-28 TW TW100149277A patent/TWI464509B/zh active
- 2011-12-29 DE DE102011057146.9A patent/DE102011057146B4/de active Active
- 2011-12-30 CN CN201110454367.7A patent/CN102692772B/zh active Active
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US6256076B1 (en) * | 1997-03-19 | 2001-07-03 | Samsung Electronics Co., Ltd. | Liquid crystal displays having switching elements and storage capacitors and a manufacturing method thereof |
CN1573898A (zh) * | 2003-06-05 | 2005-02-02 | 株式会社瑞萨科技 | 液晶驱动方法、液晶显示系统和液晶驱动控制装置 |
CN1637488A (zh) * | 2003-12-23 | 2005-07-13 | Lg.菲利浦Lcd株式会社 | 液晶显示器件及其驱动方法 |
Also Published As
Publication number | Publication date |
---|---|
GB2489295B (en) | 2014-07-02 |
KR101752780B1 (ko) | 2017-07-12 |
FR2973119B1 (fr) | 2018-08-24 |
DE102011057146B4 (de) | 2014-08-14 |
DE102011057146A1 (de) | 2012-09-27 |
GB201316518D0 (en) | 2013-10-30 |
GB2505330A (en) | 2014-02-26 |
CN102692772A (zh) | 2012-09-26 |
KR20120107245A (ko) | 2012-10-02 |
DE102011057146A9 (de) | 2012-12-13 |
TWI464509B (zh) | 2014-12-11 |
US20120242640A1 (en) | 2012-09-27 |
US9001101B2 (en) | 2015-04-07 |
GB2489295A (en) | 2012-09-26 |
FR2973119A1 (fr) | 2012-09-28 |
TW201239493A (en) | 2012-10-01 |
GB201122012D0 (en) | 2012-02-01 |
GB2505330B (en) | 2014-07-02 |
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