CN102683207A - Method for manufacturing MOS (metal oxide semiconductor) transistor and MOS transistor device - Google Patents
Method for manufacturing MOS (metal oxide semiconductor) transistor and MOS transistor device Download PDFInfo
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- CN102683207A CN102683207A CN2011100545033A CN201110054503A CN102683207A CN 102683207 A CN102683207 A CN 102683207A CN 2011100545033 A CN2011100545033 A CN 2011100545033A CN 201110054503 A CN201110054503 A CN 201110054503A CN 102683207 A CN102683207 A CN 102683207A
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Abstract
An embodiment of the invention provides a method for manufacturing an MOS (metal oxide semiconductor) transistor and an MOS transistor device, relates to the technical field of semiconductors, and aims to effectively reduce leakage current when the MOS transistor is closed. The method for manufacturing the MOS transistor includes forming a grid oxide layer with a thickness ranging from 85 angstroms to 105 angstroms; and injecting ions to form a lightly doped drain injected area LDD. An angle downwardly formed between the injection direction of the ions and the vertical direction ranges from 0 degree to 10 degrees, and injection energy of the ions ranges from 28 kiloelectron volts to 32 kiloelectron volts. The method can be used for manufacturing semiconductor devices and integrated circuits.
Description
Technical field
The present invention relates to technical field of semiconductors, relate in particular to a kind of manufacture method and metal-oxide-semiconductor device of metal-oxide-semiconductor.
Background technology
Metal oxide semiconductor transistor (Metal Oxide Semiconductor Transistor) is called for short metal-oxide-semiconductor, is the element task device of forming classes of semiconductors device and integrated circuit.
In the prior art; As shown in Figure 1; Metal-oxide-semiconductor comprises substrate, grid G, drain electrode S and source electrode D, between drain electrode S and the grid G and source S and grid G between the position be provided with lightly doped drain and inject LDD (Light Doped Drain) and distinguish, be provided with grid oxic horizon under the grid G.When having certain voltage between the grid G of metal-oxide-semiconductor and the drain D, the substrate under the grid G will gather and necessarily be used to the charge carrier that conducts electricity, makes source S and drain D form conductive path.This moment, the electric current from the source S to the drain D was called the conducting electric current; And the grid G voltage of working as metal-oxide-semiconductor is 0, and when drain D added certain voltage, owing to do not have voltage on the grid G, the substrate under the grid G can not gather charge carrier, and source S and drain D can not form conductive path.This moment, this electric leakage was called the leakage current of metal-oxide-semiconductor when off state because there is certain junction leakage in the existence of drain D voltage between source S and the drain D.
For operating voltage is the low pressure metal-oxide-semiconductor of 1.5V; For satisfying the requirement of such metal-oxide-semiconductor place operating circuit; Both needed such metal-oxide-semiconductor under lower voltage; It is enough big that its conducting electric current is wanted, and also needs such device simultaneously under off state, in its source electrode need be controlled to a certain degree to the leakage current value that drains.In the prior art, when regulating the substrate concentration that forms metal-oxide-semiconductor, adopt the technology way that changes the routines such as dosage of injecting ion that cut-in voltage is turned down usually, to obtain bigger conducting electric current.But this method will cause the increase of metal-oxide-semiconductor leakage current, and the increase of individual devices leakage current can cause the increase of the quiescent current of whole M OS pipe circuit, influences the work of entire circuit.
Summary of the invention
The main purpose of embodiments of the invention is, a kind of manufacture method and metal-oxide-semiconductor device of metal-oxide-semiconductor is provided, and can effectively reduce the leakage current of metal-oxide-semiconductor under off state.
On the one hand, embodiments of the invention provide a kind of manufacture method of metal-oxide-semiconductor, comprising:
Form the grid oxic horizon of said metal-oxide-semiconductor, the thickness of said grid oxic horizon is 85 to 105 dusts;
Form the grid of said metal-oxide-semiconductor;
The lightly doped drain that inject to form said metal-oxide-semiconductor through ion injects LDD district, and the angle that said ion injects is directed downwards with vertical direction is 0 to 10 degree, and the energy of said ion injection is 28 to 32 kilo electron volts;
Form the source electrode and the drain electrode of said metal-oxide-semiconductor.
On the other hand; Embodiments of the invention provide a kind of metal-oxide-semiconductor device, comprise metal-oxide-semiconductor, and said metal-oxide-semiconductor comprises grid oxic horizon, LDD district, grid and source electrode; Said metal-oxide-semiconductor is made by manufacture method provided by the invention, and the thickness of said grid oxic horizon is 85 to 105 dusts; Said LDD district inject to form through ion, said ion injects be directed downwards and with the angle of vertical direction be 0 to 10 degree, the energy that said ion injects is 28 to 32 kilo electron volts.
After adopting technique scheme; The manufacture method of the metal-oxide-semiconductor that the embodiment of the invention provides and metal-oxide-semiconductor device; The thickness of the grid oxic horizon through changing metal-oxide-semiconductor; And ion injects when change forming LDD district simultaneously angle and energy, can effectively increase metal-oxide-semiconductor at the conducting electric current of conducting state with reduce the leakage current of metal-oxide-semiconductor under off state.
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art; To do to introduce simply to the accompanying drawing of required use in embodiment or the description of the Prior Art below; Obviously, the accompanying drawing in describing below only is some embodiments of the present invention, for those of ordinary skills; Under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is the structure diagram of metal-oxide-semiconductor in the prior art;
A kind of flow chart of the manufacture method of the metal-oxide-semiconductor that Fig. 2 provides for the embodiment of the invention;
The another kind of flow chart of the manufacture method of the metal-oxide-semiconductor that Fig. 3 provides for the embodiment of the invention;
Fig. 4 is the pairing technological effect figure of flow chart shown in Figure 3;
Fig. 5 is the enlarged diagram of frame of broken lines part among Fig. 4;
Fig. 6 is the LDD district that forms of manufacture method shown in Figure 3 and the implantation concentration of the ion implanted impurity in the LDD district of prior art formation contrasts sketch map;
Fig. 7 is the low pressure metal-oxide-semiconductor made of the manufacture method of the embodiment of the invention and the intrinsic breakdown curve of the low pressure metal-oxide-semiconductor of prior art contrasts sketch map;
The structure diagram of the metal-oxide-semiconductor that Fig. 8 provides for the embodiment of the invention.
Embodiment
To combine the accompanying drawing in the embodiment of the invention below, the technical scheme in the embodiment of the invention is carried out clear, intactly description, obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills are not making the every other embodiment that is obtained under the creative work prerequisite, all belong to the scope of the present invention's protection.
As shown in Figure 1, the embodiment of the invention provides a kind of manufacture method of metal-oxide-semiconductor, may further comprise the steps:
Step 101 forms the grid oxic horizon of said metal-oxide-semiconductor, and the thickness of said grid oxic horizon is 85 to 105 dusts;
Need to prove that the thickness of said grid oxic horizon is preferably 90 to 100 dusts, for example 95 dusts.The thickness of said grid oxic horizon.
Step 102 forms the grid of said metal-oxide-semiconductor;
Wherein, said grid is generally polysilicon gate.
Step 103, the lightly doped drain that inject to form said metal-oxide-semiconductor through ion injects LDD district, and the angle that said ion injects is directed downwards with vertical direction is 0 to 10 degree, and the energy of said ion injection is 28 to 32 kilo electron volts (kev);
Need to prove that the direction that said ion injects is preferably direction straight down, the energy that said ion injects is preferably 30kev.
Step 104 forms the source electrode and the drain electrode of said metal-oxide-semiconductor.
The manufacture method of the metal-oxide-semiconductor that the embodiment of the invention provides with respect to prior art, has changed the thickness of the grid oxic horizon of metal-oxide-semiconductor, and has changed ion injects when forming the LDD district angle and energy simultaneously.Wherein, Change to thickness of grid oxide layer can strengthen the control ability of grid to device channel region; Current lead-through ability when increasing metal-oxide-semiconductor low pressure; And the angle that LDD district ion is injected and the change of energy can make the concentration increase of LDD district, thereby can effectively increase metal-oxide-semiconductor at the conducting electric current of conducting state with reduce the leakage current of metal-oxide-semiconductor under off state.
The low pressure complementary type metal-oxide-semiconductor (CMOS, Complementary MOS) that with the operating voltage is 1.5V (volt) below is an example, and the manufacture method of the metal-oxide-semiconductor that the embodiment of the invention is provided is elaborated, and wherein, the CMOS pipe comprises P type metal-oxide-semiconductor and N type metal-oxide-semiconductor.In conjunction with Fig. 3 and Fig. 4, present embodiment comprises:
Step 201 forms the N well region on substrate.
In the present embodiment, substrate is a P type silicon chip.Concrete, this step can be divided into following a few step, comprising:
Deposition of silica SiO2 oxide layer on substrate;
On said SiO2 oxide layer, carve injection window, so that define well region corresponding to well region;
Carry out the N type through said injection window and mix, form the N well region.
Step 202 forms field oxide, to define active area, through mixing the carrier concentration of said active area is regulated.
Concrete, form field oxide in this step and can be divided into following a few step and carry out:
Deposition SiNx mask layer on the substrate that is formed with the N well region;
Carry out the active area photoetching, etch the field oxide window;
Growth isolation camp oxide layer defines active area through field oxide.
Wherein, field oxide is used to carry out device isolation, and defines active area and the active area outside the N well region within the N well region.In the embodiment of the invention, P type metal-oxide-semiconductor device will be formed in the active area within the N well region, and N type metal-oxide-semiconductor device will be formed at the active area outside the N well region.
The concrete implementation of above step can be identical with prior art, repeats no more here.
Step 203, the grid oxic horizon of formation P type metal-oxide-semiconductor and N type metal-oxide-semiconductor.
Concrete, in this step, can form the grid oxic horizon of said metal-oxide-semiconductor through the mode of thermal oxidation or deposition, the thickness of said grid oxic horizon is 95 dusts.
At present, operating voltage is that the low pressure complementary type metal-oxide-semiconductor of 1.5V adopts 0.5 micron logic process of standard usually in the prior art.In 0.5 micron logic process of standard of low pressure complementary type metal-oxide-semiconductor, the thickness of grid oxic horizon is generally 125 dusts.With respect to prior art, in the present embodiment, the thickness of grid oxic horizon has carried out appropriate attenuate; Its thickness reduces than 0.5 micron logic process of standard significantly, like this, can strengthen the control ability of gate electrode to device channel region; Current lead-through ability when increasing metal-oxide-semiconductor low pressure that is to say, with respect to prior art; Under identical substrate concentration and identical grid voltage, will there be more charge carrier to accumulate under the grid, the conducting electric current will be increased.
Step 204, the polysilicon gate of formation P type metal-oxide-semiconductor and N type metal-oxide-semiconductor.
The concrete implementation of this step can be identical with prior art, repeats no more here.
Step 205 is injected the LDD district that forms P type metal-oxide-semiconductor and N type metal-oxide-semiconductor respectively through ion, and the LDD district of P type metal-oxide-semiconductor is a P type doped region, and the LDD district of N type metal-oxide-semiconductor is a N type doped region.
In this step, the direction that said ion injects is direction straight down, and promptly the angle injected of ion is 0 degree, and the energy of ion injection is 30kev.
At present; In 0.5 micron logic process of standard of low pressure complementary type metal-oxide-semiconductor, when injecting formation LDD district through ion, ion injects is partial to polysilicon gate inclination injection usually; The angle of injecting is generally with direction straight down and becomes 30 degree, and the energy of ion injection is generally 60kev.With respect to prior art, in this step, reduced the angle that ion injects, reduced the energy that ion injects simultaneously, like this, LDD district concentration is increased, thereby effectively improve of the electric leakage of low pressure metal-oxide-semiconductor at off state.
Through experiment measuring; In conjunction with Fig. 5 and shown in Figure 6; Fig. 5 is the enlarged diagram of step 205 place frame of broken lines part among Fig. 4, and the implantation concentration of the ion implanted impurity in the LDD district that Fig. 6 forms for present embodiment and the LDD district of prior art formation contrasts sketch map, among Fig. 6; The X axle is a substrate surface to distance between the PN junction border that LDD district and substrate form, and the Y axle is the ion implantation concentration in LDD district.Can know by part in the circle frame in Fig. 6, the LDD district that this step forms, compared with prior art, the PN junction that forms with substrate more trends towards abrupt junction, therefore, with reducing the leakage current of metal-oxide-semiconductor under off state significantly.
After forming the LDD district, present embodiment also comprises:
Forming P type metal-oxide-semiconductor and N type metal-oxide-semiconductor sidewall oxide, said sidewall oxide is used for when forming source electrode and drain electrode, the LDD district being protected; Form the source electrode and the drain electrode of P type metal-oxide-semiconductor and N type metal-oxide-semiconductor, and form all the other steps such as insulating medium layer, contact hole.It is pointed out that these steps all can get final product according to conventional manufacture method, since identical with prior art, repeat no more here.
The manufacture method of the CMOS pipe that present embodiment provides; With respect to prior art; Through reducing the thickness of grid oxic horizon, ion injects when reducing simultaneously to form the LDD district angle and energy, the characteristic of CMOS pipe has obtained optimization; Promptly increase the conducting electric current of N type metal-oxide-semiconductor and P type metal-oxide-semiconductor, effectively reduced N type metal-oxide-semiconductor and the leakage current of P type metal-oxide-semiconductor under off state again.
Table one:
1.5V low pressure metal-oxide-semiconductor and low pressure metal-oxide-semiconductor of the prior art characteristic measured data under conducting and off state that table one is made for the manufacture method of the metal-oxide-semiconductor that adopts the embodiment of the invention and provide.Fig. 7 is the breakdown characteristic comparison diagram of the low pressure metal-oxide-semiconductor of the low pressure metal-oxide-semiconductor of the manufacture method made of the metal-oxide-semiconductor that adopts the embodiment of the invention and provide and prior art made.Can know according to table one and Fig. 7, with respect to prior art, the manufacture method of the metal-oxide-semiconductor that the embodiment of the invention provides, the conducting electric current of the metal-oxide-semiconductor of made significantly increases, and simultaneously, leakage current obviously reduces, and breakdown characteristic has obtained obvious optimization.
Accordingly, the embodiment of the invention also provides a kind of metal-oxide-semiconductor device, comprises metal-oxide-semiconductor, and said metal-oxide-semiconductor is made by the manufacture method that the embodiment of the invention provides.Wherein, as shown in Figure 8, said metal-oxide-semiconductor comprises substrate 1, grid G, drain electrode S and source electrode D, between drain electrode S and the grid G and source S and grid G between the position be provided with lightly doped drain injection LDD district 11, be provided with grid oxic horizon 10 under the grid G.
Wherein, the thickness of grid oxic horizon is 85 to 105 dusts, is preferably 90 to 100 dusts, for example 95 dusts.LDD district 11 is formed by ion implantation technology; The angle that said ion injects is directed downwards with vertical direction is 0 to 10 degree, and the energy that said ion injects is 28 to 32kev, wherein; The direction that said ion injects is preferably direction straight down, and the energy that said ion injects is preferably 30kev.
The metal-oxide-semiconductor device that the embodiment of the invention provides; Through changing the thickness of metal-oxide-semiconductor grid oxic horizon; Change angle and the energy that ion injects when forming the LDD district simultaneously, both increased the conducting electric current of metal-oxide-semiconductor, and effectively reduced the leakage current of metal-oxide-semiconductor under off state.
Need to prove that the metal-oxide-semiconductor device that the embodiment of the invention provides can comprise at least one said metal-oxide-semiconductor.Concrete, said metal-oxide-semiconductor can be the low pressure metal-oxide-semiconductor that operating voltage is 1.5V.
The above; Be merely embodiment of the present invention, but protection scope of the present invention is not limited thereto, any technical staff who is familiar with the present technique field is in the technical scope that the present invention discloses; Can expect easily changing or replacement, all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection range of said claim.
Claims (8)
1. the manufacture method of a metal-oxide-semiconductor is characterized in that, comprising:
Form the grid oxic horizon of said metal-oxide-semiconductor, the thickness of said grid oxic horizon is 85 to 105 dusts;
Form the grid of said metal-oxide-semiconductor;
The lightly doped drain that inject to form said metal-oxide-semiconductor through ion injects LDD district, and the angle that said ion injects is directed downwards with vertical direction is 0 to 10 degree, and the energy of said ion injection is 28 to 32 kilo electron volts;
Form the source electrode and the drain electrode of said metal-oxide-semiconductor.
2. manufacture method according to claim 1 is characterized in that, the grid oxic horizon of the said metal-oxide-semiconductor of said formation, the thickness of said grid oxic horizon are that 85 to 105 dusts comprise:
Form the grid oxic horizon of said metal-oxide-semiconductor through the mode of thermal oxidation or deposition, the thickness of said grid oxic horizon is 95 dusts.
3. manufacture method according to claim 1 and 2 is characterized in that,
The direction that said ion injects is direction straight down, and the energy of said ion injection is 30 kilo electron volts.
4. manufacture method according to claim 1 is characterized in that, said metal-oxide-semiconductor is that operating voltage is the low pressure metal-oxide-semiconductor of 1.5V.
5. a metal-oxide-semiconductor device comprises metal-oxide-semiconductor, and said metal-oxide-semiconductor comprises grid oxic horizon, LDD district, grid and source electrode, it is characterized in that,
The thickness of said grid oxic horizon is 85 to 105 dusts;
Said LDD district inject to form through ion, said ion injects be directed downwards and with the angle of vertical direction be 0 to 10 degree, the energy that said ion injects is 28 to 32 kilo electron volts.
6. metal-oxide-semiconductor device according to claim 5 is characterized in that,
The thickness of said grid oxic horizon is 95 dusts.
7. according to claim 5 or 6 described metal-oxide-semiconductor devices, it is characterized in that,
The direction that said ion injects is direction straight down, and the energy of said ion injection is 30 kilo electron volts.
8. metal-oxide-semiconductor device according to claim 5 is characterized in that, said metal-oxide-semiconductor is that operating voltage is the low pressure metal-oxide-semiconductor of 1.5V.
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| CN1156902A (en) * | 1995-10-31 | 1997-08-13 | 日本电气株式会社 | Method for fabricating semiconductor device having CMOS structure |
| CN1157484A (en) * | 1996-02-15 | 1997-08-20 | 台湾茂矽电子股份有限公司 | Manufacturing method of complementary metal oxide half field effect transistor |
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Application publication date: 20120919 |