CN102624267A - Inverter and application circuit in three-phase system - Google Patents
Inverter and application circuit in three-phase system Download PDFInfo
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- CN102624267A CN102624267A CN2012100836175A CN201210083617A CN102624267A CN 102624267 A CN102624267 A CN 102624267A CN 2012100836175 A CN2012100836175 A CN 2012100836175A CN 201210083617 A CN201210083617 A CN 201210083617A CN 102624267 A CN102624267 A CN 102624267A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
- H02M7/42—Conversion of DC power input into AC power output without possibility of reversal
- H02M7/44—Conversion of DC power input into AC power output without possibility of reversal by static converters
- H02M7/48—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/5387—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
- H02M7/5388—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with asymmetrical configuration of switches
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0067—Converter structures employing plural converter units, other than for parallel operation of the units on a single load
- H02M1/007—Plural converter units in cascade
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/12—Arrangements for reducing harmonics from AC input or output
- H02M1/123—Suppression of common mode voltage or current
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Abstract
The embodiment of the invention discloses an inverter. The collector of a power switching tube T1 is connected to the positive output terminal of a DC power supply; the emitter of the T1 and the collector of a power switching tube T2 are connected to one input terminal of an H bridge circuit, the other input terminal of the H bridge circuit is connected with the negative output terminal of the DC power supply, and the two output terminals of the H bridge circuit are respectively connected to a power grid; each power switching tube is inversely connected in parallel with a diode; a DC/DC converter is connected with two ends of the DC power supply; a capacitor C2 is connected between the positive and the negative output terminals of the DC power supply; a capacitor C1 is connected between the positive output terminal of the DC/DC converter and the negative output terminal of the DC power supply; the T2 is connected with the emitter of a power switching tube T7; and the collector of the T7 is connected with the positive output terminal of the DC/DC converter. The embodiment of the invention also discloses a dual topology of the inverter and other two inverters developed from the dual topology, and provides an application circuit of the four inverters, which is in the three-phase system. The embodiment of the invention has the advantages that high efficiency of the inverters are ensured, current leakage is reduced, and the problem of midpoint balance control to multiple levels is avoided.
Description
Technical field
The embodiment of the invention relates to inverter and application circuit thereof, specifically is transless type photovoltaic combining inverter and the application circuit in three-phase system thereof.
Background technology
Be divided into from net type inverter and grid type inverter according to the different of inverter applications occasion and control mode, whether basis has transformer and can be divided into transformer isolation type inverter and transless type inverter again in the grid type inverter.Plurality of advantages such as transless type inverter is simple owing to system configuration, and efficient is high, and volume is little, and cost is low have obtained development fast.Become the main flow of photovoltaic middle low power.
Existing transless type inverter commonly used is the H4 topology; The H bridge circuit that just constitutes by 4 switching devices; As shown in Figure 1; This photovoltaic DC-to-AC converter uses switching device 46,48,50,52 to form H bridge circuits 24, and the dc voltage of the variation of PV array 12 is converted into the fixed frequency AC voltage that electrical network 14 needs, and uses the energy storage level of DC link 16 in the middle of realizing; Concrete; Inverter at first is transformed to the stable dc voltage 20 greater than line voltage with the dc voltage 18 of unsettled PV array 12 via booster converter, subsequently stable dc voltage 20 is transformed to and can be incorporated into the power networks into the electric current 22 in the electrical network 14 via H bridge circuit 24, and switching device 46,48,50,52 carries out switch motion under high frequency.Booster converter by inductance, diode, and a switching device 44 form.
But transless type inverter is owing to can not realize the electrical isolation between direct current input source and AC load, and leakage problem is one of key index of its reliability.Leakage current is to be caused by the common mode disturbances that is present in simultaneously on grid side zero line and the live wire, in theory, when common-mode voltage is a constant, can eliminate common mode current.
When traditional H4 topology adopted the bipolarity modulation, common-mode voltage can be always a constant, can well suppress leakage current; But, when adopting the bipolarity modulation, all can have two groups of switching devices to participate in the changes of current during each change of current; Switching loss increases, and in addition, big ripple appears in power network current when zero crossing; If will guarantee higher output current quality, must add big filter inductance, this makes the efficient of inverter reduce.For obtaining higher efficient, often adopt the unipolarity modulation strategy, though and unipolarity has overcome the shortcoming that switching loss reaches the output waveform difference greatly, be in operation, can have the common-mode voltage that changes with switching frequency, cause leakage current.Therefore, traditional H4 topology can not have been taken into account two problems of leakage current and high efficiency simultaneously.
Be to eliminate the high frequency common mode voltage that the Unipolar SPWM modulation produces, must make to reach the purpose of eliminating common-mode voltage by clamped half the at DC power supply voltage of the continuous current circuit in afterflow stage.
Many level are having bigger advantage also to obtain bigger concern with respect to two level aspect the efficient; Use three Level Technology in the non-isolation type inverter, leakage problem is a urgent problem, and existing patent EP2053732A2 has realized the output of five level; As shown in Figure 2; Be the disclosed a kind of topological structure of patent EP2053732A2, the idle circulation path when not having intermediate level work but such is topological, the current over-zero place produces bigger common-mode voltage.And flow for the restriction electric current is single-phase, used two diode component D11, D12 more.
One Chinese patent application CN101814856A discloses a kind of non-isolated grid-connected inverter and switch control time sequence thereof, and is as shown in Figure 3, comprises dividing potential drop capacitive branch 1, reed position branch road 2 and full-bridge elementary cell 3; Dividing potential drop capacitive branch 1 comprises capacitor C dc1, capacitor C dc2; Reed position branch road 2 comprises switching tube S1, switching tube S2; Full-bridge elementary cell 3 comprises switching tube S3, switching tube S4, switching tube S5, switching tube S6; It adds two controlled tr tube S1, S2 and dividing potential drop capacitor C dc1, Cdc2 and constitutes two-way reed position branch road on the basis of full-bridge circuit; And cooperate switching sequence can realize afterflow during the stage continuous current circuit current potential be in 1/2nd cell voltage, thereby eliminate the leakage current of non-isolated grid-connected inverter; And guaranteed power delivery stage output current 3 switching tubes of only flowing through, effectively reduce conduction loss.This inverter reality still is operated in three level; And if guarantee that reaching the continuous current circuit current potential described in the patent is in 1/2nd cell voltage; Midpoint potential between two electric capacity must guarantee to be 1/2nd cell voltage; It is difficult that this neutral balance is controlled in the practical operation, needs through complicated control method.
To sum up, adopt the output of five level, guarantee that simultaneously high efficiency is a urgent problem with reducing leakage current for guaranteeing high efficiency.
Summary of the invention
The technical problem that the embodiment of the invention will solve is to provide four kinds of new single-phase five level topology inverters; Reduce leakage current and guarantee the high efficiency purpose of inverter simultaneously to reach, the embodiment of the invention also provides the application circuit of inverter in three-phase system simultaneously.
The embodiment of the invention adopts following technical scheme one of to solve the problems of the technologies described above: a kind of inverter; The power switch pipe T1, T2, T7, the H bridge circuit that comprise capacitor C 1, C2, three polyphones; The DC/DC converter; The collector electrode of power switch pipe T1 is connected to the positive output end of DC power supply, and the emitter of power switch pipe T1 is connected with the collector electrode of power switch pipe T2, and this tie point is connected to the first input end of H bridge circuit; Said H bridge circuit comprises 4 power switch pipe T3, T4, T5, T6; The collector electrode of power switch pipe T3, T5 links to each other as the first input end of H bridge circuit, and the emitter of power switch pipe T4, T6 links to each other as second input of H bridge circuit, is connected to the negative output terminal of DC power supply; The emitter of power switch pipe T3 is connected with the collector electrode of power switch pipe T4; This tie point is as first output of H bridge circuit, and the emitter of power switch pipe T5 is connected with the collector electrode of power switch pipe T6, and this tie point is as second output of H bridge circuit; Two outputs of H bridge circuit are connected respectively to electrical network; Power switch pipe T1, T2, T3, T4, T5, T6, T7 last diode D1 of inverse parallel, D2, D3, D4, D5, D6, D7 respectively, the input of said DC/DC converter and earth terminal are connected to the two ends of DC power supply, connect said capacitor C 2 between the positive-negative output end of DC power supply; Be connected said capacitor C 1 between the positive output end of DC/DC converter and the negative output terminal of DC power supply, the emitter of power switch pipe T2 is connected to the positive output end of DC/DC converter.
The embodiment of the invention further is specially:
Described inverter is operated in following mode:
Mode H1: switch transistor T 2, T3, T6, the T7 conducting, all the other end;
Mode H2: switch transistor T 2, T3, T6, the T7 conducting, all the other end, and current direction is opposite with mode H1;
Mode H3: switch transistor T 2, T4, T5, the T7 conducting, all the other end;
Mode H4: switch transistor T 2, T4, T5, the T7 conducting, all the other end, and current direction is opposite with mode H3;
Mode H5: switch transistor T 1, T3, the T6 conducting, all the other end;
Mode H6: switch transistor T 1, T3, the T6 conducting, all the other end, and current direction is opposite with mode H5;
Mode H7: switch transistor T 1, T4, the T5 conducting, all the other end;
Mode H8: switch transistor T 1, T4, the T5 conducting, all the other end, and current direction is opposite with mode H7;
Mode H9: switch transistor T 3, the T5 conducting, all the other end;
Mode H10: switch transistor T 3, the T5 conducting, all the other end, and current direction is opposite with mode H9.
When DC power supply output voltage V 2 is higher than the minimum operating voltage Vm of inverter; Could guarantee the operate as normal of inverter; Can be divided into two kinds of situation work according to DC power supply voltage: the first, the DC power supply output voltage is higher slightly than the minimum operating voltage of inverter, obtains voltage V1<Vm through the work of DC/DC converter when making its work; Second: the DC power supply output voltage is more more than the minimum operating voltage height of inverter, obtains voltage V1 through the work of DC/DC converter and satisfies V2>V1>Vm.
Further; Wherein power switch pipe T1, T2, T3, T4, T5, T6, T7 and said seven diode D1, D2, D3, D4, D5, D6, D7 are encapsulated as a packaging, and wherein the collector electrode of power switch pipe T1 respectively as the exchanging of packaging is exported AC1 and AC2 end as the zero level end of packaging, first output of H bridge circuit with second output as the first level end of packaging, second input of H bridge circuit as the second level end of packaging, the collector electrode of power switch pipe T7.
Further; Described power switch pipe T1, T2, T3, T4, T5, T6, T7 and seven diode D1, D2, D3, D4, D5, D6, D7 are called the first power switch pipe unit, and said inverter also comprises structure and identical second and third power switch pipe unit of the first power switch pipe unit;
With the first power switch pipe cell descriptions, wherein the first input end of H bridge circuit as the collector electrode of the second level end, power switch pipe T1 as the emitter of the first level end, power switch pipe T2 as first output of zero level end, H bridge circuit and second output respectively as ac output end;
Wherein, the second level end of each power switch pipe unit all is connected to the positive output end of DC power supply, and the zero level end all is connected to the negative output terminal of DC power supply, and the first level end all is connected to the positive output end of DC/DC converter.
The course of work of the course of work of said second and third power switch pipe unit and the first power switch pipe unit is identical.
Said second and third power switch pipe unit all can make the packaging like the first power switch pipe unit.
The embodiment of the invention adopt that following technical scheme solves the problems of the technologies described above two: the inverter that a kind of and above-mentioned inverter antithesis topology is provided; The power switch pipe T1, T2, T7, the H bridge circuit that comprise capacitor C 1, C2, three polyphones; The DC/DC converter, said H bridge circuit comprises 4 power switch pipe T3, T4, T5, T6, the collector electrode of power switch pipe T3, T5 links to each other as the first input end of H bridge circuit; Be connected to the positive output end of DC power supply; The emitter of power switch pipe T4, T6 links to each other as second input of H bridge circuit, and the emitter of power switch pipe T3 is connected with the collector electrode of power switch pipe T4, and this tie point is as first output of H bridge circuit; The emitter of power switch pipe T5 is connected with the collector electrode of power switch pipe T6; This tie point is as second output of H bridge circuit, and two outputs of H bridge circuit are connected respectively to electrical network, power switch pipe T1, T2, T3, T4, T5, T6, T7 last diode D1 of inverse parallel, D2, D3, D4, D5, D6, D7 respectively; The input of said DC/DC converter and earth terminal are connected the positive output end of DC power supply; Connect said capacitor C 2 between the positive-negative output end of DC power supply, be connected said capacitor C 1 between the negative output terminal of DC/DC converter and the positive output end of DC power supply, the emitter of power switch pipe T7 is connected to the negative output terminal of DC/DC converter; The emitter of power switch pipe T2 is connected to the negative output terminal of DC power supply; The collector electrode of power switch pipe T7 is connected with the collector electrode of power switch pipe T1, and the emitter of power switch pipe T1 is connected with the collector electrode of power switch pipe T2, and this tie point is connected to second input of H bridge circuit.
Further improvement as such scheme:
Described inverter is operated in following mode:
Mode H1: switch transistor T 2, T3, the T6 conducting, all the other end;
Mode H2: switch transistor T 2, T3, the T6 conducting, all the other end, and current direction is opposite with mode H1;
Mode H3: switch transistor T 2, T4, the T5 conducting, all the other end;
Mode H4: switch transistor T 2, T4, the T5 conducting, all the other end, and current direction is opposite with mode H3;
Mode H5: switch transistor T 1, T3, T6, the T7 conducting, all the other end;
Mode H6: switch transistor T 1, T3, T6, the T7 conducting, all the other end, and current direction is opposite with mode H5;
Mode H7: switch transistor T 1, T4, T5, the T7 conducting, all the other end;
Mode H8: switch transistor T 1, T4, T5, the T7 conducting, all the other end, and current direction is opposite with mode H7;
Mode H9: switch transistor T 4, the T6 conducting, all the other end;
Mode H10: switch transistor T 4, the T6 conducting, all the other end, and current direction is opposite with mode H9.
DC power supply output voltage V 2 is higher than the minimum operating voltage Vm of inverter; To satisfy the basic demand of inverter work; Through the work of control voltage-dropping type DC/DC converter, obtain the output voltage V 1 of DC/DC converter, specifically there are two kinds of situation: (1) V2>V1>Vm, (2) V1<Vm.
Further; Wherein power switch pipe T1, T2, T3, T4, T5, T6, T7 and said seven diode D1, D2, D3, D4, D5, D6, D7 are encapsulated as a packaging, and wherein the first input end of H bridge circuit respectively as the exchanging of packaging is exported AC1 and AC2 end as the zero level end of packaging, first output of H bridge circuit with second output as the first level end of packaging, the emitter of power switch pipe T2 as the second level end of packaging, the collector electrode of power switch pipe T1.
Further; Described power switch pipe T1, T2, T3, T4, T5, T6, T7 and seven diode D1, D2, D3, D4, D5, D6, D7 are called the first power switch pipe unit, and said inverter also comprises structure and identical second and third power switch pipe unit of the first power switch pipe unit;
With the first power switch pipe cell descriptions, wherein the first input end of H bridge circuit as the collector electrode of the second level end, power switch pipe T1 as the emitter of the first level end, power switch pipe T2 as first output of zero level end, H bridge circuit and second output respectively as ac output end;
First, second and third power switch pipe unit is connected in parallel between the positive-negative output end of DC power supply; Wherein, The second level end of each power switch pipe unit all is connected to the positive output end of DC power supply; The zero level end all is connected to the negative output terminal of DC power supply, and the first level end all is connected to the negative output terminal of DC/DC converter.
Said second and third power switch pipe unit all can make the packaging like the first power switch pipe unit.
The embodiment of the invention adopt that following technical scheme solves the problems of the technologies described above three: a kind of inverter; The power switch pipe T1, T7, diode D2, the H bridge circuit that comprise capacitor C 1, C2, two polyphones; The DC/DC converter, the collector electrode of power switch pipe T1 is connected to the positive output end of DC power supply, and the emitter of power switch pipe T1 is connected with the negative electrode of diode D2; This tie point is connected to the first input end of H bridge circuit; Said H bridge circuit comprises 4 power switch pipe T3, T4, T5, T6, and the collector electrode of power switch pipe T3, T5 links to each other as the first input end of H bridge circuit, and the emitter of power switch pipe T4, T6 links to each other as second input of H bridge circuit; Be connected to the negative output terminal of DC power supply; The emitter of power switch pipe T3 is connected with the collector electrode of power switch pipe T4, and this tie point is as first output of H bridge circuit, and the emitter of power switch pipe T5 is connected with the collector electrode of power switch pipe T6; This tie point is as second output of H bridge circuit; Two outputs of H bridge circuit are connected respectively to electrical network, power switch pipe T1, T3, T4, T5, T6, T7 last diode D1 of inverse parallel, D3, D4, D5, D6, D7 respectively, and the input of said DC/DC converter and earth terminal are connected to the two ends of DC power supply; Connect said capacitor C 2 between the positive-negative output end of DC power supply; Be connected said capacitor C 1 between the positive output end of DC/DC converter and the negative output terminal of DC power supply, the anode of diode D2 is connected with the emitter of power switch pipe T7, and the collector electrode of power switch pipe T7 is connected to the positive output end of DC/DC converter.
This embodiment further is specially:
Described inverter is operated in following mode:
Mode H1: switch transistor T 3, T6, the T7 conducting, all the other end, electric current warp: DC+ → T7 → D2 → T3 → Vgrid → T6 → PV-;
Mode H3: switch transistor T 4, T5, the T7 conducting, all the other end, electric current warp: DC+ → T7 → D2 → T5 → Vgrid → T4 → PV-;
Mode H5: switch transistor T 1, T3, the T6 conducting, all the other end, electric current warp: PV+ → T1 → T3 → Vgrid → T6 → PV-;
Mode H6: switch transistor T 1, T3, the T6 conducting, all the other end, electric current warp: PV-→ D6 → Vgrid → D3 → D1 → PV+;
Mode H7: switch transistor T 1, T4, the T5 conducting, all the other end, electric current warp: PV+ → T1 → T5 → Vgrid → T4 → PV-;
Mode H8: switch transistor T 1, T4, the T5 conducting, all the other end, electric current warp: PV-→ D4 → Vgrid → D5 → D1 → PV+;
Mode H9: switch transistor T 3, the T5 conducting, all the other end, electric current warp: D5 → T3 → Vgrid → D5;
Mode H10: switch transistor T 3, the T5 conducting, all the other end, electric current warp: D3 → T5 → Vgrid → D3;
In above-mentioned each mode, DC+ represents the positive output end of DC/DC converter, and PV+ represents the positive output end of DC power supply, and PV-represents the negative output terminal of DC power supply, and Vgrid represents electrical network.
The inverter of this kind structure has following two kinds of control strategies:
When DC power supply output voltage V 2 is higher than the minimum operating voltage Vm of inverter, control inverter obtains voltage V1 through the work of DC/DC converter when making its work and satisfies V1<Vm;
When DC power supply output voltage V 2 is higher than the minimum operating voltage Vm of inverter, control inverter obtains voltage V1 through the work of DC/DC converter when making its work and satisfies V2>V1>Vm.
Described power switch pipe T1, T3, T4, T5, T6, T7 and six diode D1, D2, D3, D4, D5, D6, D7 are called the first power switch pipe unit, and said inverter also comprises structure and identical second and third power switch pipe unit of the first power switch pipe unit;
With the first power switch pipe cell descriptions, wherein the collector electrode of power switch pipe T1 as the collector electrode of the second level end, power switch pipe T7 as second input of the first level end, H bridge circuit as first output of zero level end, H bridge circuit and second output respectively as ac output end;
Wherein, the second level end of each power switch pipe unit all is connected to the positive output end of DC power supply, and the zero level end all is connected to the negative output terminal of DC power supply, and the first level end all is connected to the positive output end of DC/DC converter.
The embodiment of the invention adopt that following technical scheme solves the problems of the technologies described above four: a kind of inverter; The power switch pipe T2, T7, diode D1, the H bridge circuit that comprise capacitor C 1, C2, two polyphones; The DC/DC converter, said H bridge circuit comprises 4 power switch pipe T3, T4, T5, T6, the collector electrode of power switch pipe T3, T5 links to each other as the first input end of H bridge circuit; Be connected to the positive output end of DC power supply; The emitter of power switch pipe T4, T6 links to each other as second input of H bridge circuit, and the emitter of power switch pipe T3 is connected with the collector electrode of power switch pipe T4, and this tie point is as first output of H bridge circuit; The emitter of power switch pipe T5 is connected with the collector electrode of power switch pipe T6; This tie point is as second output of H bridge circuit, and two outputs of H bridge circuit are connected respectively to electrical network, power switch pipe T2, T3, T4, T5, T6, T7 last diode D2 of inverse parallel, D3, D4, D5, D6, D7 respectively; The input of said DC/DC converter is connected the positive output end of DC power supply with earth terminal; Connect said capacitor C 2 between the positive-negative output end of DC power supply, be connected said capacitor C 1 between the negative output terminal of DC/DC converter and the positive output end of DC power supply, the emitter of power switch pipe T7 is connected to the negative output terminal of DC/DC converter; The emitter of power switch pipe T2 is connected to the negative output terminal of DC power supply; The collector electrode of power switch pipe T7 is connected with the negative electrode of diode D1, and the anode of diode D1 is connected with the collector electrode of power switch pipe T2, and this tie point is connected to second input of H bridge circuit.
This embodiment further is specially:
Described inverter is operated in following mode:
Mode H1: switch transistor T 2, T3, the T6 conducting, all the other end, electric current warp: PV+ → T3 → Vgrid → T6 → T2 → PV-;
Mode H2: switch transistor T 2, T3, the T6 conducting, all the other end, electric current warp: PV-→ D2 → D6 → Vgrid → D3 → PV+;
Mode H3: switch transistor T 2, T4, the T5 conducting, all the other end, electric current warp: PV+ → T5 → Vgrid → T4 → T2 → PV-;
Mode H4: switch transistor T 2, T4, the T5 conducting, all the other end, electric current warp: PV-→ D2 → D4 → Vgrid → D5 → PV+;
Mode H5: switch transistor T 3, T6, the T7 conducting, all the other end, electric current warp: PV+ → T3 → Vgrid → T6 → D1 → T7 → DC-;
Mode H7: switch transistor T 4, T5, the T7 conducting, all the other end, electric current warp: PV+ → T5 → Vgrid → T4 → D1 → T7 → DC-;
Mode H9: switch transistor T 4, the T6 conducting, all the other end, electric current warp: T6 → D4 → Vgrid → T6;
Mode H10: switch transistor T 4, the T6 conducting, all the other end, electric current warp: T4 → D6 → Vgrid → T4;
In above-mentioned each mode, DC-represents the negative output terminal of DC/DC converter, and PV+ represents the positive output end of DC power supply, and PV-represents the negative output terminal of DC power supply, and Vgrid represents electrical network.
The inverter of this kind structure has following two kinds of control strategies:
When DC power supply output voltage V 2 is higher than the minimum operating voltage Vm of inverter, control inverter, obtaining voltage through the work of DC/DC converter during its work is V1, V1 meets the following conditions: V1<Vm;
When DC power supply output voltage V 2 is higher than the minimum operating voltage Vm of inverter, control inverter obtains voltage V1 through the work of DC/DC converter during its work, and V1 meets the following conditions: V2>V1>Vm.
Described six power switch pipe T2, T3, T4, T5, T6, T7 and seven diode D1, D2, D3, D4, D5, D6, D7 are called the first power switch pipe unit, and said inverter also comprises structure and identical second and third power switch pipe unit of the first power switch pipe unit;
With the first power switch pipe cell descriptions, wherein the first input end of H bridge circuit as the emitter of the second level end, power switch pipe T7 as the emitter of the first level end, power switch pipe T2 as first output of zero level end, H bridge circuit and second output respectively as ac output end;
Wherein, the second level end of each power switch pipe unit all is connected to the positive output end of DC power supply, and the zero level end all is connected to the negative output terminal of DC power supply, and the first level end all is connected to the negative output terminal of DC/DC converter.
The embodiment of the invention adopt that following technical scheme solves the problems of the technologies described above five: a kind of above-mentioned application circuit of inverter in three-phase system with three power switch pipe units, wherein the ac output end of each power switch pipe unit is connected respectively to the two ends of three former limit windings in the three-phase system.
The advantage of the embodiment of the invention is: four kinds of new single-phase five level topology inverters are provided, have obtained high efficiency inverter, and adopt specific modulation strategy to make common-mode voltage be approximately constant, to reach the purpose that reduces leakage current; Simultaneously for considering the wide region of direct voltage; Prime adopts the unit structure that has step-down to go out three level; Utilize commutation circuit can construct five-electrical level inverter; Because of three level of DC side are not to be obtained by two capacitance partial pressures, so evaded the problem of the neutral balance control of many level capacitance voltage.
Description of drawings
Fig. 1 is the structure chart of the existing H4 topological type structure inverter of using always.
Fig. 2 is the disclosed a kind of inverter topology figure of patent EP2053732A2.
Fig. 3 is the disclosed a kind of inverter topology figure of one Chinese patent application CN101814856A.
Fig. 4 is the constituted mode of first embodiment of the invention main circuit, and wherein T1, T2, T7 are positioned at the first input end of H bridge circuit.
Fig. 5 a to Figure 51 is 12 kinds of operation mode figure of main circuit among Fig. 4.
Among Fig. 6 (a) and (b) be respectively the bridge arm voltage and the common-mode voltage of wherein a kind of modulation strategy of first embodiment.
Among Fig. 7 (a) and (b) be respectively the bridge arm voltage and the common-mode voltage of the another kind of modulation strategy of first embodiment.
Fig. 8 is the main circuit diagram of a kind of concrete structure of the DC/DC converter using among first embodiment.
Fig. 9 is the power switch pipe encapsulation back sketch map of first embodiment of the invention.
Figure 10 and Figure 11 are the two kind application circuit structures of first embodiment of the invention in three-phase system.
Figure 12 is the constituted mode of second embodiment of the invention main circuit, and wherein T1, T2, T7 are positioned at second input of H bridge circuit.
Among Figure 13 (a) and (b) be respectively the bridge arm voltage and the common-mode voltage of wherein a kind of modulation strategy of second embodiment.
Among Figure 14 (a) and (b) be respectively the bridge arm voltage and the common-mode voltage of the another kind of modulation strategy of second embodiment.
Figure 15 is the main circuit diagram of a kind of concrete structure of DC/DC converter using in the inverter structure of second embodiment.
Figure 16 is the power switch pipe encapsulation back sketch map of second embodiment of the invention.
Figure 17 and Figure 18 are the two kind application circuit structures of second embodiment of the invention in three-phase system.
Figure 19 is the constituted mode of third embodiment of the invention main circuit, also is the simplification circuit of first embodiment.
Figure 20 a to Figure 20 h is 8 kinds of operation mode figure of main circuit among Figure 19.
Figure 21 is the constituted mode of fourth embodiment of the invention main circuit, also is the simplification circuit of second embodiment.
Main designation among the above-mentioned figure:
DC/DC:DC/DC converter C1, C2: electric capacity
T1, T2, T3, T4, T5, T6, T7: power switch pipe
D1, D2, D3, D4, D5, D6, D7: diode
L1, L2: inductance Vgrid: electrical network
PV+: the positive output end PV-of DC power supply: the negative output terminal of DC power supply
The negative output terminal of the positive output end DC-:DC/DC converter of DC+:DC/DC converter
V2: the voltage of the voltage V1:DC/DC converter output terminal at DC power supply two ends
Vab: brachium pontis output voltage, i.e. first output a of H bridge circuit and the voltage between the second output b
Embodiment
First embodiment
See also Fig. 4, the embodiment of the invention provides a kind of inverter, comprises DC/DC converter, capacitor C 1, C2, the power switch pipe T1 of three polyphones, T2, T7, the H bridge circuit.
The input of said DC/DC converter and earth terminal are connected to the two ends of DC power supply.
Connect said capacitor C 2 between the positive-negative output end of DC power supply, be connected said capacitor C 1 between the positive output end of DC/DC converter and the negative output terminal of DC power supply.
Power switch pipe T1, T2, T7 last diode D1 of inverse parallel, D2, D7 respectively; The collector electrode of power switch pipe T1 is connected to the positive output end of DC power supply; The collector electrode of power switch pipe T7 is connected to the positive output end of DC/DC converter; The emitter of power switch pipe T1 is connected with the collector electrode of power switch pipe T2, and this tie point is connected to the first input end of H bridge circuit.
Said H bridge circuit comprises 4 power switch pipe T3, T4, T5, T6; The collector electrode of power switch pipe T3, T5 links to each other as the first input end of H bridge circuit; The emitter of power switch pipe T4, T6 links to each other as second input of H bridge circuit; The emitter of power switch pipe T3 is connected with the collector electrode of power switch pipe T4; This tie point a is as first output of H bridge circuit, and the emitter of power switch pipe T5 is connected with the collector electrode of power switch pipe T6, and this tie point b is as second output of H bridge circuit.Second input of H bridge circuit is connected to the negative output terminal of DC power supply.Power switch pipe T3, T4, T5, T6 last diode D3 of inverse parallel, D4, D5, D6 respectively.
Further, this inverter also comprises the output that is connected the H bridge circuit and the filter circuit between the electrical network, and is concrete; This filter circuit is a L type structure; Comprise two inductance L 1, L2, said inductance L 1 one ends are connected to first output of H bridge circuit, and the other end is connected to electrical network; Said inductance L 2 one ends are connected to second output of H bridge circuit, and the other end is connected to electrical network.
See also Fig. 5 a to Figure 51, the operational modal analysis of embodiment of the invention inverter is following:
Mode H1: switch transistor T 2, T3, T6, the T7 conducting, all the other end.Electric current warp: DC+ → T7 → D2 → T3 → L1 → Vgrid → L2 → T6 → PV-, brachium pontis output voltage V ab=V1.
Mode H2: switch transistor T 2, T3, T6, the T7 conducting, all the other end.Electric current warp: PV-→ D6 → L2 → Vgrid → L1 → D3 → T2 → D7 → DC+, brachium pontis output voltage V ab=V1.
Mode H3: switch transistor T 2, T4, T5, the T7 conducting, all the other end.Electric current warp: DC+ → T7 → D2 → T5 → L2 → Vgrid → L1 → T4 → PV-, brachium pontis output voltage V ab=-V1.
Mode H4: switch transistor T 2, T4, T5, the T7 conducting, all the other end.Electric current warp: PV-→ D4 → L1 → Vgrid → L2 → D5 → T2 → D7 → DC+, brachium pontis output voltage V ab=-V1.
Mode H5: switch transistor T 1, T3, the T6 conducting, all the other end.Electric current warp: PV+ → T1 → T3 → L1 → Vgrid → L2 → T6 → PV-, brachium pontis output voltage V ab=V2.
Mode H6: switch transistor T 1, T3, the T6 conducting, all the other end.Electric current warp: PV-→ D6 → L2 → Vgrid → L1 → D3 → D1 → PV+, brachium pontis output voltage V ab=V2.
Mode H7: switch transistor T 1, T4, the T5 conducting, all the other end.Electric current warp: PV+ → T1 → T5 → L2 → Vgrid → L1 → T4 → PV-, brachium pontis output voltage V ab=-V2.
Mode H8: switch transistor T 1, T4, the T5 conducting, all the other end.Electric current warp: PV-→ D4 → L1 → Vgrid → L2 → D5 → D1 → PV+, brachium pontis output voltage V ab=-V2.
Mode H9: switch transistor T 3, the T5 conducting, all the other end.Electric current warp: D5 → T3 → L1 → Vgrid → L2 → D5, brachium pontis output voltage V ab=0.
Mode H10: switch transistor T 3, the T5 conducting, all the other end.Electric current warp: D3 → T5 → L2 → Vgrid → L1 → D3, brachium pontis output voltage V ab=0.
Mode H11: switch transistor T 4, the T6 conducting, all the other end.Electric current warp: T6 → D4 → L1 → Vgrid → L2 → T6, brachium pontis output voltage V ab=0.
Mode H12: switch transistor T 4, the T6 conducting, all the other end.Electric current warp: T4 → D6 → L2 → Vgrid → L1 → T4, brachium pontis output voltage V ab=0.
Common-mode voltage VCM=(VaN+VbN)/2 calculates the common-mode voltage of above-mentioned mode successively.Consider the effect of switching tube parasitic capacitance, can be similar to and think that common-mode voltage calculates gained as follows.
Mode H1, H2:VaN=V1, VbN=0, therefore, VCM=V1/2;
Mode H3, H4:VaN=0, VbN=V1, therefore, VCM=V1/2;
Mode H5, H6:VaN=V2, VbN=0, therefore, VCM=V2/2;
Mode H7, H8:VaN=0, VbN=V2, therefore, VCM=V2/2;
Mode H9, H10:VaN=V1/2, VbN=V1/2, therefore, VCM=V1/2;
Mode H11, H12:VaN=0, VbN=V0, therefore, VCM=0.
Common-mode voltage under the various operation modes is shown in following table one:
The common-mode voltage of the various operation modes of table one
Operation mode | Brachium pontis output voltage V ab | Common-mode voltage VCM | Current direction |
H1,H2 | V1 | V1/2 | The H1-forward current, the H2-negative current |
H3,H4 | -V1 | V1/2 | The H3-negative current, the H4-forward current |
H5,H6 | V2 | V2/2 | The H5-forward current, the H6-negative current |
H7,H8 | -V2 | V2/2 | The H7-negative current, the H8-forward current |
H9, |
0 | V1/2 | The H9-forward current, the H10-negative current |
H11, |
0 | 0 | The H11-forward current, the H12-negative current |
All can obtain the Vab=0 level by H9, the combination of H10 operation mode and H11, the combination of H12 operation mode, difference is common-mode voltage, and the common-mode voltage of other mode is V1/2 or V2/2.Less in order to guarantee leakage current as far as possible, to get approaching one group of common-mode voltage, thereby given up H11, the H12 operation mode is by H9, H10 operation mode combination Vab=0 level.
Need to prove that because the existence of switching device parasitic capacitance, the voltage on the parasitic capacitance can not instantaneous mutation, therefore, H9, the corresponding common-mode voltage of H10 mode can be regarded as keeping the common-mode voltage V1/2 of a mode (H1/H2/H3/H4) on it.
Can know from above-mentioned analysis, the inverter of this structure, intermediate level is not to be obtained by two capacitance partial pressures, so V1 not necessarily will equal V2/2, therefore, has evaded the problem of the neutral balance control of many level controls, realizes easily.
Adopt the job analysis of inverter of above mode following:
Suppose that satisfying the minimum operating voltage of inverter is Vm (being generally the amplitude or the peak value of line voltage), PV (DC power supply) output voltage V 2 is higher than the minimum operating voltage Vm of inverter, adopts the modulation strategy of the following stated.
(1) obtain voltage V1 through the work of Buck reduction voltage circuit DC/DC converter, make V1<Vm, bridge arm voltage and common-mode voltage are shown in Fig. 6 (a) and (b).
This kind modulation strategy is fit to the minimum operating voltage of PV voltage ratio inverter-bigger, so can obtain V1<Vm, this moment is according to the value that relatively obtains mode switching point t0, t1, t2, t3, t4, t5, t6.
(2) obtain voltage V1 through the work of Buck reduction voltage circuit DC/DC converter, make V1>Vm, bridge arm voltage and common-mode voltage are shown in Fig. 7 (a) and (b).
It is a lot of greatly that this kind modulation strategy is fit to the minimum operating voltage of PV voltage ratio inverter, and at this moment, the V1 that step-down obtains later on is less than V2; But it is too many that the value of V1 and V2 can not differ; Otherwise common-mode voltage variation is bigger, produces leakage current, and the value of V1 and V2 can not be too approaching; Thereby make the output current distortion not reach requirement, optimum state promptly is V2>V1>Vm.
As shown in Figure 8, be a kind of main circuit diagram of concrete structure of the DC/DC converter using of this embodiment.At this moment, the DC/DC converter comprises power switch pipe TB, diode DB, inductance L B.
Fig. 9 is the part-structure encapsulation sketch map of the inverter of this kind structure, and wherein the collector electrode of power switch pipe T1 respectively as the exchanging of packaging is exported AC1 and AC2 end as the zero level end of packaging, first output of H bridge circuit with second output as the first level end of packaging, second input of H bridge circuit as the second level end of packaging, the collector electrode of power switch pipe T7.
Figure 10 and Figure 11 are the two kind application circuit structures of this embodiment one in three-phase system.Two kinds of application circuit modes are similar basically, and its difference is, wherein Figure 10 is the structure chart that is applied in the three-phase system of three-phase three-wire system, and Figure 11 is the structure chart that is applied in the three-phase system of three-phase four-wire system.
The syndeton of this inverter applications in three-phase system does; Three groups of packagings as shown in Figure 9 are connected in parallel between the positive-negative output end of DC power supply; Wherein, The second level end of each packaging all is connected to the positive output end of DC power supply, and the zero level end all is connected to the negative output terminal of DC power supply, and the first level end all is connected to the positive output end of DC/DC converter; The input of DC/DC converter and earth terminal are connected respectively to the positive-negative output end of DC power supply; Connect capacitor C 2 between the positive-negative output end of DC power supply, connect capacitor C 1 between the positive output end of DC/DC converter and the negative output terminal of DC power supply, the interchange output AC1 of each packaging and AC2 end are connected respectively to the two ends of three former limit windings in the three-phase system.
Second embodiment
Figure 12 is the second embodiment of the invention main circuit, and it has identical element with above-mentioned first embodiment, and its difference only is that wherein power switch pipe T1, T2, T7 are positioned at second input of H bridge circuit, is the antithesis topology of above-mentioned first embodiment.Its concrete structure is described below.
The input of said DC/DC converter and earth terminal all are connected the positive output end of DC power supply.
Connect said capacitor C 2 between the positive-negative output end of DC power supply, be connected said capacitor C 1 between the negative output terminal of DC/DC converter and the positive output end of DC power supply.
Power switch pipe T1, T2, T7 last diode D1 of inverse parallel, D2, D7 respectively; The emitter of power switch pipe T7 is connected to the negative output terminal of DC/DC converter; The emitter of power switch pipe T2 is connected to the negative output terminal of DC power supply; The collector electrode of power switch pipe T7 is connected with the collector electrode of power switch pipe T1, and the emitter of power switch pipe T1 is connected with the collector electrode of power switch pipe T2, and this tie point is connected to second input of H bridge circuit.
Said H bridge circuit comprises 4 power switch pipe T3, T4, T5, T6; The collector electrode of power switch pipe T3, T5 links to each other as the first input end of H bridge circuit; The emitter of power switch pipe T4, T6 links to each other as second input of H bridge circuit; The emitter of power switch pipe T3 is connected with the collector electrode of power switch pipe T4; This tie point is as first output of H bridge circuit, and the emitter of power switch pipe T5 is connected with the collector electrode of power switch pipe T6, and this tie point is as second output of H bridge circuit.Power switch pipe T3, T4, T5, T6 last diode D3 of inverse parallel, D4, D5, D6 respectively.
This inverter also comprises filter circuit; Said filter circuit comprises two inductance L 1, L2, and said inductance L 1 one ends are connected to first output of H bridge circuit, and the other end is connected to electrical network; Said inductance L 2 one ends are connected to second output of H bridge circuit, and the other end is connected to electrical network.
The operation mode of the inverter of this kind structure and modulation strategy principle are identical with the inverter topology of above-mentioned first kind of structure, here brief account.
The operational modal analysis of this inverter is following:
Mode H1: switch transistor T 2, T3, the T6 conducting, all the other end.Electric current warp: PV+ → T3 → L1 → Vgrid → L2 → T6 → T2 → PV-, brachium pontis output voltage V ab=V2.
Mode H2: switch transistor T 2, T3, the T6 conducting, all the other end.Electric current warp: PV-→ D2 → D6 → L2 → Vgrid → L1 → D3 → PV+, brachium pontis output voltage V ab=V2.
Mode H3: switch transistor T 2, T4, the T5 conducting, all the other end.Electric current warp: PV+ → T5 → L2 → Vgrid → L1 → T4 → T2 → PV-, brachium pontis output voltage V ab=-V2.
Mode H4: switch transistor T 2, T4, the T5 conducting, all the other end.Electric current warp: PV-→ D2 → D4 → L1 → Vgrid → L2 → D5 → PV+, brachium pontis output voltage V ab=-V2.
Mode H5: switch transistor T 1, T3, T6, the T7 conducting, all the other end.Electric current warp: PV+ → T3 → L1 → Vgrid → L2 → T6 → D1 → T7 → DC-, brachium pontis output voltage V ab=V1.
Mode H6: switch transistor T 1, T3, T6, the T7 conducting, all the other end.Electric current warp: DC-→ D7 → T1 → D6 → L2 → Vgrid → L1 → D3 → PV+, brachium pontis output voltage V ab=V1.
Mode H7: switch transistor T 1, T4, T5, the T7 conducting, all the other end.Electric current warp: PV+ → T5 → L2 → Vgrid → L1 → T4 → D1 → T7 → DC-, brachium pontis output voltage V ab=-V1.
Mode H8: switch transistor T 1, T4, T5, the T7 conducting, all the other end.Electric current warp: DC-→ D7 → T1 → D4 → L1 → Vgrid → L2 → D5 → PV+, brachium pontis output voltage V ab=-V1.
Mode H9: switch transistor T 4, the T6 conducting, all the other end.Electric current warp: T6 → D4 → L1 → Vgrid → L2 → T6, brachium pontis output voltage V ab=0.
Mode H10: switch transistor T 4, the T6 conducting, all the other end.Electric current warp: T4 → D6 → L2 → Vgrid → L1 → T4, brachium pontis output voltage V ab=0.
Mode H11: switch transistor T 3, the T5 conducting, all the other end.Electric current warp: D5 → T3 → L1 → Vgrid → L2 → D5, brachium pontis output voltage V ab=0.
Mode H12: switch transistor T 3, the T5 conducting, all the other end.Electric current warp: D3 → T5 → L2 → Vgrid → L1 → D3, brachium pontis output voltage V ab=0.
Common-mode voltage VCM=(VaN+VbN)/2 calculates the common-mode voltage of above-mentioned mode successively.Consider the effect of switching tube parasitic capacitance, can be similar to and think that common-mode voltage is shown in following table two.
The common-mode voltage of the various operation modes of table two
Operation mode | Brachium pontis output voltage V ab | Common-mode voltage VCM | Current direction |
H1,H2 | V2 | V2/2 | The HI-forward current, the H2-negative current |
H3,H4 | -V2 | V2/2 | The H3-negative current, the H4-forward current |
H5,H6 | V1 | V2-V1/2 | The H5-forward current, the H6-negative current |
H7,H8 | -V1 | V2-V1/2 | The H7-negative current, the H8-forward current |
H9, |
0 | V2-V1/2 | The H9-forward current, the H10-negative current |
H11, |
0 | V2 | The H11-forward current, the H12-negative current |
With the analysis of above-mentioned first kind of structure, given up H11, the H12 operation mode is by H9, H10 operation mode combination Vab=0 level.
Can know from above-mentioned analysis, the inverter of this structure, intermediate level is not to be obtained by two capacitance partial pressures, so V2 not necessarily will equal twice V1, therefore, has evaded the problem of the neutral balance control of many level controls, realizes easily.
Adopt the job analysis of inverter of above mode following:
Suppose that satisfying the minimum operating voltage of inverter is Vm (being generally the amplitude or the peak value of line voltage), PV (DC power supply) output voltage V 2 is higher than the minimum operating voltage Vm of inverter, adopts the modulation strategy of the following stated.
(1) obtain voltage V1 through the work of Buck reduction voltage circuit DC/DC converter, make V1<Vm, bridge arm voltage and common-mode voltage are shown in Figure 13 (a) and (b).
(2) obtain voltage V1 through the work of Buck reduction voltage circuit DC/DC converter, make V2>V1>Vm, bridge arm voltage and common-mode voltage are shown in Figure 14 (a) and (b).
Figure 15 is the main circuit diagram of a kind of concrete structure of the DC/DC converter using in the structure shown in Figure 12.Figure 16 is the power switch pipe encapsulation back sketch map of the embodiment of the invention second embodiment.
The inverter topology of this kind structure can be applied in three-phase three-wire system and three-phase system three-phase four-wire system, like Figure 17 and shown in Figure 180 equally.At this moment; Power switch pipe T1, T2, T3, T4, T5, T6, T7 are as a packaging; Wherein the first input end of H bridge circuit respectively as the exchanging of packaging is exported AC1 and AC2 end as the zero level end of packaging, first output of H bridge circuit with second output as the first level end of packaging, the emitter of power switch pipe T2 as the second level end of packaging, the emitter of power switch pipe T7; Three groups of described packagings are connected in parallel between the positive-negative output end of DC power supply; Wherein, The second level end of each packaging all is connected to the positive output end of DC power supply, and the zero level end all is connected to the negative output terminal of DC power supply, and the first level end all is connected to the negative output terminal of DC/DC converter; The input of DC/DC converter and earth terminal are connected respectively to the positive-negative output end of DC power supply; Connect capacitor C 2 between the positive-negative output end of DC power supply, connect capacitor C 1 between the negative output terminal of DC/DC converter and the positive output end of DC power supply, the interchange output AC1 of each packaging and AC2 end are connected respectively to the two ends of three former limit windings in the three-phase system.
The 3rd embodiment
See also Figure 19, the difference of this embodiment and embodiment one is to have lacked a power switch pipe T2, and the structure of other parts is all identical.
See also Figure 20 a to Figure 20 h, the operational modal analysis of this embodiment inverter is following:
Mode H1: switch transistor T 3, T6, the T7 conducting, all the other end.Electric current warp: DC+ → T7 → D2 → T3 → L1 → Vgrid → L2 → T6 → PV-, brachium pontis output voltage V ab=V1.
Mode H3: switch transistor T 4, T5, the T7 conducting, all the other end.Electric current warp: DC+ → T7 → D2 → T5 → L2 → Vgrid → L1 → T4 → PV-, brachium pontis output voltage V ab=-V1.
Mode H5: switch transistor T 1, T3, the T6 conducting, all the other end.Electric current warp: PV+ → T1 → T3 → L1 → Vgrid → L2 → T6 → PV-, brachium pontis output voltage V ab=V2.
Mode H6: switch transistor T 1, T3, the T6 conducting, all the other end.Electric current warp: PV-→ D6 → L2 → Vgrid → L1 → D3 → D1 → PV+, brachium pontis output voltage V ab=V2.
Mode H7: switch transistor T 1, T4, the T5 conducting, all the other end.Electric current warp: PV+ → T1 → T5 → L2 → Vgrid → L1 → T4 → PV-, brachium pontis output voltage V ab=-V2.
Mode H8: switch transistor T 1, T4, the T5 conducting, all the other end.Electric current warp: PV-→ D4 → L1 → Vgrid → L2 → D5 → D1 → PV+, brachium pontis output voltage V ab=-V2.
Mode H9: switch transistor T 3, the T5 conducting, all the other end.Electric current warp: D5 → T3 → L1 → Vgrid → L2 → D5, brachium pontis output voltage V ab=0.
Mode H10: switch transistor T 3, the T5 conducting, all the other end.Electric current warp: D3 → T5 → L2 → Vgrid → L1 → D3, brachium pontis output voltage V ab=0.
Mode H11: switch transistor T 4, the T6 conducting, all the other end.Electric current warp: T6 → D4 → L1 → Vgrid → L2 → T6, brachium pontis output voltage V ab=0.
Mode H12: switch transistor T 4, the T6 conducting, all the other end.Electric current warp: T4 → D6 → L2 → Vgrid → L1 → T4, brachium pontis output voltage V ab=0.
Preceding 8 mode: mode H1, mode H3, mode H5, mode H6, mode H7, mode H8, mode H9, mode H10 have been shown among Figure 20 a to Figure 20 h.
Common-mode voltage VCM=(VaN+VbN)/2 calculates the common-mode voltage of above-mentioned mode successively.Consider the effect of switching tube parasitic capacitance, can be similar to and think that common-mode voltage calculates gained as follows.
Mode H1:VaN=V1, VbN=0, therefore, VCM=V1/2;
Mode H3:VaN=0, VbN=V1, therefore, VCM=V1/2;
Mode H5, H6:VaN=V2, VbN=0, therefore, VCM=V2/2;
Mode H7, H8:VaN=0, VbN=V2, therefore, VCM=V2/2;
Mode H9, H10:VaN=V1/2, VbN=V1/2, therefore, VCM=V1/2;
Mode H11, H12:VaN=0, VbN=V0, therefore, VCM=0.
Also promptly two mode: H2, H4 have been lacked than above-mentioned second embodiment.
Common-mode voltage under the various operation modes is shown in following table three:
The common-mode voltage of the various operation modes of table three
Operation mode | Brachium pontis output voltage V ab | Common-mode voltage VCM | Current direction |
H1 | V1 | V1/2 | The H1-forward current, the H2-negative current |
H3 | -V1 | V1/2 | The H3-negative current, the H4-forward current |
H5,H6 | V2 | V2/2 | The H5-forward current, the H6-negative current |
H7,H8 | -V2 | V2/2 | The H7-negative current, the H8-forward current |
H9, |
0 | V1/2 | The H9-forward current, the H10-negative current |
H11, |
0 | 0 | The H11-forward current, the H12-negative current |
The principle identical with embodiment one given up H11, and the H12 operation mode is by H9, H10 operation mode combination Vab=0 level.
Can know from above-mentioned analysis, the inverter of this structure, intermediate level is not to be obtained by two capacitance partial pressures, so V1 not necessarily will equal V2/2, therefore, has evaded the problem of the neutral balance control of many level controls, realizes easily.
Adopt the job analysis of inverter of above mode following:
Suppose that satisfying the minimum operating voltage of inverter is Vm (being generally the amplitude or the peak value of line voltage), PV (DC power supply) output voltage V 2 is higher than the minimum operating voltage Vm of inverter, adopts the modulation strategy of the following stated.
(1) obtain voltage V1 through the work of Buck reduction voltage circuit DC/DC converter, make V1<Vm, bridge arm voltage and common-mode voltage are shown in Fig. 6 (a) and (b).
This kind modulation strategy is fit to the minimum operating voltage of PV voltage ratio inverter-bigger, so can obtain V1<Vm, this moment is according to the value that relatively obtains mode switching point t0, t1, t2, t3, t4, t5, t6.
(2) obtain voltage V1 through the work of Buck reduction voltage circuit DC/DC converter, make V1>Vm, bridge arm voltage and common-mode voltage are shown in Fig. 7 (a) and (b).
It is a lot of greatly that this kind modulation strategy is fit to the minimum operating voltage of PV voltage ratio inverter, and at this moment, the V1 that step-down obtains later on is less than V2; But it is too many that the value of V1 and V2 can not differ; Otherwise common-mode voltage variation is bigger, produces leakage current, and the value of V1 and V2 can not be too approaching; Thereby make the output current distortion not reach requirement, optimum state promptly is V2>V1>Vm.
The inverter of this kind structure can carry out the encapsulation of part-structure equally, and wherein the collector electrode of power switch pipe T1 respectively as the exchanging of packaging is exported AC1 and AC2 end as the zero level end of packaging, first output of H bridge circuit with second output as the first level end of packaging, second input of H bridge circuit as the second level end of packaging, the collector electrode of power switch pipe T7.
The inverter of this kind structure can be applied in the three-phase system of three-phase three-wire system or three-phase four-wire system equally.During application; Three groups of above-mentioned packagings are connected in parallel between the positive-negative output end of DC power supply; Wherein, The second level end of each packaging all is connected to the positive output end of DC power supply, and the zero level end all is connected to the negative output terminal of DC power supply, and the first level end all is connected to the positive output end of DC/DC converter; The input of DC/DC converter and earth terminal are connected respectively to the positive-negative output end of DC power supply; Connect capacitor C 2 between the positive-negative output end of DC power supply, connect capacitor C 1 between the positive output end of DC/DC converter and the negative output terminal of DC power supply, the interchange output AC1 of each packaging and AC2 end are connected respectively to the two ends of three former limit windings in the three-phase system.
The 4th embodiment
See also Figure 21, Figure 21 is the fourth embodiment of the invention main circuit, that is to say the simplification circuit of above-mentioned second embodiment, and the difference of itself and above-mentioned second embodiment only is that lacked a power switch pipe T1, other structures are identical.
The operational modal analysis of this inverter is following:
Mode H1: switch transistor T 2, T3, the T6 conducting, all the other end.Electric current warp: PV+ → T3 → L1 → Vgrid → L2 → T6 → T2 → PV-, brachium pontis output voltage V ab=V2.
Mode H2: switch transistor T 2, T3, the T6 conducting, all the other end.Electric current warp: PV-→ D2 → D6 → L2 → Vgrid → L1 → D3 → PV+, brachium pontis output voltage V ab=V2.
Mode H3: switch transistor T 2, T4, the T5 conducting, all the other end.Electric current warp: PV+ → T5 → L2 → Vgrid → L1 → T4 → T2 → PV-, brachium pontis output voltage V ab=-V2.
Mode H4: switch transistor T 2, T4, the T5 conducting, all the other end.Electric current warp: PV-→ D2 → D4 → L1 → Vgrid → L2 → D5 → PV+, brachium pontis output voltage V ab=-V2.
Mode H5: switch transistor T 3, T6, the T7 conducting, all the other end.Electric current warp: PV+ → T3 → L1 → Vgrid → L2 → T6 → D1 → T7 → DC-, brachium pontis output voltage V ab=V1.
Mode H7: switch transistor T 4, T5, the T7 conducting, all the other end.Electric current warp: PV+ → T5 → L2 → Vgrid → L1 → T4 → D1 → T7 → DC-, brachium pontis output voltage V ab=-V1.
Mode H9: switch transistor T 4, the T6 conducting, all the other end.Electric current warp: T6 → D4 → L1 → Vgrid → L2 → T6, brachium pontis output voltage V ab=0.
Mode H10: switch transistor T 4, the T6 conducting, all the other end.Electric current warp: T4 → D6 → L2 → Vgrid → L1 → T4, brachium pontis output voltage V ab=0.
Mode H11: switch transistor T 3, the T5 conducting, all the other end.Electric current warp: D5 → T3 → L1 → Vgrid → L2 → D5, brachium pontis output voltage V ab=0.
Mode H12: switch transistor T 3, the T5 conducting, all the other end.Electric current warp: D3 → T5 → L2 → Vgrid → L1 → D3, brachium pontis output voltage V ab=0.
Also promptly two mode: H6, H8 have been lacked than above-mentioned second embodiment.
Common-mode voltage VCM=(VaN+VbN)/2 calculates the common-mode voltage of above-mentioned mode successively.Consider the effect of switching tube parasitic capacitance, can be similar to and think that common-mode voltage is shown in following table four.
The common-mode voltage of the various operation modes of table four
Operation mode | Brachium pontis output voltage V ab | Common-mode voltage VCM | Current direction |
H1,H2 | V2 | V2/2 | The H1-forward current, the H2-negative current |
H3,H4 | -V2 | V2/2 | The H3-negative current, the H4-forward current |
H5 | V1 | V2-V1/2 | The H5-forward current, the H6-negative current |
H7 | -V1 | V2-V1/2 | The H7-negative current, the H8-forward current |
H9, |
0 | V2-V1/2 | The H9-forward current, the H10-negative current |
H11, |
0 | V2 | The H11-forward current, the H12-negative current |
With above-mentioned analysis, given up H11, the H12 operation mode is by H9, H10 operation mode combination Vab=0 level.
Can know from above-mentioned analysis, the inverter of this structure, intermediate level is not to be obtained by two capacitance partial pressures, so V2 not necessarily will equal twice V1, therefore, has evaded the problem of the neutral balance control of many level controls, realizes easily.
Adopt the job analysis of inverter of above mode following:
Suppose that satisfying the minimum operating voltage of inverter is Vm (being generally the amplitude or the peak value of line voltage), PV (DC power supply) output voltage V 2 is higher than the minimum operating voltage Vm of inverter, adopts the modulation strategy of the following stated.
(1) obtain voltage V1 through the work of Buck reduction voltage circuit DC/DC converter, make V1<Vm, bridge arm voltage and common-mode voltage are shown in Figure 13 (a) and (b).
(2) obtain voltage V1 through the work of Buck reduction voltage circuit DC/DC converter, make V2>V1>Vm, bridge arm voltage and common-mode voltage are shown in Figure 14 (a) and (b).
The inverter topology of this kind structure can be applied in three-phase three-wire system and three-phase system three-phase four-wire system equally; At this moment; Power switch pipe T2, T3, T4, T5, T6, T7 are as a packaging; Wherein the first input end of H bridge circuit respectively as the exchanging of packaging is exported AC1 and AC2 end as the zero level end of packaging, first output of H bridge circuit with second output as the first level end of packaging, the emitter of power switch pipe T2 as the second level end of packaging, the emitter of power switch pipe T7; Three groups of described packagings are connected in parallel between the positive-negative output end of DC power supply; Wherein, The second level end of each packaging all is connected to the positive output end of DC power supply, and the zero level end all is connected to the negative output terminal of DC power supply, and the first level end all is connected to the negative output terminal of DC/DC converter; The input of DC/DC converter and earth terminal are connected respectively to the positive-negative output end of DC power supply; Connect capacitor C 2 between the positive-negative output end of DC power supply, connect capacitor C 1 between the negative output terminal of DC/DC converter and the positive output end of DC power supply, the interchange output AC1 of each packaging and AC2 end are connected respectively to the two ends of three former limit windings in the three-phase system.
The power switch pipe of mentioning among above-mentioned four embodiment can adopt thyristor, MOSFET (mos field effect transistor), JFET (technotron), IGBT (insulated gate bipolar) or the like switching tube.
Need to prove, can be solar cell in the DC power supply practical application among above-mentioned four embodiment, can also be other DC power supplys.Filter circuit among above-mentioned four embodiment can also be LC type or LCL type structure.
Though more than described the embodiment of the embodiment of the invention; But the technical staff who is familiar with the present technique field is to be understood that; We described concrete embodiment is illustrative; Rather than being used for qualification to the scope of the embodiment of the invention, those of ordinary skill in the art are in the modification and the variation of the equivalence of doing according to the spirit of the embodiment of the invention, all should be encompassed in the scope that the claim of the embodiment of the invention protects.
Claims (21)
1. inverter; It is characterized in that: the power switch pipe T1, T2, T7, the H bridge circuit that comprise capacitor C 1, C2, three polyphones; The DC/DC converter, the collector electrode of power switch pipe T1 is connected to the positive output end of DC power supply, and the emitter of power switch pipe T1 is connected with the collector electrode of power switch pipe T2; This tie point is connected to the first input end of H bridge circuit; Said H bridge circuit comprises 4 power switch pipe T3, T4, T5, T6, and the collector electrode of power switch pipe T3, T5 links to each other as the first input end of H bridge circuit, and the emitter of power switch pipe T4, T6 links to each other as second input of H bridge circuit; Be connected to the negative output terminal of DC power supply; The emitter of power switch pipe T3 is connected with the collector electrode of power switch pipe T4, and this tie point is as first output of H bridge circuit, and the emitter of power switch pipe T5 is connected with the collector electrode of power switch pipe T6; This tie point is as second output of H bridge circuit; Two outputs of H bridge circuit are connected respectively to electrical network, power switch pipe T1, T2, T3, T4, T5, T6, T7 last diode D1 of inverse parallel, D2, D3, D4, D5, D6, D7 respectively, and the input of said DC/DC converter and earth terminal are connected to the two ends of DC power supply; Connect said capacitor C 2 between the positive-negative output end of DC power supply; Be connected said capacitor C 1 between the positive output end of DC/DC converter and the negative output terminal of DC power supply, the emitter of power switch pipe T2 is connected with the emitter of power switch pipe T7, and the collector electrode of power switch pipe T7 is connected to the positive output end of DC/DC converter.
2. inverter as claimed in claim 1 is characterized in that: described inverter is operated in following mode:
Mode H1: switch transistor T 2, T3, T6, the T7 conducting, all the other end, electric current warp: DC+ → T7 → D2 → T3 → Vgrid → T6 → PV-;
Mode H2: switch transistor T 2, T3, T6, the T7 conducting, all the other end, electric current warp: PV-→ D6 → Vgrid → D3 → T2 → D7 → DC+;
Mode H3: switch transistor T 2, T4, T5, the T7 conducting, all the other end, electric current warp: DC+ → T7 → D2 → T5 → Vgrid → T4 → PV-;
Mode H4: switch transistor T 2, T4, T5, the T7 conducting, all the other end, electric current warp: PV-→ D4 → Vgrid → D5 → T2 → D7 → DC+;
Mode H5: switch transistor T 1, T3, the T6 conducting, all the other end, electric current warp: PV+ → T1 → T3 → Vgrid → T6 → PV-;
Mode H6: switch transistor T 1, T3, the T6 conducting, all the other end, electric current warp: PV-→ D6 → Vgrid → D3 → D1 → PV+;
Mode H7: switch transistor T 1, T4, the T5 conducting, all the other end, electric current warp: PV+ → T1 → T5 → Vgrid → T4 → PV-;
Mode H8: switch transistor T 1, T4, the T5 conducting, all the other end, electric current warp: PV-→ D4 → Vgrid → D5 → D1 → PV+;
Mode H9: switch transistor T 3, the T5 conducting, all the other end, electric current warp: D5 → T3 → Vgrid → D5;
Mode H10: switch transistor T 3, the T5 conducting, all the other end, electric current warp: D3 → T5 → Vgrid → D3;
In above-mentioned each mode, DC+ represents the positive output end of DC/DC converter, and PV+ represents the positive output end of DC power supply, and PV-represents the negative output terminal of DC power supply, and Vgrid represents electrical network.
3. inverter as claimed in claim 2 is characterized in that: when DC power supply output voltage V 2 is higher than the minimum operating voltage Vm of inverter, control inverter obtains voltage V1 through the work of DC/DC converter when making its work and satisfies V1<Vm.
4. inverter as claimed in claim 2 is characterized in that: when DC power supply output voltage V 2 is higher than the minimum operating voltage Vm of inverter, control inverter obtains voltage V1 through the work of DC/DC converter when making its work and satisfies V2>V1>Vm.
5. like each described inverter of claim 1 to 4; It is characterized in that: described power switch pipe T1, T2, T3, T4, T5, T6, T7 and six diode D1, D2, D3, D4, D5, D6, D7 are called the first power switch pipe unit, and said inverter also comprises structure and identical second and third power switch pipe unit of the first power switch pipe unit;
With the first power switch pipe cell descriptions, wherein the collector electrode of power switch pipe T1 as the collector electrode of the second level end, power switch pipe T7 as second input of the first level end, H bridge circuit as first output of zero level end, H bridge circuit and second output respectively as ac output end;
Wherein, the second level end of each power switch pipe unit all is connected to the positive output end of DC power supply, and the zero level end all is connected to the negative output terminal of DC power supply, and the first level end all is connected to the positive output end of DC/DC converter.
6. inverter; It is characterized in that: the power switch pipe T1, T2, T7, the H bridge circuit that comprise capacitor C 1, C2, three polyphones; The DC/DC converter, said H bridge circuit comprises 4 power switch pipe T3, T4, T5, T6, the collector electrode of power switch pipe T3, T5 links to each other as the first input end of H bridge circuit; Be connected to the positive output end of DC power supply; The emitter of power switch pipe T4, T6 links to each other as second input of H bridge circuit, and the emitter of power switch pipe T3 is connected with the collector electrode of power switch pipe T4, and this tie point is as first output of H bridge circuit; The emitter of power switch pipe T5 is connected with the collector electrode of power switch pipe T6; This tie point is as second output of H bridge circuit, and two outputs of H bridge circuit are connected respectively to electrical network, power switch pipe T1, T2, T3, T4, T5, T6, T7 last diode D1 of inverse parallel, D2, D3, D4, D5, D6, D7 respectively; The input of said DC/DC converter is connected the positive output end of DC power supply with earth terminal; Connect said capacitor C 2 between the positive-negative output end of DC power supply, be connected said capacitor C 1 between the negative output terminal of DC/DC converter and the positive output end of DC power supply, the emitter of power switch pipe T7 is connected to the negative output terminal of DC/DC converter; The emitter of power switch pipe T2 is connected to the negative output terminal of DC power supply; The collector electrode of power switch pipe T7 is connected with the collector electrode of power switch pipe T1, and the emitter of power switch pipe T1 is connected with the collector electrode of power switch pipe T2, and this tie point is connected to second input of H bridge circuit.
7. inverter as claimed in claim 6 is characterized in that: described inverter is operated in following mode:
Mode H1: switch transistor T 2, T3, the T6 conducting, all the other end, electric current warp: PV+ → T3 → Vgrid → T6 → T2 → PV-;
Mode H2: switch transistor T 2, T3, the T6 conducting, all the other end, electric current warp: PV-→ D2 → D6 → Vgrid → D3 → PV+;
Mode H3: switch transistor T 2, T4, the T5 conducting, all the other end, electric current warp: PV+ → T5 → Vgrid → T4 → T2 → PV-;
Mode H4: switch transistor T 2, T4, the T5 conducting, all the other end, electric current warp: PV-→ D2 → D4 → Vgrid → D5 → PV+;
Mode H5: switch transistor T 1, T3, T6, the T7 conducting, all the other end, electric current warp: PV+ → T3 → Vgrid → T6 → D1 → T7 → DC-;
Mode H6: switch transistor T 1, T3, T6, the T7 conducting, all the other end, electric current warp: DC-→ D7 → T1 → D6 → Vgrid → D3 → PV+;
Mode H7: switch transistor T 1, T4, T5, the T7 conducting, all the other end, electric current warp: PV+ → T5 → Vgrid → T4 → D1 → T7 → DC-;
Mode H8: switch transistor T 1, T4, T5, the T7 conducting, all the other end, electric current warp: DC-→ D7 → T1 → D4 → Vgrid → D5 → PV+;
Mode H9: switch transistor T 4, the T6 conducting, all the other end, electric current warp: T6 → D4 → Vgrid → T6;
Mode H10: switch transistor T 4, the T6 conducting, all the other end, electric current warp: T4 → D6 → Vgrid → T4;
In above-mentioned each mode, DC-represents the negative output terminal of DC/DC converter, and PV+ represents the positive output end of DC power supply, and PV-represents the negative output terminal of DC power supply, and Vgrid represents electrical network.
8. inverter as claimed in claim 7 is characterized in that: when DC power supply output voltage V 2 is higher than the minimum operating voltage Vm of inverter, and control inverter, obtaining voltage through the work of DC/DC converter during its work is V1, V1 meets the following conditions: V1<Vm.
9. inverter as claimed in claim 7; It is characterized in that: when DC power supply output voltage V 2 is higher than the minimum operating voltage Vm of inverter; Control inverter obtains voltage V1 through the work of DC/DC converter during its work, and V1 meets the following conditions: V2>V1>Vm.
10. like each described inverter of claim 6 to 9; It is characterized in that: described seven power switch pipe T1, T2, T3, T4, T5, T6, T7 and seven diode D1, D2, D3, D4, D5, D6, D7 are called the first power switch pipe unit, and said inverter also comprises structure and identical second and third power switch pipe unit of the first power switch pipe unit;
With the first power switch pipe cell descriptions, wherein the first input end of H bridge circuit as the emitter of the second level end, power switch pipe T7 as the emitter of the first level end, power switch pipe T2 as first output of zero level end, H bridge circuit and second output respectively as ac output end;
Wherein, the second level end of each power switch pipe unit all is connected to the positive output end of DC power supply, and the zero level end all is connected to the negative output terminal of DC power supply, and the first level end all is connected to the negative output terminal of DC/DC converter.
11. inverter; It is characterized in that: the power switch pipe T1, T7, diode D2, the H bridge circuit that comprise capacitor C 1, C2, two polyphones; The DC/DC converter, the collector electrode of power switch pipe T1 is connected to the positive output end of DC power supply, and the emitter of power switch pipe T1 is connected with the negative electrode of diode D2; This tie point is connected to the first input end of H bridge circuit; Said H bridge circuit comprises 4 power switch pipe T3, T4, T5, T6, and the collector electrode of power switch pipe T3, T5 links to each other as the first input end of H bridge circuit, and the emitter of power switch pipe T4, T6 links to each other as second input of H bridge circuit; Be connected to the negative output terminal of DC power supply; The emitter of power switch pipe T3 is connected with the collector electrode of power switch pipe T4, and this tie point is as first output of H bridge circuit, and the emitter of power switch pipe T5 is connected with the collector electrode of power switch pipe T6; This tie point is as second output of H bridge circuit; Two outputs of H bridge circuit are connected respectively to electrical network, power switch pipe T1, T3, T4, T5, T6, T7 last diode D1 of inverse parallel, D3, D4, D5, D6, D7 respectively, and the input of said DC/DC converter and earth terminal are connected to the two ends of DC power supply; Connect said capacitor C 2 between the positive-negative output end of DC power supply; Be connected said capacitor C 1 between the positive output end of DC/DC converter and the negative output terminal of DC power supply, the anode of diode D2 is connected with the emitter of power switch pipe T7, and the collector electrode of power switch pipe T7 is connected to the positive output end of DC/DC converter.
12. inverter as claimed in claim 11 is characterized in that: described inverter is operated in following mode:
Mode H1: switch transistor T 3, T6, the T7 conducting, all the other end, electric current warp: DC+ → T7 → D2 → T3 → Vgrid → T6 → PV-;
Mode H3: switch transistor T 4, T5, the T7 conducting, all the other end, electric current warp: DC+ → T7 → D2 → T5 → Vgrid → T4 → PV-;
Mode H5: switch transistor T 1, T3, the T6 conducting, all the other end, electric current warp: PV+ → T1 → T3 → Vgrid → T6 → PV-;
Mode H6: switch transistor T 1, T3, the T6 conducting, all the other end, electric current warp: PV-→ D6 → Vgrid → D3 → D1 → PV+;
Mode H7: switch transistor T 1, T4, the T5 conducting, all the other end, electric current warp: PV+ → T1 → T5 → Vgrid → T4 → PV-;
Mode H8: switch transistor T 1, T4, the T5 conducting, all the other end, electric current warp: PV-→ D4 → Vgrid → D5 → D1 → PV+;
Mode H9: switch transistor T 3, the T5 conducting, all the other end, electric current warp: D5 → T3 → Vgrid → D5;
Mode H10: switch transistor T 3, the T5 conducting, all the other end, electric current warp: D3 → T5 → Vgrid → D3;
In above-mentioned each mode, DC+ represents the positive output end of DC/DC converter, and PV+ represents the positive output end of DC power supply, and PV represents the negative output terminal of DC power supply, and Vgrid represents electrical network.
13. inverter as claimed in claim 12 is characterized in that: when DC power supply output voltage V 2 is higher than the minimum operating voltage Vm of inverter, control inverter obtains voltage V1 through the work of DC/DC converter when making its work and satisfies V1<Vm.
14. inverter as claimed in claim 12 is characterized in that: when DC power supply output voltage V 2 is higher than the minimum operating voltage Vm of inverter, control inverter obtains voltage V1 through the work of DC/DC converter when making its work and satisfies V2>V1>Vm.
15. like each described inverter of claim 11 to 14; It is characterized in that: described power switch pipe T1, T3, T4, T5, T6, T7 and seven diode D1, D2, D3, D4, D5, D6, D7 are called the first power switch pipe unit, and said inverter also comprises structure and identical second and third power switch pipe unit of the first power switch pipe unit;
With the first power switch pipe cell descriptions, wherein the collector electrode of power switch pipe T1 as the collector electrode of the second level end, power switch pipe T7 as second input of the first level end, H bridge circuit as first output of zero level end, H bridge circuit and second output respectively as ac output end;
Wherein, the second level end of each power switch pipe unit all is connected to the positive output end of DC power supply, and the zero level end all is connected to the negative output terminal of DC power supply, and the first level end all is connected to the positive output end of DC/DC converter.
16. inverter; It is characterized in that: the power switch pipe T2, T7, diode D1, the H bridge circuit that comprise capacitor C 1, C2, two polyphones; The DC/DC converter, said H bridge circuit comprises 4 power switch pipe T3, T4, T5, T6, the collector electrode of power switch pipe T3, T5 links to each other as the first input end of H bridge circuit; Be connected to the positive output end of DC power supply; The emitter of power switch pipe T4, T6 links to each other as second input of H bridge circuit, and the emitter of power switch pipe T3 is connected with the collector electrode of power switch pipe T4, and this tie point is as first output of H bridge circuit; The emitter of power switch pipe T5 is connected with the collector electrode of power switch pipe T6; This tie point is as second output of H bridge circuit, and two outputs of H bridge circuit are connected respectively to electrical network, power switch pipe T2, T3, T4, T5, T6, T7 last diode D2 of inverse parallel, D3, D4, D5, D6, D7 respectively; The input of said DC/DC converter is connected the positive output end of DC power supply with earth terminal; Connect said capacitor C 2 between the positive-negative output end of DC power supply, be connected said capacitor C 1 between the negative output terminal of DC/DC converter and the positive output end of DC power supply, the emitter of power switch pipe T7 is connected to the negative output terminal of DC/DC converter; The emitter of power switch pipe T2 is connected to the negative output terminal of DC power supply; The collector electrode of power switch pipe T7 is connected with the negative electrode of diode D1, and the anode of diode D1 is connected with the collector electrode of power switch pipe T2, and this tie point is connected to second input of H bridge circuit.
17. inverter as claimed in claim 16 is characterized in that: described inverter is operated in following mode:
Mode H1: switch transistor T 2, T3, the T6 conducting, all the other end, electric current warp: PV+ → T3 → Vgrid → T6 → T2 → PV-;
Mode H2: switch transistor T 2, T3, the T6 conducting, all the other end, electric current warp: PV-→ D2 → D6 → Vgrid → D3 → PV+;
Mode H3: switch transistor T 2, T4, the T5 conducting, all the other end, electric current warp: PV+ → T5 → Vgrid → T4 → T2 → PV-;
Mode H4: switch transistor T 2, T4, the T5 conducting, all the other end, electric current warp: PV-→ D2 → D4 → Vgrid → D5 → PV+;
Mode H5: switch transistor T 3, T6, the T7 conducting, all the other end, electric current warp: PV+ → T3 → Vgrid → T6 → D1 → T7 → DC-;
Mode H7: switch transistor T 4, T5, the T7 conducting, all the other end, electric current warp: PV+ → T5 → Vgrid → T4 → D1 → T7 → DC-;
Mode H9: switch transistor T 4, the T6 conducting, all the other end, electric current warp: T6 → D4 → Vgrid → T6;
Mode H10: switch transistor T 4, the T6 conducting, all the other end, electric current warp: T4 → D6 → Vgrid → T4;
In above-mentioned each mode, DC-represents the negative output terminal of DC/DC converter, and PV+ represents the positive output end of DC power supply, and PV-represents the negative output terminal of DC power supply, and Vgrid represents electrical network.
18. inverter as claimed in claim 17; It is characterized in that: when DC power supply output voltage V 2 is higher than the minimum operating voltage Vm of inverter; Control inverter, obtaining voltage through the work of DC/DC converter during its work is V1, V1 meets the following conditions: V1<Vm.
19. inverter as claimed in claim 17; It is characterized in that: when DC power supply output voltage V 2 is higher than the minimum operating voltage Vm of inverter; Control inverter obtains voltage V1 through the work of DC/DC converter during its work, and V1 meets the following conditions: V2>V1>Vm.
20. like each described inverter of claim 16 to 19; It is characterized in that: described six power switch pipe T2, T3, T4, T5, T6, T7 and seven diode D1, D2, D3, D4, D5, D6, D7 are called the first power switch pipe unit, and said inverter also comprises structure and identical second and third power switch pipe unit of the first power switch pipe unit;
With the first power switch pipe cell descriptions, wherein the first input end of H bridge circuit as the emitter of the second level end, power switch pipe T7 as the emitter of the first level end, power switch pipe T2 as first output of zero level end, H bridge circuit and second output respectively as ac output end;
Wherein, the second level end of each power switch pipe unit all is connected to the positive output end of DC power supply, and the zero level end all is connected to the negative output terminal of DC power supply, and the first level end all is connected to the negative output terminal of DC/DC converter.
21. one kind like claim 5,10, the application circuit of 15 or 20 each described inverters in three-phase system, it is characterized in that: the ac output end of each power switch pipe unit is connected respectively to the two ends of three former limit windings in the three-phase system.
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