CN102611436A - 8:1 structure 40MHz crystal oscillator frequency synthesizer for 60GHz wireless communication - Google Patents

Abstract

The invention discloses a 40MHz crystal oscillator frequency synthesizer with 8:1 structure for 60GHz wireless communication. The frequency synthesizer adopts a phase-locked loop structure based on integer frequency division, and the phase-locked loop structure based on integer frequency division adopts The crystal oscillator frequency of 40MHz is used as the reference frequency of the phase frequency detector PFD. The frequency division ratio is controlled by a multi-mode frequency divider divided by 64 to 127. The frequency division ratio of the multi-mode frequency divider is 2 ⁶ +2 ⁵ P ₅ + 2 ⁴ P ₄ +2 ³ P ₃ +2 ² P ₂ +2P ₁ +P ₀ determines that all integer frequency divisions between 64 and 127 can be realized by changing the high and low levels of P ₀ to P ₅ . Utilizing the present invention, a frequency synthesizer structure applicable to China's 60GHz spectrum planning is designed, so that the frequency synthesizer can be used for a transceiver with a ratio of 8:1 and double frequency conversion.

Description

8:1 structure 40MHz crystal oscillator frequency synthesizer for 60GHz wireless communication

technical field

The present invention relates to the technical field of high-speed short-distance wireless communication systems, in particular to an 8:1 structure 40MHz crystal oscillator frequency synthesizer for 60GHz wireless communication, which is applied to the 60GHz high-speed short-distance wireless communication system in WPAN (Wireless Personal Area Network) , is an important circuit module in a 60GHz wireless radio frequency transceiver. the

Background technique

The advantage of 60GHz wireless communication is that it can achieve a transmission rate of up to Gbps order, and this technology will become the mainstream technology of ultra-high-speed wireless personal area network. Currently NEC, Samsung, Panasonic and LG and other consumer electronics manufacturers have jointly established the WirelessHD Alliance to promote the application of 60GHz technology in uncompressed high-definition video transmission, which shows its huge market potential. At present, 60GHz technology has become the focus of academic and industrial circles in the world. The International Solid State Circuits Conference (International Solid State Circuits Conference) sets up special topics every year to collect papers related to 60GHz technology. Difficulties in design and testing of 60GHz millimeter wave circuits are subject to extensive attention. the

At present, China has opened the 59 to 64GHz frequency band as the frequency band for 60GHz technology, but due to the technical difficulty, the application research on this frequency band has just started, and the 60GHz spectrum planning that can be used for 8:1 transceivers and suitable for China has not yet been realized. frequency synthesizer structure. the

Contents of the invention

(1) Technical problems to be solved

In view of this, the main purpose of the present invention is to provide a kind of 8: 1 structure 40MHz crystal oscillator frequency synthesizer for 60GHz wireless communication, to design the frequency synthesizer structure applicable to China's 60GHz spectrum planning, make the frequency synthesizer Transceivers that can be used for double frequency conversion of 8:1 ratio. the

(2) Technical plan

To achieve the above object, the present invention provides a 8:1 structure 40MHz crystal oscillator frequency synthesizer for 60GHz wireless communication, the frequency synthesizer adopts a phase-locked loop structure based on integer frequency division, and the phase-locked loop structure based on integer frequency division The ring structure uses a crystal oscillator frequency of 40MHz as the reference frequency of the phase frequency detector PFD. The frequency division ratio is controlled by a multi-mode frequency divider divided by 64 to 127. The frequency division ratio of the multi-mode frequency divider is determined by 2 ⁶ + 2 ⁵ P ₅ +2 ⁴ P ₄ ⁺² 3 P ₃ +2 ² P ₂ +2P ₁ +P ₀ decides, by changing the high and low levels of P ₀ to P ₅ , all integer frequency divisions between 64 and 127 can be realized , where P ₀ to P ₅ are the control levels of cell1 to cell6 respectively, which are 1 when the control level is high, and 0 when the control level is low.

In the above scheme, the phase-locked loop structure based on integer frequency division includes a phase-frequency detector PFD, a charge pump CP, a low-pass filter LPF, a voltage-controlled oscillator VCO, and a frequency divider by 8 that are sequentially connected into a loop. , frequency divider by 4, frequency divider by 3 and frequency divider by 111/112/113/115/116/117 multimode frequency divider, and a 40MHz crystal oscillator frequency divider by 8 connected to the phase frequency detector PFD. the

In the above scheme, the multi-mode frequency divider divided by 111/112/113/115/116/117 is formed by cascade connection of divided by 2 or divided by 3 multi-mode frequency dividers in cascade, by changing P ₀ to High and low levels of P ₅ generate all integer divisions between 64 and 127.

In the above scheme, the generation of all integer frequency divisions between 64 and 127 by changing the high and low levels of P ₀ to P ₅ is by changing the multi-mode frequency division of 111/112/113/115/116/117 The frequency divider ratio of the device produces the following local oscillator signals for 60GHz: 53.28GHz, 53.76GHz, 54.24GHz, 55.2GHz, 55.68GHz and 56.16GHz.

In the above solution, when changing the frequency division ratio of the 111/112/113/115/116/117 multimode frequency divider, the VCO outputs 60 GHz local oscillator signals of different frequencies because the input reference frequency remains unchanged. The local oscillator signals of the following frequency points are realized in the multi-mode frequency divider: 53.28GHz, 53.76GHz, 54.24GHz, 55.2GHz, 55.68GHz and 56.16GHz. the

In the above scheme, the following IQ quadrature signals 6.66GHz, 6.72GHz, 6.78GHz, 6.9GHz, 6.96GHz and 7.02GHz are generated by dividing by 8 in the frequency division loop, which are used for the second level of the 60GHz transceiver vibration. the

In the above scheme, all integer frequency divisions between ²ⁿ and 2n ^+1-1 can be realized through n-level cascaded divided by 2 or divided by 3 frequency dividers. In this structure, n=6 can realize 64 to All integer dividers between 127, resulting in the divide-by-111/112/113/115/116/117 multimode divider.

(3) Beneficial effects

As can be seen from the foregoing technical scheme, the present invention has the following beneficial effects:

1. Utilize the present invention, because the sum of the two groups of local oscillator frequencies produced is the local oscillator signals of 6 frequency points in the 59 to 64GHz of China's spectrum planning, so a frequency synthesizer suitable for China's 60GHz spectrum planning has been designed Structure, so that the frequency synthesizer can be used for 8: 1 ratio of the double-conversion transceiver. the

2. Utilizing the present invention, since the commonly used 40MHz crystal oscillator is adopted and the phase-locked loop with integer frequency division structure is used, the cost and implementation difficulty of the frequency synthesizer are reduced. the

Description of drawings

FIG. 1 is a schematic structural diagram of an 8:1 structure 40MHz crystal oscillator frequency synthesizer for 60GHz wireless communication provided by the present invention. the

Detailed ways

In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in further detail below in conjunction with specific embodiments and with reference to the accompanying drawings. the

The 8:1 structure 40MHz crystal oscillator frequency synthesizer for 60GHz wireless communication provided by the present invention, the frequency synthesizer adopts a phase-locked loop structure based on integer frequency division, and the phase-locked loop structure based on integer frequency division adopts The crystal oscillator frequency is 40MHz, and the crystal oscillator frequency is divided by 8 to generate a 5MHz frequency as the reference frequency of the phase frequency detector PFD. The frequency division ratio is controlled by a multi-mode frequency divider divided by 64 to 127. The frequency division of the multi-mode frequency divider The ratio is determined by 2 ⁶ +2 ⁵ P ₅ +2 ⁴ P ₄ +2 ³ P ₃ +2 ² P ₂ +2P ₁ +P ₀ , by changing the high and low levels of P ₀ to P ₅ , it can be realized between 64 and 127 All integer frequency divisions, where P ₀ to P ₅ are the control levels of cell1 to cell6 respectively, when the control level is high, it is 1, and when the control level is low, it is 0.

As shown in Figure 1, Figure 1 is a structural schematic diagram of an 8:1 structure 40MHz crystal frequency synthesizer for 60GHz wireless communication provided by the present invention, the frequency synthesizer adopts a phase-locked loop structure based on integer frequency division. The phase-locked loop structure of the frequency division includes the phase-frequency detector PFD, the charge pump CP, the low-pass filter LPF, the voltage-controlled oscillator VCO, the frequency divider by 8, the frequency divider by 4, and the 3 frequency divider and 111/112/113/115/116/117 multi-mode frequency divider, and a 40MHz crystal oscillator divider 8 frequency divider connected to the frequency discrimination phase detector PFD, wherein the division 111/112/113 /115/116/117 multi-mode frequency divider is composed of 6-level cascaded divide-by-2 or divide-by-3 structures. The division ratio of the divided 111/112/113/115/116/117 multimode frequency divider consists of 2 ⁶ +2 ⁵ P ₅ +2 ⁴ P ₄ +2 ³ P ₃ +2 ² P ₂ +2P ₁ + P ₀ determines that all integer frequency divisions between 64 and 127 can be realized by changing the high and low levels of P ₀ to P ₅ . The following frequency points are respectively realized by the following frequency division ratios:

53.28GHz＝8×4×3×111×5M P ₅ ＝1 P ₄ ＝0 P ₃ ＝1 P ₂ ＝1 P ₁ ＝1 P ₀ ＝1

53.76GHz＝8×4×3×112×5M P ₅ ＝1 P ₄ ＝1 P ₃ ＝0 P ₂ ＝0 P ₁ ＝0 P ₀ ＝0

54.24GHz＝8×4×3×113×5M P ₅ ＝1 P ₄ ＝1 P ₃ ＝0 P ₂ ＝0 P ₁ ＝0 P ₀ ＝1

55.2GHz＝8×4×3×115×5M P ₅ ＝1 P ₄ ＝1 P ₃ ＝0 P ₂ ＝0 P ₁ ＝1 P ₀ ＝1

55.68GHz＝8×4×3×116×5M P ₅ ＝1 P ₄ ＝1 P ₃ ＝0 P ₂ ＝1 P ₁ ＝0 P ₀ ＝0

56.16GHz＝8×4×3×117×5M P ₅ ＝1 P ₄ ＝1 P ₃ ＝0 P ₂ ＝1 P ₁ ＝0 P ₀ ＝1

It can be seen that by changing the frequency division ratio of the multi-mode frequency divider, six local oscillator frequencies of 60 GHz can be generated: 53.28 GHz, 53.76 GHz, 54.24 GHz, 55.2 GHz, 55.68 GHz and 56.16 GHz. the

In the loop, the following auxiliary frequencies can be generated by dividing by 8 frequency dividers: 6.66GHz, 6.72GHz, 6.78GHz, 6.9GHz, 6.96GH and 7.02GHz The second-stage local oscillator of the 60GHz transceiver for secondary frequency conversion . the

The specific embodiments described above have further described the purpose, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above descriptions are only specific embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included within the protection scope of the present invention. the

Claims (7)

1. 8: 1 structure 40MHz crystal oscillator frequency synthesizers that are used for the 60GHz radio communication; It is characterized in that; This frequency synthesizer adopts the phase-locked loop structures based on integral frequency divisioil; What should adopt based on the phase-locked loop structures of integral frequency divisioil is the reference frequency of the crystal oscillator frequency of 40MHz as phase frequency detector PFD, and frequency dividing ratio is removed 64 to 127 multi-modulus frequency dividers through one and controlled, and the frequency dividing ratio of multi-modulus frequency divider is by 2 ⁶+ 2 ⁵P ₅+ 2 ⁴P ₄+ 2 ³P ₃+ 2 ²P ₂+ 2P ₁+ P ₀Decision is through changing P ₀To P ₅High-low level can realize all integral frequency divisioils between 64 to 127, wherein P ₀To P ₅Be respectively the control level of cell1 to cell6, control level is 1 when being high, and control level is to be 0 for hanging down.

2. 8: 1 structure 40MHz crystal oscillator frequency synthesizers that are used for the 60GHz radio communication according to claim 1; It is characterized in that; Said phase-locked loop structures based on integral frequency divisioil comprises the phase frequency detector PFD that is in turn connected into loop, charge pump CP, low pass filter LPF, voltage controlled oscillator VCO, removes 8 frequency dividers, removes 4 frequency dividers, removes 3 frequency dividers and remove 111/112/113/115/116/117 multi-modulus frequency divider, and the 40MHz crystal oscillator that is connected in phase frequency detector PFD removes 8 frequency dividers.

3. 8: 1 structure 40MHz crystal oscillator frequency synthesizers that are used for the 60GHz radio communication according to claim 2; It is characterized in that; Said remove 111/112/113/115/116/117 multi-modulus frequency divider by 6 grades of cascades remove 2 or remove 3 multi-modulus frequency divider structure cascades and form, through changing P ₀To P ₅High-low level produce all integral frequency divisioils between 64 to 127.

4. 8: 1 structure 40MHz crystal oscillator frequency synthesizers that are used for the 60GHz radio communication according to claim 3 is characterized in that, and are said through changing P ₀To P ₅High-low level produce all integral frequency divisioils between 64 to 127; Be through changing the said frequency dividing ratio of removing 111/112/113/115/116/117 multi-modulus frequency divider, being used for the local oscillation signal of 60GHz below the generation: 53.28GHz, 53.76GHz, 54.24GHz, 55.2GHz, 55.68GHz and 56.16GHz.

5. 8: 1 structure 40MHz crystal oscillator frequency synthesizers that are used for the 60GHz radio communication according to claim 4; It is characterized in that; When changing the said frequency dividing ratio of removing 111/112/113/115/116/117 multi-modulus frequency divider; Since the constant 60GHz local oscillation signal that causes VCO output different frequency of input reference frequency, the local oscillation signal of the following frequency of realization in this multi-modulus frequency divider: 53.28GHz, 53.76GHz, 54.24GHz, 55.2GHz, 55.68GHz and 56.16GHz.

6. 8: 1 structure 40MHz crystal oscillator frequency synthesizers that are used for the 60GHz radio communication according to claim 4; It is characterized in that; In the frequency division loop, produce following IQ orthogonal signalling 6.66GHz, 6.72GHz, 6.78GHz, 6.9GHz, 6.96GHz and 7.02GHz, be used for the second level local oscillator of 60GHz transceiver through removing 8 frequency dividers.

7. 8: 1 structure 40MHz crystal oscillator frequency synthesizers that are used for the 60GHz radio communication according to claim 1 is characterized in that, remove 2 or remove 3 fraction frequency devices and can realize 2 through n level cascade ⁿTo 2 ^N+1All integral frequency divisioils between-1, in this structure, get n=6 then realize 64 to 127 between all integral frequency divisioils, thereby produce said 111/112/113/115/116/117 multi-modulus frequency divider that removes.

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