CN102594745B - Synchronization method for single carrier frequency domain equalization system and realization circuit thereof - Google Patents
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Abstract
本发明公开了单载波频域均衡系统中的一种同步方法,包括一种基于训练字的复用技术和一种位同步方法。该方法在帧头添加了三个训练字,用于完成多种同步和信道估计算法,从而减小了帧头的负担,提高了数据的有效传输率;本发明提出了一种位同步算法,将算法分为初始同步和精确同步,在确定初始同步范围之后,在此范围内再用精确同步算法找到精确的同步位置,与传统位同步算法相比,该算法在初始同步范围之外的其他位置不会出现其他峰值,具有更精确的位同步位置判断能力,同时也具有更高的工作效率。
The invention discloses a synchronization method in a single-carrier frequency domain equalization system, which includes a multiplexing technology based on training words and a bit synchronization method. The method adds three training words at the frame header, which are used to complete various synchronization and channel estimation algorithms, thereby reducing the burden of the frame header and improving the effective transmission rate of data; the present invention proposes a bit synchronization algorithm, The algorithm is divided into initial synchronization and precise synchronization. After the initial synchronization range is determined, the precise synchronization algorithm is used to find the precise synchronization position within this range. There will be no other peaks in the position, and it has a more accurate bit synchronization position judgment ability, and also has higher work efficiency.
Description
技术领域 technical field
本发明涉及无线通信领域,如无线传感器网络、宽带无线通信系统等,尤其涉及一种基于单载波频域均衡(Single Carrier System with Frequency Domain Equalization,SC-FDE)技术的同步方法。The present invention relates to the field of wireless communication, such as wireless sensor network, broadband wireless communication system, etc., and in particular to a synchronization method based on Single Carrier System with Frequency Domain Equalization (SC-FDE) technology.
背景技术 Background technique
无线通信在经历了从模拟通信到数字通信、从FDMA至CDMA的飞快发展,是技术更新最快、市场容量最大的产业。无线通信发展到今天,越来越多服务内容对数据传输速率提出了越来越高的要求,而频谱资源严重不足已经日益成为制约无线通信事业发展的瓶颈。虽然第二代移动通信可以比现有传输速率快上千倍,但是仍无法满足未来多媒体通信的要求。因此,如何充分开发利用有限的频谱资源,提高频谱利用率,成为当今无线通信技术研究的热点之一。在提高频潜利用率的同时,保证传输的可靠性也是一个重要的问题。未来的无线通信应用对应用环境有更高的要求,这就需要新的无线通信技术能够适应更加恶劣的信道,能够克服各种不利影响。Wireless communication has experienced rapid development from analog communication to digital communication, from FDMA to CDMA, and is an industry with the fastest technology update and the largest market capacity. With the development of wireless communication today, more and more services have put forward higher and higher requirements for data transmission rate, and the severe shortage of spectrum resources has increasingly become a bottleneck restricting the development of wireless communication. Although the second-generation mobile communication can be thousands of times faster than the existing transmission rate, it still cannot meet the requirements of future multimedia communication. Therefore, how to fully develop and utilize limited spectrum resources and improve spectrum utilization has become one of the hotspots in wireless communication technology research today. While improving the utilization rate of frequency potential, it is also an important issue to ensure the reliability of transmission. Future wireless communication applications have higher requirements on the application environment, which requires new wireless communication technologies to adapt to harsher channels and overcome various adverse effects.
无线通信技术被运用于多种不同的系统中,如无线传感器网络、宽带无线通信系统等。无线传感器网络(WSN)是一种全新的信息获取平台,能够实时监测和采集网络分布区域内的各种检测对象的信息,并将这些信息发送到网关节点,以实现复杂的指定范围内目标检测与跟踪,具有快速展开、抗毁性强等特点,有着广阔的应用前景。随着无线传感网络的发展,较高速率的数据传输变得非常有必要,尤其是突发数据包的传输,需要适应传感网灵活部署、低成本、小体积的应用需求。另外,宽带无线数字通信也是当前无线通信技术的发展前沿,在未来的语音、视频、数据及多媒体等综合业务方面有广阔的应用前景。Wireless communication technology is used in many different systems, such as wireless sensor network, broadband wireless communication system and so on. Wireless sensor network (WSN) is a brand-new information acquisition platform, which can monitor and collect information of various detection objects in the network distribution area in real time, and send the information to the gateway node to realize complex target detection within the specified range. It has the characteristics of rapid deployment and strong invulnerability, and has broad application prospects. With the development of wireless sensor networks, high-speed data transmission becomes very necessary, especially the transmission of burst data packets, which needs to meet the application requirements of flexible deployment of sensor networks, low cost, and small size. In addition, broadband wireless digital communication is also the development frontier of current wireless communication technology, and has broad application prospects in future comprehensive services such as voice, video, data and multimedia.
在单载波频域均衡的位同步方面具有代表意义的研究是2002年卡勒顿(Carleton)大学等研究机构的David Falconer、Sirikiat Lek Ariyavisitakul,Anader Benyamin-Seeyar等学者在IEEE Communications Magazine发表的″Frequency Domain Equalization forSingle-Carrier Broadband Wireless Systems″论文,文中提出了单载波频域均衡(SC-FDE)技术,该技术能够在无线传感器网络、宽带无线通信等系统中得到了灵活的运用,它具有较低的峰均比和相位噪声的敏感性,降低了功率放大器等模拟器件的功耗和成本;而且在存在时延扩散的传播条件下,SC-FDE系统能够获得与OFDM系统近似的性能;同时SC-FDE系统发射端结构简单,降低了发射端的功耗。因此,SC-FDE系统能够广泛的应用于无线通信系统中。其后相继出现一些文献对SC-FDE系统中的各项关键技术展开了深入地讨论。The representative research on the bit synchronization of single-carrier frequency domain equalization is "Frequency Domain Equalization for Single-Carrier Broadband Wireless Systems "paper, the paper proposes single-carrier frequency domain equalization (SC-FDE) technology, which can be flexibly used in wireless sensor networks, broadband wireless communication and other systems, and it has a low The peak-to-average ratio and sensitivity to phase noise reduce the power consumption and cost of analog devices such as power amplifiers; and under the propagation conditions of time delay spread, the SC-FDE system can obtain performance similar to that of the OFDM system; at the same time, the SC-FDE system -The structure of the transmitting end of the FDE system is simple, which reduces the power consumption of the transmitting end. Therefore, the SC-FDE system can be widely used in wireless communication systems. Afterwards, some literatures appeared one after another, discussing each key technology in SC-FDE system deeply.
在SC-FDE系统中,同步是极为关键的一步。SC-FDE系统对同步误差(尤其是位同步误差)非常敏感。对于采样时钟的相位偏差,经FFT变换到频域以后,相当于每个码元的相位旋转,是乘性的干扰,可以通过频域均衡纠正过来;采样时钟的频率偏差,变换到频域上相当于引入了载波间干扰,无法通过频域均衡补偿,而且,IFFT变换回时域后的信号同样存在位同步误差,对于判决存在很大的干扰。此外,采样时钟的频率偏移(频偏)还会造成信号的定时漂移,影响同步的性能。因此,SC-FDE系统的同步模块,尤其是其中的位同步模块,是整个系统设计的关键技术之一。In SC-FDE system, synchronization is an extremely critical step. SC-FDE systems are very sensitive to synchronization errors (especially bit synchronization errors). For the phase deviation of the sampling clock, after being transformed into the frequency domain by FFT, it is equivalent to the phase rotation of each symbol, which is multiplicative interference, which can be corrected by frequency domain equalization; the frequency deviation of the sampling clock is transformed into the frequency domain It is equivalent to the introduction of inter-carrier interference, which cannot be compensated by frequency domain equalization. Moreover, the signal after IFFT transformation back to the time domain also has bit synchronization errors, which greatly interferes with the decision. In addition, the frequency offset (frequency offset) of the sampling clock will also cause timing drift of the signal, which will affect the synchronization performance. Therefore, the synchronization module of the SC-FDE system, especially the bit synchronization module, is one of the key technologies of the whole system design.
发明内容 Contents of the invention
为了解决现有技术中存在的上述问题,本发明提出一种新的基于单载波频域均衡技术的位同步方法,具体技术方案如下:In order to solve the above-mentioned problems existing in the prior art, the present invention proposes a new bit synchronization method based on single-carrier frequency domain equalization technology, and the specific technical scheme is as follows:
采用一种基于训练字的复用技术,用三组训练序列实现了单载波频域均衡(SC-FDE)系统中的同步,具体来说,是把SC-FDE系统中的帧结构的前导分成3个训练序列TS1、TS2和TS3;Using a multiplexing technology based on training words, three sets of training sequences are used to realize the synchronization in the single carrier frequency domain equalization (SC-FDE) system. Specifically, the preamble of the frame structure in the SC-FDE system is divided into 3 training sequences TS1, TS2 and TS3;
在同步和信道估计的算法中,有基于非数据辅助的算法与基于数据辅助的算法等方式,基于非数据辅助的算法一般收敛速度较慢,且算法实现较为复杂,因此本文采用基于数据辅助的算法,其收敛速度较快,适用于较高速率的数据传输。在基于数据辅助的算法中,一般通过在帧头位置插入训练序列的方式来进行。每个训练序列由不同的训练字组成,是发送端和接收端所共知的序列。每个训练字由独特字(Unique Word,UW)构成,要求在时域呈现随机性,而在频域有平坦的幅度响应,UW由恒包络零自相关(Constant Amplitude and ZeroAutoCorrelation,CAZAC)序列来实现。由此组成的训练序列受噪声及频偏影响较小,对于同步和信道估计算法非常适用。In the algorithm of synchronization and channel estimation, there are non-data-assisted algorithm and data-assisted algorithm. The non-data-assisted algorithm generally converges slowly, and the algorithm implementation is more complicated. Therefore, this paper adopts the data-assisted algorithm. Algorithm, its convergence speed is faster, suitable for higher rate data transmission. In the data-assisted algorithm, it is generally performed by inserting a training sequence at the frame header position. Each training sequence is composed of different training words, which is a sequence known by both the sending end and the receiving end. Each training word is composed of a unique word (Unique Word, UW), which requires randomness in the time domain and a flat amplitude response in the frequency domain. UW consists of a constant envelope zero autocorrelation (Constant Amplitude and ZeroAutoCorrelation, CAZAC) sequence to fulfill. The training sequence thus formed is less affected by noise and frequency offset, and is very suitable for synchronization and channel estimation algorithms.
第一个训练序列TS1是由一系列重复的短训练字组成,用于帧到达检测、粗采样同步、粗频偏估计。The first training sequence TS1 is composed of a series of repeated short training words, which are used for frame arrival detection, coarse sampling synchronization, and coarse frequency offset estimation.
第二个训练序列TS2可拆分为4部分,每部分长度为数据块长度N的1/4。该部分用于位同步。The second training sequence TS2 can be divided into 4 parts, and the length of each part is 1/4 of the length N of the data block. This section is used for bit synchronization.
第三个训练序列TS3由两个相同的训练字组成,用于细频偏估计、信道估计。The third training sequence TS3 consists of two identical training words and is used for fine frequency offset estimation and channel estimation.
在接收端同步的过程中,首先利用所述TS1进行粗采样同步,初步确定采样点,接着利用内插环路进行采样时钟调整,至此,已经纠正了采样偏差;然后通过基于窗口能量的算法进行帧到达检测,当检测到有效数据到来后,利用TS2进行位同步,利用TS3进行载波频偏估计(本处“载波”和前述以及后面的“频偏”,最好从术语角度进行统一成“载波频偏”或者其它)。In the process of synchronization at the receiving end, first use the TS1 to perform rough sampling synchronization, initially determine the sampling point, and then use the interpolation loop to adjust the sampling clock. So far, the sampling deviation has been corrected; and then through the algorithm based on window energy. Frame arrival detection, when the arrival of valid data is detected, use TS2 to perform bit synchronization, and use TS3 to perform carrier frequency offset estimation (the "carrier" here and the aforementioned and subsequent "frequency offset" are best unified into "frequency offset" from the perspective of terminology carrier frequency offset" or others).
在利用TS2进行位同步的过程中,采用基于训练序列的位同步算法:TS2采用的训练字结构为[A -A -A A],先用Schmidl & Cox的算法(是否也可以采用其它算法?),将前半个训练字和后半个训练字作相关运算,此时的滑动窗口大小为N/2,得出一个度量平台M0。In the process of bit synchronization using TS2, the bit synchronization algorithm based on the training sequence is adopted: the training word structure adopted by TS2 is [A -A -A A], and the algorithm of Schmidl & Cox is used first (can other algorithms be used?) , the first half of the training word and the second half of the training word are correlated, and the size of the sliding window at this time is N/2, and a measurement platform M 0 is obtained.
因为循环前缀的存在,导致了M0有一段平坦的平台,在此平台上判断M0是否大于某个固定值,当M0>M固定值时,继续采用如下算法找到位同步峰值。推荐的固定值可以设定为0.5,其值用于硬件实现时较为方便。Due to the existence of the cyclic prefix, M 0 has a flat platform. On this platform, judge whether M 0 is greater than a fixed value. When M 0 >M fixed value , continue to use the following algorithm to find the bit synchronization peak. The recommended fixed value can be set to 0.5, which is more convenient for hardware implementation.
然后用改进的Minn算法,对N/4长度的4个训练字进行互相关运算得出度量平台:Then use the improved Minn algorithm to perform cross-correlation calculations on the 4 training words of N/4 length to obtain the measurement platform:
本发明中,这样的帧结构简洁精练,适合应用于单载波频域均衡系统,并且各训练字能够实现不同的功能,另外,同一个训练字能够重复利用到不同的算法中,复用的技术能够减轻帧头的负担,提高数据传输率。In the present invention, such a frame structure is concise and concise, suitable for single-carrier frequency domain equalization system, and each training word can realize different functions, in addition, the same training word can be reused in different algorithms, multiplexing technology It can reduce the burden of the frame header and improve the data transmission rate.
位同步算法具有特定的一个尖峰值,且在峰值以外的其他地方,不会再存在其他峰。因此有利于进行位同步的准确判断。另外,在位同步的过程中,采用初步同步和准确同步两个步骤,能够有效的加速位同步的进行。The bit synchronization algorithm has a specific one peak value, and there are no other peaks anywhere other than the peak value. Therefore, it is beneficial to accurately judge the bit synchronization. In addition, in the process of bit synchronization, two steps of preliminary synchronization and accurate synchronization can be adopted, which can effectively accelerate the progress of bit synchronization.
附图说明 Description of drawings
图1为单载波频域均衡(SC-FDE)系统框图。Figure 1 is a block diagram of a single carrier frequency domain equalization (SC-FDE) system.
图2为本发明实施例的单载波频域均衡系统的帧结构。FIG. 2 is a frame structure of a single-carrier frequency domain equalization system according to an embodiment of the present invention.
图3为本发明实施例的帧结构中第一个训练序列的结构。Fig. 3 is the structure of the first training sequence in the frame structure of the embodiment of the present invention.
图4为本发明实施例的帧结构中第二个训练序列的结构。Fig. 4 is the structure of the second training sequence in the frame structure of the embodiment of the present invention.
图5为本发明实施例的帧结构中第三个训练序列的结构。Fig. 5 is the structure of the third training sequence in the frame structure of the embodiment of the present invention.
图6为本发明实施例的同步系统框图及其位同步模块电路实现框图。FIG. 6 is a block diagram of a synchronization system and a circuit realization block diagram of a bit synchronization module according to an embodiment of the present invention.
图7为本发明实施例的位同步的仿真图。FIG. 7 is a simulation diagram of bit synchronization according to an embodiment of the present invention.
图8是数据缓冲模块的结构示意图。Fig. 8 is a schematic structural diagram of a data buffer module.
具体实施方案 specific implementation plan
单载波频域均衡(SC-FDE)系统中的同步方法,把单载波频域均衡系统中的帧结构的前导分成3个训练序列TS1、TS2和TS3;A synchronization method in a single carrier frequency domain equalization (SC-FDE) system, which divides the preamble of the frame structure in the single carrier frequency domain equalization system into three training sequences TS1, TS2 and TS3;
每个训练序列由不同的训练字组成,是发送端和接收端所共知的序列,它受噪声及频率偏移即频偏影响较小,适用于同步和信道估计算法;Each training sequence is composed of different training words, which is a sequence known by both the sending end and the receiving end. It is less affected by noise and frequency offset, that is, frequency offset, and is suitable for synchronization and channel estimation algorithms;
第一个训练序列TS1是由一系列重复的短训练字UW组成,用于帧到达检测、粗采样同步和粗载波频偏估计;第二个训练序列TS2用于位同步;第三个训练序列TS3由两个相同的训练字组成,用于细载波频偏估计;The first training sequence TS1 is composed of a series of repeated short training words UW, which is used for frame arrival detection, coarse sampling synchronization and coarse carrier frequency offset estimation; the second training sequence TS2 is used for bit synchronization; the third training sequence TS3 consists of two identical training words for fine carrier frequency offset estimation;
在SC-FDE系统的接收端同步的过程中,采用三个步骤来实现:1)首先利用TS1进行粗采样同步,初步确定采样点;接着利用内插环路进行采样时钟调整;随后进行帧到达检测;2)当检测到有效数据到来后,利用TS2进行位同步;3)然后利用TS1进行粗载波频偏估计、利用TS3进行细载波频偏估计。In the synchronization process of the receiving end of the SC-FDE system, three steps are used to realize: 1) First, use TS1 to perform rough sampling synchronization, and initially determine the sampling point; then use the interpolation loop to adjust the sampling clock; and then perform frame arrival Detection; 2) When valid data is detected, use TS2 to perform bit synchronization; 3) Then use TS1 to perform coarse carrier frequency offset estimation, and use TS3 to perform fine carrier frequency offset estimation.
步骤1)中,TS1进行粗采样同步:运用重复的短训练字的互相关特性产生几个峰值,并比较各峰值的大小找出最大的峰值所在位置,最大峰值处自相关特性最强,即为初步确定的采样同步点;TS1进行帧到达检测:采用基于窗口能量的算法。In step 1), TS1 performs coarse sampling synchronization: use the cross-correlation characteristics of repeated short training words to generate several peaks, and compare the size of each peak to find the position of the largest peak, where the autocorrelation property is the strongest, that is It is the initially determined sampling synchronization point; TS1 performs frame arrival detection: an algorithm based on window energy is used.
步骤2)中,所述第二个训练序TS2列拆分为4部分,每部分训练字长度为SC-FDE系统中的帧结构的数据块长度N的1/4,拆分得到TS2的训练字结构为[A -A -A A]。In step 2), the second training sequence TS2 column is split into 4 parts, and the length of each part of the training word is 1/4 of the data block length N of the frame structure in the SC-FDE system, and the training of TS2 is obtained by splitting The word structure is [A -A -A A].
步骤2)中,利用TS2进行位同步的过程采用基于训练序列的位同步算法,步骤如下:In step 2), the process of bit synchronization using TS2 adopts a bit synchronization algorithm based on the training sequence, and the steps are as follows:
a)用Sehmidl & Cox的算法,将TS2分为前后两部分,分别为[A -A]和[-A A];设训练序列的长度为N,则前后两部分中每个部分的长度为N/2;将两个部分的训练字作相关运算;a) Using Sehmidl & Cox's algorithm, divide TS2 into two parts, namely [A -A] and [-A A]; if the length of the training sequence is N, then the length of each part in the two parts is N/2; the two parts of the training word for correlation calculation;
两部分的相关值为:The correlation values for the two parts are:
TS2第二部分训练字[-A A]的能量为:The energy of the second part of TS2 training word [-A A] is:
此时的滑动窗口大小为N/2,得出一个度量平台M0:At this time, the size of the sliding window is N/2, and a measurement platform M 0 is obtained:
b)用步骤a)所得的度量平台M0得出需要进一步搜索的范围:b) Use the measurement platform M 0 obtained in step a) to obtain the range that needs to be further searched:
因为循环前缀的存在,导致了M0有一段平坦的平台,在此平台上判断M0是否大于某个固定值M固定值,当M0>M固定值时,继续采用下述步骤2.3)找到位同步峰值;Because of the existence of the cyclic prefix, M 0 has a flat platform. On this platform, it is judged whether M 0 is greater than a certain fixed value M fixed value . When M 0 >M fixed value , continue to use the following steps 2.3) to find bit sync peak;
c)用改进的Minn算法,对N/4长度的4个训练字A、-A、-A和A进行互相关运算,并考虑到滤除边沿仍有峰值的影响,采用的互相关算法如下:c) Use the improved Minn algorithm to perform cross-correlation operations on the 4 training words A, -A, -A and A of N/4 length, and consider the influence of the peak value after filtering out the edge, the cross-correlation algorithm used is as follows :
由此得出:from that we get:
P(d)=P1(d)+P2(d)-P3(d)-P4(d)P(d)=P 1 (d)+P 2 (d)-P 3 (d)-P 4 (d)
最后,得出度量平台:Finally, the metrics platform is derived:
为了硬件实现简单起见,所述固定值M固定值为0.5。For simplicity of hardware implementation, the fixed value M is fixed at 0.5.
步骤3)中,TS3由两个相同的长训练字组成,总长度设为N,则每个长训练字长度为N/2,用来进行细载波频偏估计;在载波频偏估计的整个过程中,用TS1的最后2个短训练字用作粗载波频偏估计,用TS3训练序列来做细载波频偏估计。Step 3) in, TS3 is made up of two identical long training words, and total length is set as N, then the length of each long training word is N/2, is used for fine carrier frequency offset estimation; In the whole carrier frequency offset estimation In the process, the last two short training words of TS1 are used for coarse carrier frequency offset estimation, and the TS3 training sequence is used for fine carrier frequency offset estimation.
具体到本例中,下面结合附图对本发明做进一步说明。Specifically in this example, the present invention will be further described below in conjunction with the accompanying drawings.
图1为单载波频域均衡(SC-FDE)系统框图。SC-FDE的单载波传输模式不同于传统的其它单载波传输,它发送的是调制后的高速率单载波信号,接收端通过FFT和IFFT变换来实现频域均衡,实际上是对接收信号的频域分析。该技术是基于OFDM的启发,采用频域均衡的方式大大降低了时域均衡的复杂度,提高了系统性能。本发明技术方案就是用于该系统的同步部分。Figure 1 is a block diagram of a single carrier frequency domain equalization (SC-FDE) system. SC-FDE's single-carrier transmission mode is different from other traditional single-carrier transmissions. It sends modulated high-speed single-carrier signals. The receiving end uses FFT and IFFT transformations to achieve frequency domain equalization, which is actually for the received signals. Frequency domain analysis. This technology is based on the inspiration of OFDM, and adopts frequency domain equalization to greatly reduce the complexity of time domain equalization and improve system performance. The technical proposal of the present invention is used for the synchronization part of the system.
本例的单载波频域均衡系统帧结构如图2所示,它包括前导和数据块。前导分成3个训练序列:The frame structure of the single-carrier frequency domain equalization system in this example is shown in Figure 2, which includes a preamble and a data block. The preamble is divided into 3 training sequences:
第一个训练序列TS1是由一系列重复的短训练字UW组成,如图3所示。The first training sequence TS1 is composed of a series of repeated short training words UW, as shown in FIG. 3 .
第二个训练序列TS2可拆分为4部分,每部分长度为数据块长度N的1/4。该部分用于位同步,如图4所示。The second training sequence TS2 can be divided into 4 parts, and the length of each part is 1/4 of the length N of the data block. This part is used for bit synchronization, as shown in Figure 4.
第三个训练序列TS3由两个相同的训练字组成,如图5所示。The third training sequence TS3 consists of two identical training words, as shown in Figure 5.
所有训练序列TS1、TS2和TS3采用前述CAZAC序列,该序列具有平稳的幅度响应,并且只在零点自相关,因此具有很好的自相关特性,非常适合于同步和信道估计。All training sequences TS1, TS2 and TS3 use the aforementioned CAZAC sequence, which has a stable amplitude response and is only autocorrelated at zero point, so it has good autocorrelation characteristics and is very suitable for synchronization and channel estimation.
本发明中包括一种基于训练字的复用技术和一种位同步算法,下面分别进行阐述。The present invention includes a multiplexing technology based on training words and a bit synchronization algorithm, which will be described respectively below.
1.本发明提出了一种基于训练字的复用技术,用三个训练字实现了同步,具体内容如下:1. The present invention proposes a kind of multiplexing technique based on training words, realizes synchronization with three training words, and specific content is as follows:
在接收端同步的过程中,首先利用第一个训练序列(TS1)进行粗采样同步,初步确定采样同步点,接着利用内插环路进行采样时钟调整,至此,采样偏差已经纠正了。然后通过基于窗口能量的算法进行帧到达检测,当检测到有效数据到来后,利用第二个训练序列(TS2)进行位同步,然后利用TS1进行粗载波频偏估计、利用TS3进行细载波频偏估计,同步模块的电路结构图如图6所示。In the synchronization process of the receiving end, first use the first training sequence (TS1) for rough sampling synchronization, initially determine the sampling synchronization point, and then use the interpolation loop to adjust the sampling clock. So far, the sampling deviation has been corrected. Then, frame arrival detection is performed through an algorithm based on window energy. When the arrival of valid data is detected, the second training sequence (TS2) is used for bit synchronization, and then TS1 is used for coarse carrier frequency offset estimation, and TS3 is used for fine carrier frequency offset. It is estimated that the circuit structure diagram of the synchronization module is shown in Figure 6.
在此过程中,TS1首先用于粗采样同步。由于采样时钟调整模块需要一定的稳定时间,为了减短这一延时,我们先用粗采样同步模块来初步确定采样的位置。在粗采样时钟调整的过程中,运用前导序列的相关特性产生几个峰值,并比较各峰值的大小找出最大的峰值所在位置,即为初步确定的采样同步点。整个采样同步算法中,采用粗采样同步先确定基本的范围,再用环路精确跟踪,这样的方法可以更加迅速的纠正采样偏差。In this process, TS1 is first used for coarse sampling synchronization. Because the sampling clock adjustment module needs a certain stabilization time, in order to shorten this delay, we use the coarse sampling synchronization module to preliminarily determine the sampling position. In the process of rough sampling clock adjustment, use the correlation characteristics of the preamble sequence to generate several peaks, and compare the size of each peak to find the position of the largest peak, which is the initially determined sampling synchronization point. In the whole sampling synchronization algorithm, rough sampling synchronization is used to first determine the basic range, and then use the loop to track accurately. This method can correct sampling deviation more quickly.
接着,TS1又用于帧到达检测,内容为大家所熟知的基于窗口能量的算法,可以很好的得出帧到达时刻。Then, TS1 is used for frame arrival detection. The content is a well-known algorithm based on window energy, which can well obtain the frame arrival time.
最后,TS1的最后2个短训练字用作粗频偏估计。在频偏估计的过程中,为了保证频偏的范围和精度,分别用较短的训练字来做粗频偏估计,以保证检测的频偏范围,而用较长的训练序列来做细频偏估计,以保证其精度。由于短训练字较短,频偏估计范围较大,刚好适合用于粗频偏的检测。Finally, the last 2 short training words of TS1 are used as coarse frequency offset estimation. In the process of frequency offset estimation, in order to ensure the range and accuracy of frequency offset, shorter training words are used for coarse frequency offset estimation to ensure the detection range of frequency offset, while longer training sequences are used for fine frequency offset estimation. partial estimate to ensure its accuracy. Since the short training word is short, the frequency offset estimation range is large, which is just suitable for the detection of coarse frequency offset.
TS2用作位同步。在本发明提出的位同步算法中,用到了Schmidl & Cox算法以及改进的Minn算法,这两种算法对于训练字的结构要求是不同的。而在本发明中,为了节约帧头的附加信息,采用了同一个训练字结构,用复用的方式来达到算法的要求。具体算法的实现方式见第2项发明内容。TS2 is used for bit synchronization. In the bit synchronization algorithm that the present invention proposes, used Schmidl & Cox algorithm and improved Minn algorithm, these two kinds of algorithms are different for the structure requirement of training word. However, in the present invention, in order to save the additional information of the frame header, the same training word structure is adopted, and the requirements of the algorithm are met in a multiplexing manner. For the implementation of the specific algorithm, see the second content of the invention.
TS3用于细频偏估计。该训练序列为长训练序列,目的就是细频偏估计的实现。另外在后面的信道估计的过程中,也用到该训练序列来进行估计,从而减小了帧头的负担,提高的数据的有效传输率。TS3 is used for fine frequency offset estimation. The training sequence is a long training sequence, and its purpose is to realize fine frequency offset estimation. In addition, in the subsequent channel estimation process, the training sequence is also used for estimation, thereby reducing the burden of the frame header and improving the effective transmission rate of data.
2.本发明提出了一种基于训练序列的位同步算法,具体内容如下:2. The present invention proposes a kind of bit synchronization algorithm based on training sequence, and specific content is as follows:
该序列采用的训练字结构为训练字结构[A -A -A A],如图4所示。The training word structure used in this sequence is the training word structure [A -A -A A], as shown in Figure 4.
步骤一:用Schmidl & Cox的算法,将训练字TS2分为前后两部分,两个部分分别为[A-A]和[-A A]。设训练序列的长度为N,则每个部分的长度为N/2。将两个部分的训练字作相关运算。Step 1: Use the algorithm of Schmidl & Cox to divide the training word TS2 into two parts, the two parts are [A-A] and [-A A]. Assuming that the length of the training sequence is N, the length of each part is N/2. The training words of the two parts are correlated.
观察前后两个部分,发现第二部分的训练字相当于第一部分的负值,也就是说,在对两部分做互相关的过程中,依旧能够有尖锐的相关性,其不同点仅在于P0(d)的值为负值。而这在后面求度量平台M0时是没有影响的。Observing the two parts before and after, it is found that the training words in the second part are equivalent to the negative value of the first part, that is to say, in the process of cross-correlating the two parts, there can still be a sharp correlation, the only difference is that P The value of 0 (d) is negative. And this has no effect when calculating the measurement platform M 0 later.
两部分的相关值为:The correlation values for the two parts are:
其中,L=N/2Among them, L=N/2
第二部分训练字的能量为:The energy of the second part of the training word is:
此时的滑动窗口大小为N/2,得出一个度量平台M0:At this time, the size of the sliding window is N/2, and a measurement platform M 0 is obtained:
步骤二:用步骤一所得的度量平台得出需要进一步搜索的范围。Step 2: Use the measurement platform obtained in Step 1 to obtain the scope that needs to be further searched.
因为循环前缀的存在,导致了M0有一段平坦的平台,在此平台上判断M0是否大于某个固定值,当M0>M固定值时,继续采用步骤三找到位同步峰值。Due to the existence of the cyclic prefix, M 0 has a flat platform. On this platform, it is judged whether M 0 is greater than a fixed value. When M 0 >M fixed value , continue to use step 3 to find the bit synchronization peak.
度量平台范围的确定与信噪比是相关的,因此该固定值的选取也与信噪比相关。推荐的固定值可以设定为0.5,其值用于硬件实现时较为方便。The determination of the measurement platform range is related to the signal-to-noise ratio, so the selection of the fixed value is also related to the signal-to-noise ratio. The recommended fixed value can be set to 0.5, which is more convenient for hardware implementation.
步骤三:用改进的Minn算法,对N/4长度的4个训练字进行互相关运算,并考虑到滤除边沿仍有峰值的影响,采用的互相关算法如下:Step 3: Use the improved Minn algorithm to perform cross-correlation calculations on the 4 training words of N/4 length, and considering the influence of the peak value after filtering out the edge, the cross-correlation algorithm used is as follows:
由此得出:from that we get:
P(d)=P1(d)+P2(d)-P3(d)-P4(d)P(d)=P 1 (d)+P 2 (d)-P 3 (d)-P 4 (d)
最后,得出度量平台:Finally, the metrics platform is derived:
图6为位同步算法的电路实现框图,图7为位同步算法的仿真图。由图可以看到,本发明的好处在于,位同步算法具有特定的一个尖峰值,且在峰值以外的其他地方,不会再存在其他峰。因此有利于进行位同步的准确判断。另外,在位同步的过程中,采用初步同步和准确同步两个步骤,能够有效的加速位同步的进行。Figure 6 is a block diagram of the circuit implementation of the bit synchronization algorithm, and Figure 7 is a simulation diagram of the bit synchronization algorithm. It can be seen from the figure that the advantage of the present invention is that the bit synchronization algorithm has a specific peak value, and there will be no other peaks in places other than the peak value. Therefore, it is beneficial to accurately judge the bit synchronization. In addition, in the process of bit synchronization, two steps of preliminary synchronization and accurate synchronization can be adopted, which can effectively accelerate the progress of bit synchronization.
本发明中Schmidl & Cox算法及改进Minn算法可采用现有技术实现。Schmidl & Cox algorithm and improved Minn algorithm can adopt prior art to realize among the present invention.
一种实现上述方法的电路,包括粗采样同步模块、帧到达检测模块、位同步模块和载波同步模块;外部数据依次经过所述粗采样同步模块、帧到达检测模块、位同步模块和载波同步模块得到同步后的数据;A circuit for realizing the above method, comprising a coarse sampling synchronization module, a frame arrival detection module, a bit synchronization module and a carrier synchronization module; external data sequentially passes through the coarse sampling synchronization module, frame arrival detection module, bit synchronization module and carrier synchronization module Get the synchronized data;
所述位同步模块包括数据缓冲模块、初始位同步模块、准确同步模块、位同步判定模块和控制模块;The bit synchronization module includes a data buffer module, an initial bit synchronization module, an accurate synchronization module, a bit synchronization determination module and a control module;
来自帧到达检测模块的输入数据经过数据缓冲模块,处理得到数据A、B、r0、r1、r2和r3;其中,A为原数据,B为A经过N/2延时之后的数据;r0为原数据,r1为r0经过N/4延时之后的数据,r2为r0经过N/2延时之后的数据,r3为r0经过3N/4延时之后的数据;The input data from the frame arrival detection module is processed by the data buffer module to obtain data A, B, r0, r1, r2 and r3; among them, A is the original data, B is the data of A after N/2 delay; r0 is Original data, r1 is the data of r0 after N/4 delay, r2 is the data of r0 after N/2 delay, r3 is the data of r0 after 3N/4 delay;
A、B传入初始同步模块,处理得到M0;A and B are sent to the initial synchronization module, and M0 is obtained after processing;
r0、r1、r2和r3传入准确同步模块,处理得到M;r0, r1, r2 and r3 are passed to the accurate synchronization module, and M is processed;
M0和M传入位同步判定模块,处理得到同步位置到达信号,该信号传入控制模块,处理得到输出数据使能信号;M0 and M are transmitted to the bit synchronization determination module, and the synchronization position arrival signal is obtained through processing, and the signal is transmitted to the control module, and the output data enable signal is obtained through processing;
输出数据使能信号控制数据缓冲模块,由数据缓冲模块输出数据给载波同步模块。The output data enable signal controls the data buffer module, and the data buffer module outputs data to the carrier synchronization module.
所述数据缓冲模块由触发器构成,初始位同步模块、准确同步模块、位同步判定模块和控制模块均由本发明方法的对应的算法映射成通用的数字控制电路实现。The data buffer module is composed of flip-flops, and the initial bit synchronization module, accurate synchronization module, bit synchronization determination module and control module are all implemented by mapping the corresponding algorithm of the method of the present invention into a general digital control circuit.
对于数据缓冲模块:For the data buffer module:
此模块需要产生经过不同的延时之后的数据信息A、B、r0、r1、r2、r3,以供后续模块使用。其中,A为原数据,B为A经过N/2延时之后的数据;r0为原数据,r1为r0经过N/4延时之后的数据,r2为r0经过N/2延时之后的数据,r3为r0经过3N/4延时之后的数据。This module needs to generate data information A, B, r0, r1, r2, r3 after different delays for use by subsequent modules. Among them, A is the original data, B is the data after A has been delayed by N/2; r0 is the original data, r1 is the data after r0 has been delayed by N/4, and r2 is the data after r0 has been delayed by N/2 , r3 is the data of r0 after 3N/4 delay.
由于A与r0为同一数据(原数据),r2与B也为同一数据(N/2延时之后的数据),故数据缓冲模块的电路结构图可以是如图8所示电路。图中,D触发器在本电路中用作延迟单元;BitEnable是位使能信号。Since A and r0 are the same data (original data), and r2 and B are also the same data (data after N/2 delay), the circuit structure diagram of the data buffer module can be as shown in FIG. 8 . In the figure, the D flip-flop is used as a delay unit in this circuit; BitEnable is a bit enable signal.
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