CN102565850A - Wireless telemetry seismic signal acquisition system - Google Patents

Abstract

The wireless telemetry seismic signal acquisition system of the present invention solves the problems of large volume, high power consumption, poor anti-interference and small amount of transmitted data in the existing system. It includes a control host, a synchronization device and multiple distributed branch acquisition stations. The control host accepts the synchronization start command of the synchronization device, and after receiving the start command, it sends configuration commands and configuration parameters to each branch acquisition station in a loop, receives and processes For the seismic data sent by the branch acquisition station, the synchronization device sends a synchronous start command to the control host and the branch acquisition station. Seismic data, branch acquisition stations, synchronization devices and control hosts have integrated power supplies inside.

Description

Wireless Telemetry Seismic Signal Acquisition System

Technical field:

The invention relates to the field of engineering seismic data acquisition, in particular to a wireless telemetry, portable, low power consumption, and high-performance seismic data acquisition system.

Background technique:

As the main equipment for seismic exploration, the seismic signal acquisition system, that is, the engineering seismograph, is the core of the field acquisition of seismic data and the key to obtaining original seismic data with high signal-to-noise ratio, high resolution, and high fidelity. For half a century, with the rapid development of electronic technology, computer technology, communication technology and seismic exploration technology, seismic exploration instruments have also been continuously developed and improved, especially in order to adapt to 3D seismic exploration, high-resolution seismic exploration, multi-wave seismic New methods such as exploration, ultra-multi-channel ultra-high-order coverage and the needs of the newly developed sequence seismology have developed a new generation of distributed telemetry engineering seismographs based on digital communication, remote control telemetry, and computer control processing. Because there is no large cable between the data acquisition circuit and the geophone circuit, the branch acquisition station at the geophone point converts the analog signal output by the geophone into a digital signal and then transmits it to the central control recording system, while the digital signal transmission Strong anti-interference ability, avoiding crosstalk between channels, sky power interference, power frequency interference, etc. inherent in large lines when transmitting analog signals; at the same time, the telemetry engineering seismograph has high construction efficiency, high sampling rate, and convenient addition of system function, data preprocessing, compression of data volume, high degree of automation, etc., coupled with the improvement of anti-aliasing performance of the new generation of distributed telemetry engineering seismographs, large recording capacity, increasingly powerful software processing capabilities, real-time Strong processing capability, noise editing and improvement of stacking algorithm make the telemetry engineering seismograph become the mainstream equipment that can be widely used in the current seismic exploration field.

Telemetry engineering seismographs are divided into wired and wireless according to actual conditions. At present, wired telemetry engineering seismographs have become mainstream equipment and are widely used, and have achieved very good results in various exploration fields and engineering geological evaluation fields. However, with the With the continuous improvement of seismic exploration technology, the increasingly severe seismic exploration environment, and the continuous expansion of the overall engineering volume and application fields of exploration, the current mainstream wired telemetry engineering seismometers cannot meet the exploration needs in some occasions: (1 ), because the wired telemetry engineering seismograph still uses the cable to transmit the converted digital signal to the control host, so that its single survey area is limited. (2) The mainstream telemetry engineering seismograph control host is still designed with a relatively traditional industrial computer or a dedicated acquisition vehicle, and its power consumption and volume greatly reduce the efficiency of seismic exploration. (3) The synchronization error of each branch acquisition station is large, and the precise positioning of the branch acquisition stations cannot be realized, which brings a lot of inconvenience to the later interpretation of seismic data. (4) Since the branch acquisition station completes signal acquisition through the corresponding interface with the control host, and the interface of the control host itself is limited, it also limits the expansion of the number of seismic acquisition channels. (5) In many mountainous and hilly areas with relatively large terrain fluctuations, the wired transmission method essentially limits the feasibility of the corresponding seismic exploration plan and greatly reduces work efficiency.

The wireless telemetry engineering seismograph has the advantages of high work efficiency, high data transmission reliability, strong logic update ability, high data quality control ability, and high degree of automation. It is the development trend of the future telemetry engineering seismograph. The amount of data transmitted by the wireless network and the ability to resist interference have always been two important factors restricting the development of wireless telemetry engineering seismographs. Coupled with the limitations of the size and weight of branch acquisition stations and control hosts, it has brought a lot of inconvenience to field data acquisition. . Based on the research status of wireless telemetry engineering seismographs at home and abroad, it is mainly to add a radio transceiver device to the control host and field branch collection stations, and the other parts are no different from the wired system. At present, the relatively mature products are Eagle-99 of Sercel Company in France and BOX of Fairfield Company in the United States. There are no related products in China. At the same time, the research on wireless network transmission mainly focuses on the radio frequency carrier, and most of the transmitter and receiver parts are Combination design using independent units, the design focus is also on the signal modulation, demodulation and coding of the radio frequency unit itself, which greatly reduces the reliability of the wireless network and the amount of transmitted data, and also makes the selection of wireless transmission channels It has great limitations; at the same time, the control host of this type of engineering seismograph at home and abroad is still a traditional industrial computer, which further highlights its disadvantages of inconvenient portability and high power consumption. However, it is still blank at home and abroad to use the relatively mature wireless network stations that transmit large data volumes and far distances to build wireless transmission networks. It is also aimed at the current ARM architecture with strong computing power and small power consumption. The design of the control host has not yet appeared at home and abroad, and has yet to be improved and made breakthroughs in terms of reliability, data transmission volume, portability, acquisition channel restrictions, and compatibility with multiple types of geophones. More importantly, domestic seismic exploration instrument manufacturers currently produce The mainstream products are still relatively traditional and technologically backward centralized structural engineering seismographs, and there is no research and development of higher-performance and practical telemetry engineering seismographs, and the wireless telemetry engineering seismographs are even blank.

Invention content:

The purpose of the present invention is to provide a wireless telemetry seismic signal acquisition system with small volume and weight, low power consumption, large amount of data to be collected and transmitted, strong anti-interference ability, high reliability, and convenient construction and wiring.

The present invention is realized like this:

The wireless telemetry seismic signal acquisition system of the present invention comprises a control host, a synchronization device and a plurality of distributed branch acquisition stations,

The control host has an ARM processor connected to the memory, display, keyboard and wireless network radio station, accepts the synchronous start command of the synchronization device, and after receiving the start command, sends configuration commands and configuration parameters to each branch collection station in a loop, receives and processes the branch collection station Incoming seismic data;

The synchronization device is connected by the first micro-controller to the interface chip of the wireless network station via the Ethernet drive chip, the first micro-controller is connected to the pulse shaping chip, the pulse shaping chip is connected to the external trigger sensor, and after the external trigger sensor senses the signal, it sends A high-frequency sharp pulse is used to trigger the first microcontroller, and the first microcontroller sends a synchronous start command to the control host and the branch collection station through the wireless network radio station;

Each branch acquisition station has a plurality of detectors, and each detector is connected to the second microcontroller through a serial programmable gain amplifier, an anti-aliasing filter, a single-ended to differential chip, and an A/D converter. The micro-controller is respectively connected with the programmable gain amplifier, the external memory, and the network card driver, and the network card driver is connected with the interface chip of the wireless network radio station. The host sends the collected seismic data.

The programmable gain amplifier is composed of two-stage amplifier PGA205 cascaded. The four control terminals of the amplifier are respectively connected with the second microcontroller EP2C8Q208I8N. Voss low-pass filter, single-ended to differential chip is AD8138, A/D converter is ADS1252, ±5V power supply is connected to PGA205 and LM4562, +5V power supply is converted to 2.048V through chip REF191, connected to AD8138, and converted to The 4.096V series OPA350 is connected with ADS1252, the memory is H57V2562GTR-60C, and the wireless network radio interface chip is DM9000AE.

The second microcontroller is connected with the chip EPCS16SI8N, the AS mode interface chip and the chip EP2C8Q208I8N. The second microcontroller is embedded with an IP core, and the IP core includes a CPU core and internal RAM, an externally expanded Flash, an externally expanded SDRAM driver, and an A/D converter driver.

The external trigger sensor is a high-frequency hammering electronic switch, the output of the high-frequency hammering electronic switch contacts the two-stage NOT gate of the triggering controller 74HC04 and then is connected to the interrupt port of the first microcontroller STM32F103ZET6, the first microcontroller Built-in 512K Flash and 64K SRAM, the Ethernet driver chip is ENC28J60, and the wireless network radio interface is HR911105R145.

The ARM processor of the control host is S3C6410, its general peripheral interface and touch screen, 256M RAM, 512M Flash, USB_HUB, SD card, timing control host ARM processor is S3C6410, its general peripheral interface and touch screen, 256M RAM, 512M Flash, USB_HUB, SD card, timing clock unit connection.

The branch acquisition station, the synchronization device and the control host have integrated power supply inside, and the external power interface has been expanded. The integrated power supply is a rechargeable lithium battery. The integrated power supply or the external power supply is connected to the DC-DC switching power supply module and the power divider. DC switching power supply module WRD12DO5—10W is converted from 9~18V input to ±5V, WRD12S12—10W is converted from 9~18V input to +12V, WRD12S05—10W is converted from 9~18V input to +5V, and the output of the switching power supply is passed through π Type filter, WRD12DO5-10W output +5V through voltage regulator chip LM1085-3.3V to power the second microcontroller, and then 3.3V voltage through linear regulator chip LT1117-1.2V to power the second microcontroller ID core , WRD12S05-10W output powers the second micro-controller inside the synchronization device through the voltage regulator chip LM1085-3.3V, and is used as the working power supply of the ARM processor chip S3C6410 inside the control host, and the WRD12S12-10W output is used as the working power supply of the radio station.

The geophone is a single component moving coil seismic sensor or a single component MEMS acceleration sensor.

Each branch collection station of the system is connected with 12 detectors.

The system consists of geophones, branch acquisition stations, control host, wireless network and synchronization device. The special feature of the whole system is that the branch acquisition station, the control host and the synchronization device do not need to be connected with each other by cables, but realize the mutual communication between the three parts through the wireless network, and at the same time, the power supply of each part is integrated in each unit internal.

A single branch acquisition station is connected to 12-channel seismometers for sensing artificially generated seismic signals.

The branch acquisition station mainly includes multi-channel programmable amplifier circuits, anti-aliasing filter circuits, single-ended differential conversion circuits, A/D conversion circuits, storage circuits, Ethernet drive circuits, FPGA control circuits, and integrated power management circuits. Among them, the programmable amplifier circuit uses a very low input bias amplifier to amplify the original seismic signal, and its amplification factor can be adjusted according to the actual situation; the anti-aliasing filter circuit adopts the design method of active filter to mainly realize the low-pass filtering of the signal ; The single-ended differential conversion circuit is responsible for converting the seismic signal from the single-ended signal processed by the previous stage to the differential signal required by the subsequent stage circuit; the A/D conversion circuit uses a 24-bit high-resolution A/D converter to convert the seismic analog signal into Digital signal; the storage circuit part uses large-capacity SDRAM to quickly store the collected seismic data; the Ethernet drive circuit is realized by using a 100M network card chip, and provides an RJ45 interface to connect with an external wireless network station; the FPGA control circuit is responsible for driving and controlling programmable Amplifiers, A/D conversion circuits, storage circuits, and network interfaces, which realize the parallel acquisition function of multiple A/D converters, and adopt the storage method of double buffer design structure for each acquisition channel, and store each channel of seismic data in time. In the external SDRAM, at the same time, the FPGA needs to embed the corresponding soft core to facilitate the internal integration of the TCP/IP protocol in the branch collection station, and combine this protocol to realize the data transmission control protocol between the branch collection station, the control host and the synchronization device; the power management circuit adopts The internal integrated lithium battery is converted into the ±5V required by the system and the 12V power required by the wireless network station through the DC-DC switching power supply. At the same time, the power of the lithium battery is monitored in real time by using the comparator voltage divider and the corresponding status indicator.

The control host part adopts the current ARM processor with high main frequency and integrated various general system peripherals to build, mainly combined with the peripheral interface of the ARM processor to expand the system requirements of touch screen, USB interface, SD card, network, etc. Peripherals, at the same time, it is necessary to expand the large-capacity SRAM and Flash memory required by the hardware platform of the control host to quickly store the received seismic data. The integrated A/D converter inside the S3C6410 regularly collects the power supply voltage, and converts it into power information for graphical display on the main interface of the system application software; in order to meet the intelligent operation requirements of the control host, the control host is partially loaded with a Windows CE operating system , and write the corresponding upper computer application software under the operating system. The software part integrates the transmission control protocol realized by the TCP/IP protocol, and the mutual agreement with the branch collection station and the synchronization device. The main function of the software is to be read by the wireless network. The acquired seismic data is converted into the common SEG-2 and SEG-Y standard seismic data format for file storage, and the seismic waveform is dynamically displayed according to the received data, which also includes the network test function of detecting the connection status and communication status of the network And the geophone test function to check the connection status of the geophones laid out in the survey line.

The synchronization device part is implemented by high-performance STM32F103ZET single-chip microcomputer with network card chip and wireless network radio station. It mainly sends a synchronization command to the control host and branch collection station immediately after receiving the interrupt triggered by the external hammer switch or remote explosion device, so that Simultaneously start the data acquisition function of each branch acquisition station and start the function of controlling the host computer to start receiving seismic data.

The wireless network is implemented by a wireless network radio station supporting the Ethernet interface, and a one-to-many star network is established according to the number of branch collection stations. Each access point in the network is assigned a different IP address, and the transmission of commands between the entire system And the exchange of data is completed by the established wireless network. The wireless network radio adopts compatible low-gain and high-gain antennas to meet the requirements of system portability and the ability to circumvent obstacles during construction in complex environments.

Wherein, the collection system adopts a distributed design structure, and the control host uses the established wireless communication network to control each branch collection station, so as to realize the telemetry data collection function; the signal processing module inside the branch collection station is integrated 12 processing channels that are independent of each other and executed in parallel, and the programmable amplifier circuit, anti-aliasing filter circuit, and single-ended differential conversion circuit all use fully analog chips to ensure the integrity of the seismic signal to the greatest extent; the FPGA The parallel processing part controls 12 A/D converters at the same time, and allocates double buffers for each acquisition channel, and realizes strict parallel acquisition of 12 signals with a "ping-pong mechanism"; the number of molecular acquisition stations in the acquisition system can be Dynamic expansion; the main chip of the control host can also be realized by other low-power and high-frequency processors except the ARM structure, and can also be loaded with other real-time operating systems that support graphical interface operations; The internal main control chip of the molecular acquisition station can also use other controllers that support parallel processing except FPGA, or assign a small single-chip microcomputer to control each acquisition channel.

The working principle of the present invention is as follows: first configure the control host, after the configuration of the control host is completed, enter the state of waiting for synchronization instructions, and send configuration instructions and configuration parameters to each branch collection station through the wireless data transmission network, after the branch collection station receives the configuration instruction Configure each internal module according to the configuration parameters. After the configuration is completed, the branch acquisition station also switches to the state of waiting for synchronization instructions. The synchronization device sends synchronization instructions to the control host and branch acquisition stations according to external conditions. After receiving the synchronization instructions, the control host Circularly send data reading instructions to each branch collection station, the branch collection station immediately starts the internal collection function after receiving the synchronization instruction, and sends the corresponding transmission data response instruction to the control host after the collection is completed. The entire acquisition process of the branch acquisition station is as follows: After the seismometer senses the artificially generated seismic signal, it converts it into an electrical signal. The aliasing filter filters out the high-frequency noise contained in the signal, and then uses the single-ended to differential chip to convert the single-ended seismic signal into a differential signal, and sends it to 24-bit A/D conversion for analog-to-digital conversion. At this time, it needs to be used inside the FPGA The allocated double buffer area is to store the data converted for the first time in cache 1 first, and store the data in cache 2 when the signal is converted next time, and transfer the data in cache 1 to SDRAM storage on the one hand, and store the data in cache 1 when converting again. Store the data in buffer 1, and transfer the data in buffer 2 to SDRAM at the same time, and execute this cycle until the data acquisition is completed, and all 12 channels inside a single branch acquisition station perform the same process. Due to the parallel processing capability of FPGA, the data storage is guaranteed. The operation of input and read and the control of each peripheral are executed in parallel, so the acquisition and storage of all 12 channels of data are strictly parallel. After all 12 channels of data collection are completed, the data is encapsulated and transmitted to the control host through the wireless network. When the control host receives the seismic data, it first displays the seismic waveform on the main interface of the integrated application software through a drawing algorithm, and performs filtering or lane-changing processing on the observed seismic waveform according to actual needs, and can also check the quality of data collection through spectrum analysis , followed by the format conversion of the control host, which converts the seismic data into a common standard seismic data format for storage, so as to facilitate the processing of other inversion analysis software in the later stage.

The beneficial effects of the present invention are: the present invention adopts a distributed design structure, and combines wireless network stations to form a network transmission network to realize remote measurement and collection of seismic data. The hardware platform of the control host is built with a high-performance and low-power ARM processor combined with a touch screen, and is powered by an internally integrated rechargeable lithium battery, which greatly reduces the volume and weight of the engineering seismograph control host and loads a real-time desktop operating system Windows CE develops corresponding application software to improve the intelligence of operation; the branch acquisition station uses a single chip FPGA to control 12 channels of signal acquisition in parallel at the same time, which not only improves the acquisition performance, but also greatly reduces Reduced its volume and weight. The entire system reduces the large number of extension lines and synchronous signal transmission lines used for data transmission in traditional engineering seismographs, and instead adopts wireless communication, which further improves the portability of the entire system and greatly improves the construction of engineering exploration. Efficiency and construction ability in various complex occasions. Therefore, the whole system has the characteristics of portability, low power consumption, high performance, ability to overcome construction restrictions in various complex occasions, and high construction efficiency.

Description of drawings:

Fig. 1 is a block diagram of the system structure of the present invention.

Figure 2 is the internal block diagram of the branch collection station.

Figure 3 is a schematic block diagram of the single-channel signal acquisition board of the branch acquisition station.

Fig. 4 The principle block diagram of the main control board of the branch collection station FPGA extended SDRAM, Ethernet interface and download debugging interface;

Fig. 5 is a distribution block diagram of the main control FPGA kernel resources of the branch collection station;

Fig. 6 is a block diagram of the power supply distribution scheme of the branch collection station;

Fig. 7 is the functional block diagram of the power supply circuit of the branch collection station;

Fig. 8 is the internal block diagram of the control host;

Fig. 9 is a block diagram of the power supply distribution scheme of the control host;

Figure 10 is a schematic block diagram of the power supply circuit of the control host;

Figure 11 is a functional block diagram of the synchronization device system.

Detailed ways:

In order to make the present invention easier to understand, the present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.

Referring to Fig. 1, a kind of wireless telemetry seismic signal acquisition system is made up of seismometer, branch acquisition station, control host computer, wireless network and synchronous device, takes control host computer as the control core of acquisition system, and synchronous device 6 is used for generating The artificial seismic source transmits synchronous signals to the control host and branch acquisition stations at the same time, and the engineering seismic signals are sequentially transmitted to the seismometer 3, parallel transmission cable 4, branch acquisition station 1, wireless network station 2, and control host 5. The control host 5 dynamically adjusts the parameters of each unit in the acquisition system and branch acquisition stations, performs corresponding preprocessing on the acquired data and real-time display of the seismic waveform, and converts the acquired data into a common seismic data format for storage.

Referring to Figure 2, as a key part of seismic signal acquisition, the branch acquisition station starts the signal acquisition function of the system after receiving the synchronization signal from the synchronization device. The whole process is as follows: the seismic signals are picked up by 12 geophones connected in parallel Finally, the parallel cable that transmits the seismic analog signal is transmitted to the two-stage programmable amplifier PGA205 for amplification. After the seismic signal is amplified, it needs to perform corresponding anti-aliasing filtering. pass filter to filter out high-frequency components higher than half of the sampling frequency of the A/D converter to ensure that no aliasing occurs in the collected seismic signals. The characteristics of input impedance and low output impedance, so this part can isolate the analog circuit and digital circuit in the acquisition circuit to ensure that the digital signal of the latter stage will not affect the analog circuit of the previous stage; After filtering, it is still a single-ended signal, and the signal input part of the A/D is a differential input, so the single-ended seismic signal must be converted into a differential signal required by the A/D converter, and converted by the 24-bit A/D converter Seismic signals are converted from analog to digital, and then stored in the corresponding double buffer area allocated by the FPGA, and stored in the corresponding SDRAM storage space through the FPGA. After the entire acquisition process is completed, the FPGA is used to control the Ethernet interface to transmit the data via the wireless network station. The main engine is controlled, and the geophones used to pick up seismic signals can be similar to the 4~100Hz horizontal or vertical single-ended output geophones produced by Chongqing Geological Instrument Factory. Each geophone has 2 transmission lines, and 12 channels are connected in parallel. A total of 24 transmission lines are transmitted to the acquisition circuit of the branch acquisition station. Of course, if a MEMS type acceleration sensor is used, the circuit must be modified accordingly, such as Model1221. Since its output signal is a differential signal, the amplifier used must also be a differential amplifier. If The sensitivity of the sensor adopted is high enough, and it can also be directly connected with the A/D converter of the subsequent stage without passing through the amplifier.

Referring to Figure 3, the front-end programmable amplifier needs to be implemented with a low input bias voltage and multiple gain-adjustable amplifiers. In order to ensure a larger gain range, two-stage PGA205 amplifiers are cascaded to achieve this, where each The four control ports of the two-stage PGA205 are respectively connected to the 74~77 ports of the main control FPGA chip EP2C8Q208I8N. Since the single stage of the PGA205 can realize the four-speed amplification function of 1, 2, 4, and 8 times, the two-stage PGA205 can be cascaded. Realize the amplification function of 7 gears, that is, increase from 1 to 64 times in steps of 2 times, and can pick up the signal with the lowest 10μV; the anti-aliasing filter adopts LM4562 combined capacitor with extremely low noise and distortion The resistor network forms a fourth-order active Butterworth low-pass filter. Usually, the sampling frequency of the system A/D converter is set to 4kHz, so here the passband cut-off frequency of the filter is set below 2kHz, and the The design method of Butterworth type further facilitates the special filter design software (such as FilterLab) to set the capacitance and resistance parameters to effectively filter out the false frequency components in the effective signal; the single-ended to differential chip adopts the low-distortion differential amplifier AD8138 to realize , mainly to set the feedback resistors of the four feedback terminals of AD8138 to the same parameter value, and configure the amplifier as an emitter follower to ensure that the original signal passes through this part without being amplified or attenuated, and its reference voltage must be set It is 1/2 of the reference voltage of the A/D converter to ensure that the converted signal amplitude will not exceed the maximum acquisition signal amplitude of the A/D. Since the reference voltage used by the A/D converter is 4.096V, this part The reference voltage is 2.048V, which is directly converted from 5V to 2.048V by the linear regulator chip REF192.

Referring to Figure 3, the A/D converter is required to have an adjustable sampling rate and must meet the requirements of high resolution, so the ADS1252 with 24-bit high resolution and a maximum sampling rate of 40kHz is used for design in the circuit. The adjustment of the sampling rate is mainly realized by adjusting and controlling its input clock. This function can be driven by the high-precision clock signal generated by the internal phase-locked loop unit of the FPGA chip EP2C8Q208I8N. The entire circuit occupies 3 EP2C8Q208I8N ports to drive 12 ADS1252, that is, each port drives 4 ADS1252 at the same time. Taking the first channel in the figure as an example, the clock input terminal of ADS1252 is driven by the frequency division clock generated by the 137th port of EP2C8Q208I8N, and by adjusting the output clock of the port Frequency to adjust the sampling rate of ADS1252. In addition, EP2C8Q208I8N communicates with ADS1252 through the 27th and 35th ports to read the data converted by ADS1252. The operation of other channels is the same as that of the first channel.

Referring to Fig. 4, due to the continuous data acquisition of seismic signals, usually when the sampling rate of A/D conversion is set to 4kHz, the number of sampling points is 2048, and since a 24-bit A/D converter is used , so the amount of data for a single channel is 6k bytes. Calculated with a conventional 48-channel engineering seismograph, the total seismic data is 288K bytes. Of course, the memory space occupied by the program needs to be added, and when the sampling rate or When the number of sampling points is adjusted, the amount of data per channel will also change accordingly. The internal storage space of EP2C8Q208I8N cannot meet the storage requirements of the system, so it is necessary to expand the external memory to meet the data storage requirements. The high-speed SDRAM chip H57V2562GTR-60C up to 166MHz is used to realize this function. Its capacity is 256Mb, which fully meets the storage space requirements of the system. The total storage space of H57V2562GTR-60C is divided into 4 physical blocks, each block is 16M×16bit , that is, it uses a 16-bit data line, a 13-bit address line, and a 2-bit physical block selection control line, which are respectively controlled by the IO port driver marked as SDR_ corresponding to the EP2C8Q208I8N. The underlying driver is custom-written and embedded EP2C8Q208I8N IP core to complete.

Referring to Figure 4, after the data is collected and temporarily stored in the externally expanded SDRAM, the next step is to transmit it to the control host. Since the seismic data collected by the branch collection station is temporarily stored in the SDRAM memory in binary form, and for seismic data, It needs to be spliced and converted and stored as a standard format file. Therefore, the branch acquisition station needs to transmit the acquired and temporarily stored seismic data to the control host for corresponding processing and storage format conversion. Due to the large amount of data collected by engineering seismic , so the speed and reliability of data transmission must be considered at the same time. The traditional methods all use wired methods, but this method needs to connect more transmission cables, which is extremely inconvenient and will greatly reduce the efficiency of field work. Therefore, the present invention The wireless network station AirMesh 900 with a speed of up to 20Mbps launched by Beijing Grid Communication Technology Cable Company is used to form a star data transmission network. It works in the 902~928MHz ISM frequency band, with a maximum transmission distance of 15 kilometers and supports OFDM. Coding modulation mode and wireless receiving diversity function, fully compatible with 100Base-T Ethernet interface and dynamic IP or static IP allocation, which provides a good driving interface for the development of branch collection stations, which drive wireless networks to the greatest extent The radio station completes the transition of data from SDRAM to the radio station. The circuit adopts the DM9000AE Ethernet interface chip with a maximum transmission speed of 100Mbps to realize it. It has a 16K byte SRAM inside as a FIFO buffer for receiving and sending, and supports 8/16bit two One host working mode, AUTO-Mdix (supports direct interconnection and automatic flip) function certified by HP, supports TCP/IP acceleration (IPV4 check sum offload) to reduce CPU burden, improve overall machine performance, 10ns I/O read and write time , and supports the 802.3 Ethernet transmission protocol promulgated by IEEE, which ensures the reliability and stability of the data transmission network. Many features not only meet the driving requirements of wireless network radio stations, but also fully meet the speed requirements for seismic data transmission. Of course, for For normal communication with the control host, it is also necessary to combine the TCP/IP protocol during Ethernet communication to form a special communication protocol for internal communication of the ad hoc network to ensure the readability of the transmitted data.

Referring to Figure 4, if the FPGA chip EP2C8Q208I8N inside the branch collection station needs to load the corresponding execution code, it needs a corresponding program debugging and download interface. Therefore, the system leads to the JTAG program debugging and download interface integrated in the EP2C8Q208I8N hardware. However, due to the The program code executed by the system cannot be saved, that is, all the data stored inside the system will be lost after the system is powered off. Therefore, it is necessary to expand the corresponding storage unit to save the corresponding code of the FPGA, and at the same time comprehensively consider the storage space required for executing the code after compilation. The present invention adopts the 16Mbit serial configuration chip EPCS16SI8N specially equipped by Altera Company for its FPGA chip to save the code program executed by the system, that is, the program that EP2C8Q208I8N needs to run is initially debugged by the JTAG interface, and after the adjustment is completed, download the interface through the AS mode Download to EPCS16SI8N, when the code is executed, EP2C8Q208I8N first reads the code program saved by EPCS16SI8N, and then loads it into its own RAM for execution, and the acquisition board will automatically load this part of the program after each power-off restart or reset of the system.

Referring to Figure 5, since the FPGA needs to be used as a controller to integrate multiple functions, at the same time, it needs to be compatible with multi-channel parallel acquisition and storage functions and facilitate the writing of FPGA applications, so it is necessary to embed an IP soft core inside, and the soft core part includes the development platform Quartus sub-module SOCBuilder integrates the CPU core and internal RAM, externally expanded Flash, externally expanded SDRAM driver, USB to JTAG output printing, and in the case of ensuring strict parallel acquisition and storage, it is necessary to use the 12-way A/ The D converter driver is integrated into the embedded soft core, so that when the application program written by the NIOS development platform operates on multiple A/Ds, it can be executed strictly in parallel; because each A/D needs to continuously collect a certain length of data , and after a single acquisition, it is necessary to temporarily store the data collected in the externally expanded SDRAM memory in time. If it is directly stored, it will cost more time, resulting in a time delay in the continuous acquisition process of the A/D , because this time delay is uncertain, it will further cause the 12-way A/D to be unable to execute strictly in parallel. To solve this problem, the present invention adopts a double-buffer storage mode, and integrates the functions of this part into In the soft core, to ensure that the 12-way double-buffer operation is strictly parallel, this part makes full use of the design structure of the FIFO (first-in-first-out) memory of the FPGA, that is, allocates 2 FIFO storage spaces for each A/D acquisition , the data bit width of a single FIFO unit is 8 bits, and the depth is 2 words, which ensures that it can store the 3 byte space required for a single A/D acquisition. The entire storage process is as follows: A/D converter completes a single After conversion, store the data in the corresponding cache 1. When performing a conversion, on the one hand, store the data in the corresponding cache 2; Temporarily store the data in cache 1 again, and read out the data from cache 2 and store it in the externally expanded SDRAM. This cycle operates until the entire acquisition process is completed. Since the data is stored in cache 1 and the data is read from cache 2 and stored in External expansion of SDRAM is two independent processes inside the FPGA, and they are executed in parallel, so the continuous acquisition process of A/D will not be interrupted.

Referring to Figure 6 and Figure 7, high-quality power supply is crucial to the collection effect of the branch collection station and the stability of the entire system. Since the branch collection station requires multiple sets of power supplies, it requires multiple combinations of power outputs. In order to ensure the portability and recyclable performance of the system, the present invention adopts the power supply mode of the internal integrated rechargeable lithium battery or the external power supply with the combination of DC-DC switching power supply module with wide voltage output, and the integrated power supply further improves its performance. Portability, the external power supply is used as an optional backup power supply, in which the rechargeable lithium battery scheme connects four single-cell 3.6V/2.6Ah in series, that is, 14.4V/2.6Ah as a group, and further uses 10 groups of the above-mentioned lithium batteries The combination is a 14.4V/26Ah battery pack to ensure sufficient power supply. The external power supply can be a 12V/60Ah battery or an AC-DC switching power supply. The specific internal power distribution is as follows: using a dual-output DC-DC switching power supply module WRD12D05-10W converts the voltage to ±5V, which is used as the power supply of the signal conditioning circuit in the acquisition board; uses the DC-DC switching power supply module WRD12S12-10W to convert the voltage to 12V, which is used as the power supply of the wireless network station; further adopts linear voltage regulation The chip LM1085-3.3V converts the +5V voltage to +3.3V as the FPGA working power supply, and converts the +3.3V voltage to +1.2V through the linear voltage regulator chip LT1117-1.2 as the FPGA soft core working power supply; in addition, because the branch acquisition station The ADS1252 of the main control board needs a reference voltage of +4.096V when working, so the high-precision REF198 is used here to linearly stabilize the +5V power supply to +4.096V as the reference voltage of the A/D converter. Simultaneously drive 12 channels of ADS1252 to work in parallel. In order to ensure sufficient driving capacity, the present invention uses amplifier OPA350 to build an emitter follower to increase the driving capacity of REF198. Similarly, the single-ended to differential chip on the signal processing board of the branch acquisition station AD8138 needs a +2.048V reference power supply. Here, the high-precision REF191 is used to convert the +5V voltage to +2.048V; in addition, because the DC-DC switching power supply is used in the circuit, there will be large ripples, and The system has high requirements on the quality of the ±5V power supply, so it is necessary to add a corresponding π-type filter to the output of the ±5V power supply to reduce the power supply ripple. Capacitors of 100μF and 0.1μF are connected near the power supply to suppress high-frequency interference from the ground wire, ensuring extremely low noise and temperature drift. For the real-time monitoring part of the voltage, the LM393 integrated with two sets of comparators is used to compare the monitoring reference voltage with the divided voltage of the power supply, and the resistor is used to divide the lithium battery power supply as the same input voltage compared with the power monitoring comparator, and the LM393 is set The reverse comparison voltage is 2.5V, and the outputs of the two sets of comparators are respectively connected to light-emitting diodes. When the power supply divides the high-voltage reference voltage, the green light-emitting diode turns on, indicating that the voltage is normal; otherwise, the red light-emitting diode turns on, indicating undervoltage. At the same time, in order to prevent the power failure from causing the subsequent circuit to be burned, a self-recovery fuse is added to the power supply input of the battery to ensure that the power supply circuit is automatically cut off when the power supply fails.

Referring to Figure 8, in order to further improve the portability and comprehensive performance of the system, the control host part adopts the S3C6410 ARM processor based on the ARM11 core and embeds the hard real-time operating system Windows CE to realize it. The main frequency of the S3C6410 can reach up to 667MHz, which fully meets the computing requirements of the engineering seismograph control host. At the same time, it provides a complete set of general system peripherals, including LCD interface, 4-channel DMA, compatible with SD card main interface protocol, USB, SPI, I ² C, UART and 130 general-purpose IOs and 24 external interrupt request ports, etc., and the core part uses 0.13μm CMOS standard macro cells and memory cells. To expand the space of peripheral devices, the size of the device is fundamentally reduced, and the power consumption of the entire system is also greatly reduced. The control host part is combined with the general peripheral interface of S3C6410 to expand the 10-inch touch screen, 256M RAM, 512M Flash, USB_HUB, SD card interface, mouse and keyboard interface, and real-time clock unit. Among them, the 10-inch touch screen is used to realize various operating functions of the system and display the collected seismic waveforms in real time; 256M RAM is used as the operating space of the system and temporary storage space for processing data; 512M Flash is used to store the operating system and seismic data file; USB_HUB can be used as a general interface for other USB peripherals; SD card interface is convenient for copying and transferring seismic data files; mouse and keyboard interface is convenient for controlling the operation of the host; the real-time clock is used to display the exact date and time information of the system. In addition, in order to monitor the power supply voltage in real time, the control host part divides the power supply and connects it to the built-in A/D converter of S3C6410 for collection, and displays the necessary power scale on the interface of the operating system. Another important function of the control host is the integration of the Ethernet communication interface, so as to communicate with the branch collection station and the synchronization device through the wireless network. For the Ethernet communication part, DM9000AE is still used as the driver chip, and the external RJ45 interface is used to realize the control host. Operation of wireless Internet radio. In this part, in order to enhance the stability of the system, we use the OK6410B ARM11 core board produced by Feiling Embedded Co., Ltd. to expand the system requirements to build the control host.

The control host needs to load the Windows CE operating system to meet the needs of intelligence, so it is necessary to customize the kernel service of the operating system and integrate the necessary external interface underlying drivers. The customized kernel part of the present invention mainly includes the two-dimensional plotter display component under Core OS. NET Compact Framework 2.0, DirectDraw, file operation components File Cache Manager, RAM and ROM File System, registry saving function Hive-based Registry component, VC basic class library component MFC support, network communication TCP/IP V6 component, support USB hot plug The unplugged components are USB HID Keyboard and Mouse, USB Storage Class Driver, Chinese input method components SimSun & NSimSun (Subset 2_50) and GB18030 Data Converter. Finally, two driver components, SD Bus Driver and SD Memory, need to be added to the Device Driver node to ensure The control host supports related operations of the SD card device, which facilitates the cross-platform transfer of seismic data.

Referring to Figure 9 and Figure 10, similar to the branch collection station, the control host part also needs multiple sets of power supplies. Also in order to improve the portability of the control host, two solutions are still adopted: built-in rechargeable lithium battery and extended external power interface, through DC - DC switching power supply module WRD12S05-10W converts to +5V as the touch screen power supply, converts to 12V through the switching power supply module WRD12S12-10W as the working power of the wireless network station, and converts +5V to +3.3V through the linear voltage regulator chip LM1085-3.3 As the working power supply of the ARM core board, in order to ensure the low ripple output of the power supply, a corresponding π-type filter is added to the output of the +5V power supply to filter out high-frequency ripple interference. For real-time monitoring, the lithium battery power supply or external power supply is connected to the built-in A/D of the ARM core board after reasonable voltage division, and the power conversion is performed after collection and displayed on the application software interface integrated with the control host. In addition, similar to the branch collection station, it is necessary to ensure that when the power supply of the control host fails, the subsequent circuit will not be burned, and a self-recovery fuse is added to the battery power input terminal.

Referring to Fig. 11, the synchronization device in the system is used to start the synchronous collection function of each branch collection station. Its front end is mainly to send a high-frequency spike to trigger the external interrupt function of the controller after the external high-frequency hammering electronic switch senses a sufficiently strong vibration. Because it is a high-frequency spike, it is not easy to be detected by the main controller. When the external interrupt input port is picked up, the present invention connects the output end of the electronic switch to the two-level NOT gate of the 74HC04 and then connects to the interrupt port of the main controller. Since the 74HC04 adopts the design structure of the Schmitt trigger, Schmitt The most important feature of a Schmitt trigger is that it can shape this sharp pulse signal into a rectangular pulse with steep edges. In addition, the Schmitt trigger only works when the input voltage rises from a low level to a threshold voltage or falls from a high level to a threshold voltage. The state of the circuit will change only when the high-frequency hammer switch is activated. This feature ensures that the high-frequency hammer switch will not trigger the interrupt function of the controller due to misoperation or interference. In addition, the output port of 74HC04 must be connected to a pull-up resistor to ensure its It can input suitable level pulses to the interrupt port of the controller. At the same time, in order to improve the anti-interference performance of the circuit, it is necessary to pull up the other 4 unused input terminals of the non-gate inside the 74HC04 to high level. After the main controller of the synchronization device responds to the external interrupt, it needs to send a frame of data packets to each branch acquisition station and the control host through the wireless network radio station to indicate the synchronous acquisition function. After the whole process is completed, the interrupt function is restored to respond to the next interrupt. This cycle realizes the function of synchronous and continuous acquisition of each branch acquisition station. The interior of the synchronization device is mainly realized by the high-performance microcontroller STM32F103ZET6 combined with the Ethernet driver chip ENC28J60 and wireless network radio. The frequency enables it to drive high-speed peripherals, which also provides a basis for its control ENC28J60. ENC28J60 is driven by an SPI bus interface with a speed of up to 10Mbps. This speed fully meets the requirements of driving a wireless network radio station as a synchronous device. The drive is relatively simple, it supports automatic polarity detection and correction of the 10Base-T port, and can be directly connected to the wireless network radio station through the RJ45 interface. In addition, its built-in 8K send/receive data packet dual-port SRAM provides a timely transmission of synchronous commands. Good cache space. STM32F103ZET6 drives and controls ENC28J60 through the SPI bus of ports 40~43, and connects to the wireless network radio station through the RJ45 interface of HR911105R145.

Referring to Figure 10, considering the portability of the synchronization device, its power supply part uses an internally integrated rechargeable lithium battery, which is similar to the power supply scheme of the control host, and is also converted to +5V by the DC-DC switching power supply module WRD12S05-10W as the The input of the post-stage power supply is to convert +5V to +3.3V through the linear voltage regulator chip LM1085-3.3. If the lithium battery LM1085-3.3 is used to directly convert to 3.3V, even if two sets of rechargeable lithium batteries are connected in series, the standard is 7.2V. Weighing the voltage, the voltage difference when transferred to 3.3V is 3.9V, which greatly reduces the working efficiency of the power supply, and the switching power supply is first transferred to 5V and then transferred to 3.3V, which can greatly improve the working efficiency of the power supply. It is also converted to 12V by the switching power supply module WRD12S12-10W as the working power supply of the wireless network station. The π-type filter and insurance part for filtering ripples are the same as the power supply scheme of the control host. In addition, the monitoring part of the power supply voltage of the synchronization device and the molecular acquisition same station.

Claims (8)

1. wireless telemetering formula seismic signal acquiring system is characterized in that comprising a main control system, branch's acquisition station of a synchronous device and a plurality of distributed settings;

Main control system has arm processor to be connected with storer, display, keyboard and wireless network radio station; Accept the synchronous enabled instruction of synchronous device; Circulation is sent configuration-direct and configuration parameter to each branch's acquisition station after receiving enabled instruction, receives and handle the geological data that branch's acquisition station is sent;

Synchronous device is connected with wireless network radio interface chip through the Ethernet chip for driving by first microcontroller; First microcontroller is connected with the shaping pulse chip; The shaping pulse chip is connected with the external trigger sensor; The external trigger sensor sensing sends a high frequency spike pulse to trigger first microcontroller behind signal, first microcontroller sends synchronous enabled instruction through the wireless network radio station to main control system and branch's acquisition station;

Each branch's acquisition station has a plurality of wave detectors; Programmable gain amplifier, frequency overlapped-resistable filter, single-ended transfer difference chip, the A/D converter of each detector via series connection are connected with second microcontroller; Second microcontroller respectively with programmable gain amplifier; External memory storage, network interface card driver connect, and the network interface card driver is connected with wireless network radio interface chip, and branch's acquisition station starts after receiving synchronous enabled instruction; Receive main control system data sent reading command, send the geological data of gathering to main control system.

2. system according to claim 1; It is characterized in that programmable gain amplifier is made up of two-stage amplifier PGA205 cascade; Four control end-apparatus of amplifier link to each other with the second microcontroller EP2C8Q208I8N respectively; Frequency overlapped-resistable filter is the active Butterworth LPF of quadravalence that integrated package LM4562 and electric capacity, resistance are formed, and the single-ended transfer difference chip is AD8138, and A/D converter is ADS1252; ± 5V power supply is connected with PGA205, LM4562; + 5V power supply converts 2.048V into through chip REF191 and is connected with AD8138, converts 4.096V series connection OPA350 into through REF198 and be connected with ADS1252, and reservoir is H57V2562GTR-60C, and wireless network radio interface chip is DM9000AE.

3. system according to claim 2; It is characterized in that second microcontroller is connected with chip EP2C8Q208I8N with chip EPCS16SI8N, AS pattern interface chip; The second microcontroller inside is embedded with the IP kernel; The IP kernel comprises CPU nuclear and internal RAM, extends out Flash, extends out the SDRAM driver, the A/D converter driver.

4. system according to claim 1; It is characterized in that said external trigger sensor is a high frequency hammering electronic switch; The non-middle fracture that inserts the first microcontroller STM32F103ZET6 behind the door again of two-stage of controller 74HC04 is sent out in the output contact of high frequency hammering electronic switch; The Flash of the built-in 512K of first microcontroller and the SRAM of 64K, the Ethernet chip for driving is ENC28J60, the wireless network radio interface is HR911105R145.

5. system according to claim 1, the arm processor that it is characterized in that main control system is S3C6410, its general Peripheral Interface is connected with RAM, the Flash of 512M, USB_HUB, SD card, the timer clock unit of touch-screen, 256M.

6. system according to claim 1; It is characterized in that branch's acquisition station; There is integrated power supply synchronous device and main control system inside, and have expanded the external power source interface, and integrated power supply is a chargeable lithium cell; Integrated power supply or external power source are connected with the power supply voltage divider with DC-DC switch power module; DC-DC switch power module WRD12DO5-10W is converted to ± 5V by 9 ~ 18V input, and WRD12S12-10W is converted to+12V by 9 ~ 18V input, and WRD12S05-10W is converted to+5V by 9 ~ 18V input; Pi type filter is all passed through in the output of Switching Power Supply; WRD12DO5-10W output+5V gives the power supply of second microcontroller through voltage stabilizing chip LM1085-3.3V, gives the power supply of the second microcontroller ID kernel with 3.3V voltage through linear voltage stabilizing chip LT1117-1.2V again, and WRD12S05-10W output is given the power supply of second microcontroller through voltage stabilizing chip LM1085-3.3V in that synchronous device is inner; Working power in main control system inside as arm processor chip S3C6410, WRD12S12-10W exports as the radio station working power.

7. system according to claim 1 is characterized in that wave detector is simple component moving-coil type seismic sensor or simple component MEMS acceleration transducer.

8. system according to claim 7, each branch's acquisition station connects 12 wave detectors.

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