CN102541797B

CN102541797B - Realizing method and system supporting multiple main machine interfaces

Info

Publication number: CN102541797B
Application number: CN201010576615.0A
Authority: CN
Inventors: 田泽; 郭蒙; 赵强; 廖寅龙; 蔡叶芳
Original assignee: AVIC No 631 Research Institute
Current assignee: Xian Xiangteng Microelectronics Technology Co Ltd
Priority date: 2010-12-07
Filing date: 2010-12-07
Publication date: 2015-04-15
Anticipated expiration: 2030-12-07
Also published as: CN102541797A

Abstract

The invention relates to a realizing method and system for supporting multiple main machine interfaces. The realizing system comprises a coding module used for coding the main machine interfaces, a timing sequence translation module used for carrying out timing sequence translation on the coded main machine interfaces to obtain storage interface signals, and an output module used for outputting the storage interface signals, wherein the coding module, the timing sequence translation module and the output module are sequentially connected. The realizing method and system for supporting the multiple main machine interfaces, provided by the invention, have the advantages of simpleness, strong transportability and wide application range, is easy and feasible, and operation is simplified.

Description

A kind of implementation method and system thereof supporting multiple host interface

Technical field

The invention belongs to computer realm, relate to a kind of implementation method and the system thereof of supporting multiple host interface.

Background technology

In avionics system, what the data bus of 1553B bus interface module and main-machine communication was conventional has LBE-486, LBE-PPC, VME, PCI/PCI-E bridge local bus etc.Traditional solution is: for different applied environments, designs different interface circuits, and which design is loaded down with trivial details, repetition, the problems such as portable difference.

Summary of the invention

In order to solve the above-mentioned technical matters existed in background technology, the invention provides a kind of simple, simplify the operation, the implementation method of the multiple host interface of support of portable strong and applied range and system thereof.

Technical solution of the present invention is: the invention provides a kind of implementation method supporting multiple host interface, its special character is: said method comprising the steps of:

1) host interface is encoded;

2) timing conversion is carried out to the host interface of coding and obtain general purpose memory interface signal;

3) by step 2) signal that obtains exports.

Above-mentioned steps 2) specific implementation be:

2.1) host interface type is judged;

2.2) timing conversion is carried out according to host interface type selecting state machine.

Above-mentioned host interface is one or more.

When above-mentioned host interface is multiple, what described Host Type was corresponding is also multiple.

Above-mentioned Host Type is 486, PowerPC, VME or PCI.

That supports multiple host interface realizes a system, and its special character is: the system that realizes of the multiple host interface of described support comprises coding module for encoding to host interface, for carrying out the timing conversion module that timing conversion is memory interface signal and the output module exported for signal to the host interface of coding; Described coding module, timing conversion module and output module connect successively.

Advantage of the present invention is: the invention provides a kind of implementation method and the system thereof of supporting multiple host interface, the method, by multiple interfaces multiplexed address bus, data bus and the control bus in circuit, controls to realize the difference in functionality of bus under distinct interface by wire jumper.Adopt the configuration of pin wire jumper, complete the access support to four kinds of host interface such as LBE-486, LBE-PPC, VME, PCI/PCI-E bridge local buss, there is simple workable advantage, simultaneously, method and system provided by the present invention can extensively be widely used in various different hosted environment, very easy to use.There is provided a kind of multiplexing circuit structure supporting four kinds of conventional host interface, the circuit design of unified different application, simplifies logical design workload.

Accompanying drawing explanation

Fig. 1 is system chart provided by the present invention;

Fig. 2 is the preferred embodiment structural representation of system provided by the present invention.

Embodiment

The invention provides a kind of implementation method supporting multiple host interface, the method comprises the following steps:

1) host interface is encoded;

2) timing conversion is carried out to the host interface of coding and obtains electric signal:

2.1) host interface type is judged;

3) by step 2) electric signal that obtains exports.

Host interface can be one or more, and when host interface is multiple, what Host Type was corresponding is also multiple, and Host Type is 486, PowerPC, VME or PCI.

See Fig. 1, the present invention is while the implementation method of multiple host interface that provides support, additionally provide a kind of support multiple host interface realize system, this system comprises coding module for encoding to host interface, for carrying out the timing conversion module that timing conversion obtains electric signal and the output module exported for electric signal to the host interface of coding; Coding module, timing conversion module and output module connect successively.Timing conversion module is one or more.

Specifically, the present invention relates to a kind of interface circuit supporting multiple host access storer, the present invention adopts pin wire jumper to configure, and completes the access support to LBE-486, LBE-PPC, VME, PCI/PCI-E bridge local bus four kinds of host interface.The invention solves the access problem of dissimilar host interface.

Interface circuit provided by the present invention mainly contains hi and mode and out_sel tri-modules, hi interface logic carries out signal multiplexing to the access logic of four kinds of main frames, according to the value of mode module output signal, selecting the inner Different Logic unit of hi to carry out work, is memory access sequential by host interface timing conversion; The control of mode module in charge host interface working method is selected; Out_sel selects the output of hi according to the output of mode.

Mode_sel value is different, selects different host interface working methods:

(1) mode_sel is " 00 ", and host interface is operated in 486LBE mode;

(2) mode_sel is " 01 ", and host interface is operated in PowerPC LBE mode;

(3) mode_sel is " 10 ", and host interface is operated in VME mode;

(4) mode_sel is " 11 ", and host interface is operated in PCI/PCI-E bridge local bus mode;

(5) different sequential is changed into the synchronous memories accessing time sequence of standard by hi module.

Below the present invention is described in further details.See Fig. 2,

This part realizes host interface read-write operation to twoport under different modes.The accessing time sequence of twoport realizes by IDT7025 sequential temporarily.

Mode module (coding module) has two input signals, four output signals.Four output signals are connected to hi and out_sel two modules simultaneously, and four output signals are selected to control for selecting the output of the timing conversion module in hi and out_sel module (output module).Four timing conversion modules are comprised, respectively corresponding 4 kinds of host interface in hi module (timing conversion module).Timing conversion between the host interface that four timing conversion module in charge are concrete and memory interface.If the mode module output signal of correspondence is effective, then one of them timing conversion module is selected to carry out work.The input/output signal of host interface is converted to the input/output signal of memory interface by timing conversion module.Input signal from host interface can be input to each timing conversion module, output after conversion is delivered to out_sel module by timing conversion module, under the mode module output signal of correspondence controls, specific output is selected to pass out to memory interface by out_sel.Otherwise, the input signal of memory module can be input to each timing conversion module, output after conversion is delivered to out_sel module by timing conversion module, under the mode module output signal of correspondence controls, selects specific output to pass out to host interface by out_sel.

Work as mode_sel1=0, during mode_sel0=0, it is effective that mode module exports sel_lbe_486 signal, and 486 timing conversion module work, other timing conversion modules do not work.Out_sel model choice exports from 486 timing conversion module by signal.

Work as mode_sel1=0, during mode_sel0=1, it is effective that mode module exports sel_lbe_ppc signal, and ppc timing conversion module work, other timing conversion modules do not work.Out_sel model choice exports from ppc timing conversion module by signal.

Work as mode_sel1=1, during mode_sel0=0, it is effective that mode module exports sel_vme signal, and vme timing conversion module work, other timing conversion modules do not work.Out_sel model choice exports from vme timing conversion module by signal.

Work as mode_sel1=1, during mode_sel0=1, it is effective that mode module exports sel_pci signal, and pci timing conversion module work, other timing conversion modules do not work.Out_sel model choice exports from pci timing conversion module by signal.

Claims

1. support an implementation method for multiple host interface, it is characterized in that: said method comprising the steps of:

1) pin line transfer mode is adopted to encode to host interface; Described host interface is one or more;

2) timing conversion is carried out to the host interface of coding and obtains general purpose memory interface signal:

2.1) host interface type is judged;

2.2) timing conversion is carried out according to host interface type selecting state machine;

When described host interface is multiple, what described Host Type was corresponding is also multiple; Described Host Type is 486, PowerPC, VME or PCI;

3) by step 2) signal that obtains exports.

2. realize a system for what realize the multiple host interface of support of the implementation method of the multiple host interface of support according to claim 1, it is characterized in that: the system that realizes of the multiple host interface of described support comprises coding module for encoding to host interface, for carrying out the timing conversion module that timing conversion obtains memory interface signal and the output module exported for memory interface signal to the host interface of coding; Described coding module, timing conversion module and output module connect successively.