[go: up one dir, main page]

CN102541702A - Test method for automatically restarting mainboard and recording debug data and restarting device thereof - Google Patents

Test method for automatically restarting mainboard and recording debug data and restarting device thereof Download PDF

Info

Publication number
CN102541702A
CN102541702A CN2010106143640A CN201010614364A CN102541702A CN 102541702 A CN102541702 A CN 102541702A CN 2010106143640 A CN2010106143640 A CN 2010106143640A CN 201010614364 A CN201010614364 A CN 201010614364A CN 102541702 A CN102541702 A CN 102541702A
Authority
CN
China
Prior art keywords
motherboard
power
data
debugging
debug
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN2010106143640A
Other languages
Chinese (zh)
Inventor
邓进利
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Elitegroup Computer Systems Co Ltd
Original Assignee
Elitegroup Computer Systems Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Elitegroup Computer Systems Co Ltd filed Critical Elitegroup Computer Systems Co Ltd
Priority to CN2010106143640A priority Critical patent/CN102541702A/en
Publication of CN102541702A publication Critical patent/CN102541702A/en
Pending legal-status Critical Current

Links

Images

Landscapes

  • Debugging And Monitoring (AREA)

Abstract

A test method for automatically restarting motherboard and recording debug data and a restart device thereof are provided. The testing method comprises the steps of setting startup and shutdown parameters, starting up at least one mainboard, accumulating the startup times of the mainboard, reading debug data generated when the mainboard is started up, judging whether the mainboard is restarted or not according to the debug data and the startup and shutdown parameters, and generating startup and shutdown testing data according to the debug data and the startup times.

Description

自动重启主机板及记录除错数据的测试方法及其重启装置Test method for automatically restarting mainboard and recording debugging data and restarting device thereof

技术领域 technical field

本发明涉及一种测试方法及其重启装置,特别是涉及一种自动重启主机板以及记录相关除错数据的测试方法及其重启装置  The present invention relates to a test method and a restart device thereof, in particular to a test method for automatically restarting a motherboard and recording relevant debugging data and a restart device thereof

背景技术 Background technique

一般而言,为了确保主机板的重启动流程的运作稳定性,主机板在出厂前往往需要经过上千次的开关机测试,其常见的测试方法采用人工手动开关机并记录相关测试数据的方式来进行,但是此种方法会导致费时费工的检测时程。因此,外接一重启动卡以自动执行主机板开关机测试的设计因应而生,如台湾专利I270782号披露的一种重启动卡及其决定测试重启动机制时机的方法,其相关装置设计如图1所示,其为现有技术的一重启动卡10的功能方块示意图。重启动卡10包含一检测单元12、计数单元14以及一重置单元16。检测单元12用于检测基本输入输出系统(Basic Input Output System,BIOS)所存取完成码的输入/输出端口,当检测单元12检测到输入/输出端口存取有该完成码时,即代表计算机系统已完成开机程序,此时检测单元12发出一第一信号至计数单元14,驱动计数单元14计数时间至设定时间值后,发出一第二信号至重置单元16,驱动重置单元16执行冷开机重启机制,即藉由重置单元16先短路主机板的一电源钮脚位数秒,使主机板的系统芯片切断电源供应,之后重置单元16再一次短路电源钮脚位,即可供应电源并重新执行基本输入输出系统进行开机。另一方面,若是,计算机系统未执行完所有开机程序,即呈死机状态,则将不会驱使重启动卡10测试主机板的冷开机重启机制,以供测试人员获知开机失败状态,进行分析解决。  Generally speaking, in order to ensure the operation stability of the restart process of the motherboard, the motherboard often needs to go through thousands of power-on and power-off tests before leaving the factory. The common test method is manual power-on and power-off and recording relevant test data. to carry out, but this method will lead to time-consuming and labor-intensive detection schedule. Therefore, the design of connecting an external reset card to automatically execute the power-on/off test of the mainboard was born accordingly. For example, a reset card disclosed in Taiwan Patent No. I270782 and a method for determining the timing of testing the restart mechanism. The related device design is shown in Figure 1 As shown, it is a schematic functional block diagram of a restart card 10 in the prior art. The restart card 10 includes a detection unit 12 , a counting unit 14 and a reset unit 16 . The detection unit 12 is used to detect the input/output port of the completion code accessed by the basic input output system (Basic Input Output System, BIOS). When the detection unit 12 detects that the completion code is accessed by the input/output port, it represents the computer The system has completed the start-up procedure. At this time, the detection unit 12 sends a first signal to the counting unit 14, drives the counting unit 14 to count the time to the set time value, sends a second signal to the reset unit 16, and drives the reset unit 16 Execute the cold boot restart mechanism, that is, first short-circuit a power button pin of the main board by the reset unit 16 for a few seconds, so that the system chip of the main board cuts off the power supply, and then the reset unit 16 short-circuits the power button pin again. Apply power and execute the BIOS again to start up. On the other hand, if, computer system has not carried out all start-up programs, promptly is dead state, then will not drive the restarting card 10 to test the cold-boot restarting mechanism of mainboard, for the tester to know the start-up failure state, analyze and solve . the

然而,由上述可知,于现有技术中,即使改采用一外接重启动卡以取代手动开关机测试流程,在计算机死机时,仍然只能手动重新启动主机板。除此之外,于主机板执行开机时所产生的除错数据亦仅能利用人工记录方式以进行测试分析,如此亦会为测试人员带来诸多的不便。  However, as can be seen from the above, in the prior art, even if an external restart card is used to replace the manual power-on/off test process, when the computer crashes, the main board can only be restarted manually. In addition, the debugging data generated when the motherboard is powered on can only be manually recorded for testing and analysis, which will also bring a lot of inconvenience to testers. the

发明内容 Contents of the invention

因此,本发明提供一种自动重启主机板以及记录相关除错数据的测试方法及其相关重启装置,以解决上述的问题。  Therefore, the present invention provides a test method for automatically restarting the mainboard and recording related debugging data and a related restarting device to solve the above-mentioned problems. the

本发明提供一种自动重启主机板以及记录相关除错数据的测试方法,其包含设定开关机参数;启动至少一主机板;累加该主机板的启动次数;读取该主机板执行开机时所产生的一除错数据;根据该除错数据以及该开关机参数判断是否重启该主机板;以及根据该除错数据以及该启动次数产生一开关机测试数据。  The present invention provides a test method for automatically restarting a main board and recording relevant debugging data, which includes setting power-on and off parameters; starting at least one main board; accumulating the number of startup times of the main board; generating a debug data; judging whether to restart the motherboard according to the debug data and the power-on/off parameters; and generating power-on/off test data according to the debug data and the startup times. the

本发明还提供一种可自动重启主机板以及记录相关除错数据的重启装置,其包含一设定接口,其用来设定对应至少一主机板的开关机参数;一总线传输接口,其用来电连接于该主机板的一输入输出系统单元以及一电源接脚;以及一可编程芯片,其电连接于该总线传输接口以及该设定接口,该可编程芯片包含一开关机控制单元,其用来重启该主机板;一计数单元,其用来计算该主机板的启动次数;一除错运算单元,其用来经由该总线传输接口读取该主机板执行开机时所产生的一除错数据以及根据该除错数据以及该开关机参数判断是否控制该开关机控制单元重启该主机板;以及一记录单元,其用来根据该除错数据以及该启动次数产生一开关机测试数据。  The present invention also provides a reset device capable of automatically restarting the mainboard and recording related debugging data, which includes a setting interface for setting on-off parameters corresponding to at least one mainboard; a bus transmission interface for Incoming electricity is connected to an input and output system unit and a power supply pin of the motherboard; and a programmable chip, which is electrically connected to the bus transmission interface and the setting interface, and the programmable chip includes a switch control unit, which Used to restart the main board; a counting unit, which is used to count the number of startups of the main board; a debugging operation unit, which is used to read a debugging generated when the main board executes booting through the bus transmission interface data and judging whether to control the power-on/off control unit to restart the motherboard according to the debug data and the power-on/off parameters; the

相较于现有技术,本发明改利用可编程芯片读取主机板开机时所产生的除错数据以及比对开关机时间,以作为重启主机板的判断依据以及产生相对应的开关机测试数据,因此,无论主机板是否完成开机程序或是处于死机状态,本发明所提供的重启装置均可自动重启主机板。如此一来,不仅可大大地缩减主机板的开关机稳定性检测时程,同时亦可帮助使用者不需人工记录,即可直接且清楚地得知主机板经过重复开关机后的统计数据,并可根据死机时所产生的除错码或死机画面进行相对应的死机问题排除。  Compared with the prior art, the present invention uses a programmable chip to read the debugging data generated when the mainboard is turned on and compares the power-on and off time, as a judgment basis for restarting the mainboard and to generate corresponding power-on and power-off test data Therefore, no matter whether the main board completes the boot process or is in a dead state, the restart device provided by the present invention can automatically restart the main board. In this way, it can not only greatly reduce the power-on/off stability detection time of the main board, but also help users to directly and clearly know the statistical data of the main board after repeated power-on and power-off without manual recording. And according to the debug code or crash screen generated when the system crashes, corresponding crash problems can be eliminated. the

附图说明 Description of drawings

图1为现有技术的重启动卡的功能方块示意图。  FIG. 1 is a functional block diagram of a restart card in the prior art. the

图2为本发明一较佳实施例的重启装置电连接于主机板的示意图。  FIG. 2 is a schematic diagram of a reset device electrically connected to a motherboard according to a preferred embodiment of the present invention. the

图3为图2所示的重启装置的功能方块图。  FIG. 3 is a functional block diagram of the restarting device shown in FIG. 2 . the

图4为本发明一较佳实施例的利用图2所示的重启装置自动重启主机板 以及记录相关除错数据的方法的流程图。  Fig. 4 is a flow chart of a method for automatically restarting a mainboard and recording relevant debugging data using the restarting device shown in Fig. 2 in a preferred embodiment of the present invention. the

附图符号说明  Description of reference symbols

10重启动卡           12检测单元  10 restart card 12 detection unit

14计数单元           16重置单元  14 counting unit 16 reset unit

100重启装置          102主机板  100 restart device 102 motherboard

104设定接口          106总线传输接口  104 setting interface 106 bus transmission interface

108影像撷取接口      110可编程芯片  108 image capture interfaces 110 programmable chips

112显示装置          114输入输出系统单元  112 display device 114 input and output system unit

116电源接脚          118影像输出接口  116 power pins 118 video output interface

120开关机控制单元    122计数单元  120 switch machine control unit 122 counting unit

124除错运算单元      126记录单元  124 debugging operation unit 126 recording unit

128储存接口          130切换接口  128 storage interfaces 130 switching interfaces

步骤400、402、404、406、408、410、412、414、416  Steps 400, 402, 404, 406, 408, 410, 412, 414, 416

具体实施方式 Detailed ways

请参阅图2,其为本发明一较佳实施例的一重启装置100电连接于一主机板102的示意图。重启装置100包含一设定接口104、一总线传输接口106、一影像撷取接口108、一可编程芯片110,以及一显示装置112。设定接口104电连接于可编程芯片110且用来设定对应主机板102的开关机参数,如主机板102的开关机时间预设值、开关机测试次数等,其中在此实施例中,设定接口104较佳地为常见的机械式设定按钮的组合,如Start、+、-、Stop等,以供使用者按压设定。总线传输接口106较佳地为一通用输入输出(General Purpose Input/Output,GPIO)传输接口,其用来电连接于主机板102的一输入输出系统单元114以及一电源接脚116,其中总线传输接口106与输入输出系统单元114的数据传输可藉由以排线连接或是以金手指插入的方式安装于主机板102上的一数据传输插槽(如周边组件互连总线插槽(PCI)插槽、高速周边组件互连总线插槽(PCI-E)插槽、低接脚数量架构(LPC)总线)来实现。影像撷取接口108电连接于可编程芯片110且用来电连接于主机板102的一影像输出接口118,藉以撷取对应主机板102的死机画面,其较佳地为一视讯图形阵列(Video Graphics Array,VGA)接头。显示装置112 电连接于可编程芯片110且用来显示可编程芯片110所读取到的主机板102的输入输出系统单元114执行开机自我测试(Power On SelfTest,POST)时所产生的除错码数据,以允许使用者可清楚地得知主机板102的开机除错历程,其中,输入输出系统单元114可利用一基本输入输出系统或一统一可扩展固件接口(Unified Extensible Firmware Interface,UEFI)来执行开机自我测试。  Please refer to FIG. 2 , which is a schematic diagram of a reset device 100 electrically connected to a motherboard 102 according to a preferred embodiment of the present invention. The restart device 100 includes a setting interface 104 , a bus transmission interface 106 , an image capture interface 108 , a programmable chip 110 , and a display device 112 . The setting interface 104 is electrically connected to the programmable chip 110 and is used to set the power-on/off parameters of the corresponding motherboard 102, such as the preset value of the power-on/off time of the motherboard 102, the number of times of power-on/off tests, etc., wherein in this embodiment, The setting interface 104 is preferably a combination of common mechanical setting buttons, such as Start, +, -, Stop, etc., for the user to press for setting. The bus transmission interface 106 is preferably a general purpose input/output (General Purpose Input/Output, GPIO) transmission interface, which is used to electrically connect an input and output system unit 114 and a power supply pin 116 of the motherboard 102, wherein the bus transmission interface The data transmission between 106 and the I/O system unit 114 can be installed on a data transmission slot (such as a peripheral component interconnect bus slot (PCI) slot) on the motherboard 102 by connecting with a cable or inserting a golden finger. Slot, Peripheral Component Interconnect Express (PCI-E) slot, Low Pin Count Architecture (LPC) bus). The image capture interface 108 is electrically connected to the programmable chip 110 and is used to electrically connect to an image output interface 118 of the mainboard 102, so as to capture the crash picture corresponding to the mainboard 102, which is preferably a video graphics array (Video Graphics Array, VGA) connector. The display device 112 is electrically connected to the programmable chip 110 and is used to display the debug code generated when the input and output system unit 114 of the motherboard 102 read by the programmable chip 110 executes the Power On Self Test (POST). data, so that the user can clearly know the booting and debugging process of the motherboard 102, wherein the I/O system unit 114 can utilize a basic input and output system or a unified extensible firmware interface (Unified Extensible Firmware Interface, UEFI) to Perform the POST. the

于此针对可编程芯片110的设计进行说明,请参阅图3,其为图2所示的重启装置100的功能方块图。可编程芯片110较佳地为一场域可编程逻辑门阵列(Field Programmable Gate Array,FPGA)芯片,其电连接于设定接口104、总线传输接口106、影像撷取接口108,以及显示装置112,并且包含一开关机控制单元120、一计数单元122、一除错运算单元124及一记录单元126。开关机控制单元120用来重启主机板102。计数单元122用来计算主机板102的启动次数。除错运算单元124用来经由总线传输接口106读取主机板102执行开机时所产生的除错数据及根据该除错数据与该开关机参数判断是否控制开关机控制单元120重启主机板102。记录单元126用来根据该除错数据及该启动次数产生一开关机测试数据,以供使用者进行后续检测分析之用。  The design of the programmable chip 110 is described here, please refer to FIG. 3 , which is a functional block diagram of the reset device 100 shown in FIG. 2 . The programmable chip 110 is preferably a Field Programmable Gate Array (Field Programmable Gate Array, FPGA) chip, which is electrically connected to the setting interface 104, the bus transmission interface 106, the image capture interface 108, and the display device 112 , and includes a power-on/off control unit 120 , a counting unit 122 , a debugging unit 124 and a recording unit 126 . The power-on control unit 120 is used to restart the motherboard 102 . The counting unit 122 is used for counting the startup times of the motherboard 102 . The debugging calculation unit 124 is used to read the debugging data generated when the motherboard 102 is powered on via the bus transmission interface 106 and judge whether to control the power-on/off control unit 120 to restart the motherboard 102 according to the debugging data and the startup parameters. The recording unit 126 is used to generate a power-on/off test data according to the debugging data and the startup times, so as to be used for subsequent detection and analysis by the user. the

值得一提的是,重启装置100还包含一储存接口128,其电连接于可编程芯片110且较佳地为一存储卡插槽,用以传送该开关机测试数据至一储存媒体,如安全数码(Secure Digital,SD)存储卡等。除此之外,本发明所提供的重启装置100亦可应用于多个主机板的开关机测试,在此应用中,重启装置100可进一步地包含一切换接口130,其电连接于可编程芯片110且可较佳地为一组包含18个指拨开关的操作接口,藉以达到以同时多工的方式进行可编程芯片110对不同主机板的重启测试的目的。以下针对重启装置100自动重启单一主机板102以及记录相关除错数据的流程步骤进行详细说明,至于在测试多个主机板的开关机方面,其可根据以下说明以此类推,故于此不再赘述。  It is worth mentioning that the restart device 100 also includes a storage interface 128, which is electrically connected to the programmable chip 110 and is preferably a memory card slot for transmitting the power-on/off test data to a storage medium, such as a safe Digital (Secure Digital, SD) memory card, etc. In addition, the restart device 100 provided by the present invention can also be applied to the power-on/off test of multiple motherboards. In this application, the restart device 100 can further include a switching interface 130, which is electrically connected to the programmable chip 110 may preferably be a group of operation interfaces including 18 dip switches, so as to achieve the purpose of performing the restart test of the programmable chip 110 on different motherboards in a simultaneous multiplex manner. The process steps for automatically restarting a single mainboard 102 and recording related debugging data by the restarting device 100 will be described in detail below. As for testing the switching on and off of multiple mainboards, it can be deduced according to the following description, so it will not be repeated here. repeat. the

请参阅图2、图3以及图4,图4为本发明一较佳实施例的利用图2所示的重启装置100自动重启主机板102以及记录相关除错数据的方法的流程图。若是想要使用重启装置100以进行主机板102的开关机测试,首先需使用设定接口128进行开关机参数的设定(步骤400),其为进行对应主机板 102的开机时间预设值以及关机时间预设值的设定。接着,使用者即可利用开关机控制单元120以启动主机板102,也就是步骤402,而其步骤402的执行可在使用者按压设定接口104中所包含的Start按钮后触发,其中,启动主机板102的方式可采用常见的冷开机的方式,也就是可利用总线传输接口106与电源接脚116的耦接并以电路短路的方式控制主机板102的开关机。  Please refer to FIG. 2 , FIG. 3 and FIG. 4 . FIG. 4 is a flowchart of a method for automatically rebooting the mainboard 102 and recording related debugging data by using the rebooting device 100 shown in FIG. 2 according to a preferred embodiment of the present invention. If you want to use the restart device 100 to perform the power-on/off test of the mainboard 102, you first need to use the setting interface 128 to set the power-on/off parameters (step 400), which is to carry out the preset value of the power-on time of the corresponding mainboard 102 and Shutdown time preset value setting. Then, the user can use the switch control unit 120 to start the motherboard 102, which is step 402, and the execution of step 402 can be triggered after the user presses the Start button included in the setting interface 104, wherein the start The main board 102 can adopt a common cold boot method, that is, the bus transmission interface 106 can be coupled with the power pin 116 to control the power on and off of the main board 102 by means of a short circuit. the

在启动主机板102之后,计数单元404就会计算主机板102的启动次数(步骤404),而除错运算单元124会读取主机板102执行开机时所产生的除错数据(步骤406),此处所提及的除错数据可较佳地包含经由总线传输接口106与输入输出系统单元114的耦接所读取到的该除错码数据,以及若是操作系统出错时所产生的死机画面(如Windows的蓝色死机画面),该除错码数据可经由显示装置112显示的,而上述死机画面则是可被影像撷取接口108所撷取并经由记录单元126存入该开关机测试数据中,藉以允许使用者可通过该开关机测试数据同时得知输入输出系统单元114以及操作系统的开机错误。  After the mainboard 102 is started, the counting unit 404 will count the number of startup times of the mainboard 102 (step 404), and the debugging operation unit 124 will read the debugging data generated when the mainboard 102 executes booting (step 406), The debug data mentioned here may preferably include the debug code data read through the connection between the bus transmission interface 106 and the I/O system unit 114, as well as the crash screen generated when the operating system fails (such as the blue crash screen of Windows), the debug code data can be displayed through the display device 112, and the above crash screen can be captured by the image capture interface 108 and stored in the power-on/off test via the recording unit 126 In the data, the user is allowed to know the booting errors of the I/O system unit 114 and the operating system simultaneously through the power-on/off test data. the

接下来,除错运算单元124就会判断该除错码数据内的一除错码的检测累加次数是否大于一特定值(步骤408)。举例来说,假设该特定值设定为5次,若是某一除错码(如3C)的检测累加次数大于5次,则除错运算单元124会判断主机板102处于死机状态,因此,就会执行步骤412;反之,则接着执行步骤410,意即接着检测所读取到的该除错码数据是否具有一除错完成码(如00)以及主机板102的实际开机时间是否大于或等于该开机时间预设值(如15秒),若无,则表示主机板102尚未完成开机程序,则就会再次执行步骤408,如此循环,直到检测到该除错完成码以及主机板102的实际开机时间大于或等于该开机时间预设值或是判断出主机板102处于死机状态为止。  Next, the debug calculation unit 124 determines whether the accumulated number of detections of a debug code in the debug code data is greater than a specific value (step 408 ). For example, assuming that the specific value is set to 5 times, if the cumulative number of detections of a certain debugging code (such as 3C) is greater than 5 times, then the debugging operation unit 124 will judge that the motherboard 102 is in a shutdown state, and therefore, Step 412 will be executed; otherwise, step 410 will be executed next, which means to detect whether the read debug code data has a debug completion code (such as 00) and whether the actual power-on time of the motherboard 102 is greater than or equal to The boot time preset value (such as 15 seconds), if there is no, it means that the main board 102 has not completed the boot process, and then step 408 will be executed again, and so on, until the debug completion code and the actual status of the main board 102 are detected. The power-on time is greater than or equal to the preset value of the power-on time or until it is determined that the motherboard 102 is in a dead state. the

当检测到该除错完成码以及主机板102的实际开机时间大于或等于该开机时间预设值时,除错运算单元124同样地也会执行步骤412,也就是记录单元416就会根据该除错数据以及该启动次数产生相对应本次测试的该开关机测试数据,如利用“启动次数”及“对应的除错码”的字段表列以产生统计数据,以允许使用者可清楚地得知主机板102于本次测试中是正常地完成开机程序还是处于死机状态,同时也可允许使用者根据死机时所产生的除错码进行相对应的死机问题排除。  When it is detected that the debugging completion code and the actual power-on time of the motherboard 102 are greater than or equal to the preset value of the power-on time, the debugging operation unit 124 will also perform step 412, that is, the recording unit 416 will perform the step 412 according to the Error data and the number of startups generate the power-on/off test data corresponding to this test, such as using the fields of "number of startups" and "corresponding debug code" to generate statistical data, so that users can clearly get It is known whether the motherboard 102 has normally completed the boot process or is in a crash state in this test, and also allows the user to eliminate the corresponding crash problem according to the debug code generated when the crash occurs. the

最后在再次启动主机板102方面,在完成该开关机测试数据的纪录后,除错运算单元124就会控制开关机控制单元120关闭主机板102(步骤414)并开始执行步骤416,也就是检测该除错码数据是否具有一关机除错码(如FF)以及判断主机板102的实际关机时间是否大于或等于该关机时间预设值(如5秒)。在步骤414中,若是无法检测到该关机状态码以及判断出主机板102的实际关机时间小于该关机时间预设值,则代表主机板102并没有顺利地完成关机程序,因此除错运算单元124就会再次执行步骤414以关闭主机板102,直到检测到该关机除错码以及判断出主机板102的实际关机时间大于或等于该关机时间预设值为止。此时,除错运算单元124即可判断出主机板102已完成关机程序,如此一来,除错运算单元124接着再次执行步骤402,藉以开始下一次的开关机测试,如此循环,直到达到使用者所设定的测试次数为止。  Finally, in restarting the motherboard 102, after completing the recording of the power-on/off test data, the debugging operation unit 124 will control the power-on/off control unit 120 to shut down the motherboard 102 (step 414) and start to execute step 416, which is to detect Whether the debug code data has a shutdown debug code (such as FF) and determine whether the actual shutdown time of the motherboard 102 is greater than or equal to the preset value of the shutdown time (such as 5 seconds). In step 414, if the shutdown status code cannot be detected and the actual shutdown time of the mainboard 102 is determined to be less than the preset shutdown time, it means that the mainboard 102 has not successfully completed the shutdown procedure, so the debugging operation unit 124 Step 414 will be executed again to shut down the motherboard 102 until the shutdown debug code is detected and the actual shutdown time of the motherboard 102 is determined to be greater than or equal to the preset shutdown time. At this point, the debugging operation unit 124 can judge that the mainboard 102 has completed the shutdown procedure, so that the debugging operation unit 124 then executes step 402 again, so as to start the next power-on test, and so on, until reaching the use up to the number of tests set by the operator. the

相较于现有技术,本发明改利用可编程芯片读取主机板开机时所产生的除错数据以及比对开关机时间,以作为重启主机板的判断依据以及产生相对应的开关机测试数据,因此,无论主机板是否完成开机程序或是处于死机状态,本发明所提供的重启装置均可自动重启主机板。如此一来,不仅可大大地缩减主机板的开关机稳定性检测时程,同时亦可帮助使用者不需人工记录,即可直接且清楚地得知主机板经过重复开关机后的统计数据,并可根据死机时所产生的除错码或死机画面进行相对应的死机问题排除。  Compared with the prior art, the present invention uses a programmable chip to read the debugging data generated when the mainboard is turned on and compares the power-on and off time, as a judgment basis for restarting the mainboard and to generate corresponding power-on and power-off test data Therefore, no matter whether the main board completes the boot process or is in a dead state, the restart device provided by the present invention can automatically restart the main board. In this way, it can not only greatly reduce the power-on/off stability detection time of the main board, but also help users to directly and clearly know the statistical data of the main board after repeated power-on and power-off without manual recording. And according to the debug code or crash screen generated when the system crashes, corresponding crash problems can be eliminated. the

以上所述仅为本发明的较佳实施例,凡依本发明的权利要求所做的均等变化与修饰,皆应属本发明的涵盖范围。  The above descriptions are only preferred embodiments of the present invention, and all equivalent changes and modifications made according to the claims of the present invention shall fall within the scope of the present invention. the

Claims (10)

1.一种自动重启主机板以及记录相关除错数据的测试方法,其特征在于,包含:1. A test method for automatically restarting mainboard and recording relevant debugging data, characterized in that, comprising: 设定开关机参数;Set switch parameters; 启动至少一主机板;start at least one motherboard; 累加该主机板的启动次数;Accumulate the startup times of the motherboard; 读取该主机板执行开机时所产生的一除错数据;reading a debug data generated when the motherboard executes booting; 根据该除错数据以及该开关机参数判断是否重启该主机板;以及judging whether to restart the motherboard according to the debugging data and the power-on parameters; and 根据该除错数据以及该启动次数产生一开关机测试数据。A power-on/off test data is generated according to the debugging data and the startup times. 2.如权利要求1所述的测试方法,其特征在于,读取该主机板执行开机时所产生的该除错数据包含读取该主机板的一基本输入输出系统、一统一可扩展固件接口执行开机自我测试时或一死机画面所产生的一除错码数据。2. The testing method according to claim 1, wherein reading the debug data generated when the mainboard is powered on comprises reading a basic input output system and a unified extensible firmware interface of the mainboard A debug code data generated during POST or a freeze screen. 3.如权利要求2所述的测试方法,其特征在于,根据该除错数据以及该开关机参数判断是否重启该主机板包含:3. The testing method according to claim 2, wherein judging whether to restart the motherboard according to the debug data and the power-on/off parameters comprises: 当判断该除错码数据中的一除错码的检测累加次数大于一特定值时,关闭该主机板。When it is judged that the accumulated detection times of a debug code in the debug code data is greater than a specific value, the motherboard is turned off. 4.如权利要求2所述的测试方法,其特征在于,设定该开关机参数包含设定该主机板的一开机时间预设值,根据该除错数据以及该开关机参数判断是否重启该主机板包含:4. The test method according to claim 2, wherein setting the power-on parameter includes setting a preset value of power-on time of the mainboard, and judging whether to restart the motherboard according to the debugging data and the power-on parameter. Motherboard contains: 当检测到该除错码数据具有一除错完成码以及判断该主机板的实际开机时间大于或等于该开机时间预设值时时,关闭该主机板。When detecting that the debug code data has a debug completion code and judging that the actual boot time of the motherboard is greater than or equal to the preset value of the boot time, the motherboard is turned off. 5.如权利要求2所述的测试方法,其特征在于,设定该开关机参数包含设定该主机板的一关机时间预设值,根据该除错数据以及该开关机参数判断是否重启该主机板包含:5. The test method according to claim 2, wherein setting the power-on parameter includes setting a preset value of a power-off time of the mainboard, and judging whether to restart the power-on system according to the debugging data and the power-on parameter. Motherboard contains: 当检测到该除错码数据具有一关机状态码以及判断该主机板的实际关机时间大于或等于该关机时间预设值时,启动该主机板。When it is detected that the debug code data has a shutdown state code and the actual shutdown time of the motherboard is determined to be greater than or equal to the preset value of the shutdown time, the motherboard is activated. 6.一种可自动重启主机板以及记录相关除错数据的重启装置,其特征在于,包含:6. A reset device capable of automatically restarting the motherboard and recording relevant debugging data, characterized in that it comprises: 一设定接口,其用来设定对应至少一主机板的开关机参数;A setting interface, which is used to set the power-on/off parameters corresponding to at least one motherboard; 一总线传输接口,其用来电连接于该主机板的一输入输出系统单元以及一电源接脚;a bus transmission interface, which is used to electrically connect an input and output system unit and a power pin of the motherboard; 一可编程芯片,其电连接于该总线传输接口以及该设定接口,该可编程芯片包含:A programmable chip, which is electrically connected to the bus transmission interface and the setting interface, the programmable chip includes: 一开关机控制单元,其用来重启该主机板;A switch control unit, which is used to restart the motherboard; 一计数单元,其用来计算该主机板的启动次数;a counting unit, which is used to count the number of startup times of the motherboard; 一除错运算单元,其用来通过该总线传输接口读取该主机板执行开机时所产生的一除错数据以及根据该除错数据以及该开关机参数判断是否控制该开关机控制单元重启该主机板;及A debugging operation unit, which is used to read a debugging data generated when the main board executes startup through the bus transmission interface, and judge whether to control the switching control unit to restart the computer according to the debugging data and the switching parameters. motherboard; and 一记录单元,其用来根据该除错数据以及该启动次数产生一开关机测试数据;以及a recording unit, which is used to generate a power-on/off test data according to the debug data and the startup times; and 一影像撷取接口,其电连接于该可编程芯片,该影像撷取接口用来撷取该主机板的一死机画面。An image capture interface is electrically connected to the programmable chip, and the image capture interface is used to capture a crash screen of the motherboard. 7.如权利要求6所示的重启装置,其特征在于,该除错运算单元用来读取该主机板的一基本输入输出系统或一统一可扩展固件接口执行开机自我测试时所产生的一除错码数据。7. The restarting device as claimed in claim 6, wherein the debugging operation unit is used to read a BIOS or a unified extensible firmware interface of the motherboard to perform a power-on self-test. Debug code data. 8.如权利要求7所述的重启装置,其特征在于,该除错运算单元用来于判断该除错码数据中的一除错码的检测累加次数大于一特定值时,控制该开关机控制单元关闭该主机板。8. The restarting device according to claim 7, wherein the debugging operation unit is used to control the power on and off when it is judged that the cumulative number of detections of a debugging code in the debugging code data is greater than a specific value The control unit turns off the motherboard. 9.如权利要求7所述的重启装置,其特征在于,该设定接口用来设定该主机板的一开机时间预设值,该除错运算单元用来于检测到该除错码数据具有一除错完成码以及判断该主机板的实际开机时间大于或等于该开机时间预设值时,控制该开关机控制单元关闭该主机板。9. The restarting device according to claim 7, wherein the setting interface is used to set a preset value of boot time of the motherboard, and the debugging operation unit is used to detect the debugging code data When there is a debugging completion code and it is judged that the actual power-on time of the motherboard is greater than or equal to the preset value of the power-on time, the power-on/off control unit is controlled to shut down the motherboard. 10.如权利要求7所述的重启装置,其特征在于,该设定接口用来设定该主机板的一关机时间预设值,该除错运算单元用来于检测到该除错码数据具有一关机状态码以及判断该主机板的实际关机时间大于或等于该关机时间预设值时,控制该开关机控制单元启动该主机板。10. The restarting device according to claim 7, wherein the setting interface is used to set a preset value of shutdown time of the motherboard, and the debugging operation unit is used to detect the debugging code data When there is a power-off state code and it is judged that the actual power-off time of the motherboard is greater than or equal to the preset value of the power-off time, the power-on/off control unit is controlled to start the motherboard.
CN2010106143640A 2010-12-30 2010-12-30 Test method for automatically restarting mainboard and recording debug data and restarting device thereof Pending CN102541702A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2010106143640A CN102541702A (en) 2010-12-30 2010-12-30 Test method for automatically restarting mainboard and recording debug data and restarting device thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2010106143640A CN102541702A (en) 2010-12-30 2010-12-30 Test method for automatically restarting mainboard and recording debug data and restarting device thereof

Publications (1)

Publication Number Publication Date
CN102541702A true CN102541702A (en) 2012-07-04

Family

ID=46348650

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2010106143640A Pending CN102541702A (en) 2010-12-30 2010-12-30 Test method for automatically restarting mainboard and recording debug data and restarting device thereof

Country Status (1)

Country Link
CN (1) CN102541702A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105279072A (en) * 2015-10-26 2016-01-27 广东威创视讯科技股份有限公司 Electronic product turn-on power-down test method, apparatus and system
CN105427890A (en) * 2015-11-18 2016-03-23 浪潮电子信息产业股份有限公司 Method and device for recording restart times of storage system
CN106844125A (en) * 2015-12-03 2017-06-13 昆达电脑科技(昆山)有限公司 The automatic recording device and method of commissioning stage debugging information to be measured
CN111276081A (en) * 2018-12-04 2020-06-12 山东快发网络科技有限公司 Method and terminal for controlling mainboard
CN112346786A (en) * 2019-08-08 2021-02-09 佛山市顺德区顺达电脑厂有限公司 Debugging information recording method applied to startup stage and operation stage after startup

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002017061A1 (en) * 2000-08-21 2002-02-28 Tae Gyung Lee Method for providing advertisements on personal computer using system bios
CN101187891A (en) * 2006-11-22 2008-05-28 英业达股份有限公司 Detection device for detecting mainboard and detection method thereof
CN101398776A (en) * 2007-09-28 2009-04-01 佛山市顺德区顺达电脑厂有限公司 Automatic powering-on/powering-off test device and method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002017061A1 (en) * 2000-08-21 2002-02-28 Tae Gyung Lee Method for providing advertisements on personal computer using system bios
CN101187891A (en) * 2006-11-22 2008-05-28 英业达股份有限公司 Detection device for detecting mainboard and detection method thereof
CN101398776A (en) * 2007-09-28 2009-04-01 佛山市顺德区顺达电脑厂有限公司 Automatic powering-on/powering-off test device and method

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105279072A (en) * 2015-10-26 2016-01-27 广东威创视讯科技股份有限公司 Electronic product turn-on power-down test method, apparatus and system
CN105427890A (en) * 2015-11-18 2016-03-23 浪潮电子信息产业股份有限公司 Method and device for recording restart times of storage system
CN106844125A (en) * 2015-12-03 2017-06-13 昆达电脑科技(昆山)有限公司 The automatic recording device and method of commissioning stage debugging information to be measured
CN106844125B (en) * 2015-12-03 2019-05-31 昆达电脑科技(昆山)有限公司 The automatic recording device and method of commissioning stage debugging information to be measured
CN111276081A (en) * 2018-12-04 2020-06-12 山东快发网络科技有限公司 Method and terminal for controlling mainboard
CN112346786A (en) * 2019-08-08 2021-02-09 佛山市顺德区顺达电脑厂有限公司 Debugging information recording method applied to startup stage and operation stage after startup
CN112346786B (en) * 2019-08-08 2022-07-12 佛山市顺德区顺达电脑厂有限公司 Debugging information recording method applied to startup stage and operation stage after startup

Similar Documents

Publication Publication Date Title
CN103744764A (en) Crontab based whole computer memory stability test method
US20070168738A1 (en) Power-on error detection system and method
CN104320308B (en) A kind of method and device of server exception detection
US20030204790A1 (en) Computer main board on/off testing device, method and system
WO2013075499A1 (en) Power on self test information output method, virtual machine manager and processor
CN102541702A (en) Test method for automatically restarting mainboard and recording debug data and restarting device thereof
US20090217105A1 (en) Debug device for embedded systems and method thereof
US8726088B2 (en) Method for processing booting errors
CN103019920A (en) Complete machine non-power-off startup and shutdown method based on Linux system
TWI436203B (en) Testing method for automatically rebooting a motherboard and recording related debug information and rebooting device thereof
CN103942059B (en) Electronic device with multiple starting modes
TW201500919A (en) System and method of remote debugging BMC
CN101539876A (en) Start-up test system and method thereof
CN108089961A (en) One kind is based on MOC boards hardware reboot test methods and system
CN106354592A (en) Computer automatic startup and shutdown testing device
CN101187891A (en) Detection device for detecting mainboard and detection method thereof
KR20090037223A (en) System and method for performing self-diagnosis after shutdown and booting method using it
CN1145104C (en) Method for detecting and processing unexpected stop of computer system
KR20090016286A (en) Computer system and its boot control method
TWI324304B (en) Method for reading data of input/output port
CN101826046B (en) Computer startup debugging method
CN101533369A (en) Method and device for checking boot program
TWI391816B (en) Computer debug method
CN101751064B (en) Automatic start-up control system and method thereof
TWI469576B (en) Contacts client server and method for monitoring function test of the client server

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C02 Deemed withdrawal of patent application after publication (patent law 2001)
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20120704